CVSROOT: /home/cvs
Module name: linux
Changes by: ppopov@ftp.linux-mips.org 05/01/30 08:06:19
Modified files:
arch/mips/au1000/db1x00: Tag: linux_2_4 Makefile board_setup.c
irqmap.c
include/asm-mips: Tag: linux_2_4 db1x00.h
Log message:
Added Db1x daughter card support and mmc support functions for the
Au1x MMC driver.
diff -urN linux/arch/mips/au1000/db1x00/Makefile
linux/arch/mips/au1000/db1x00/Makefile
--- linux/arch/mips/au1000/db1x00/Makefile 2004/03/09 23:53:24 1.1.2.6
+++ linux/arch/mips/au1000/db1x00/Makefile 2005/01/30 08:06:19 1.1.2.7
@@ -17,4 +17,11 @@
obj-y := init.o board_setup.o irqmap.o
obj-$(CONFIG_WM97XX_COMODULE) += mirage_ts.o
+ifdef CONFIG_MIPS_DB1100
+ifdef CONFIG_MMC
+obj-y += mmc_support.o
+export-objs += mmc_support.o
+endif
+endif
+
include $(TOPDIR)/Rules.make
diff -urN linux/arch/mips/au1000/db1x00/board_setup.c
linux/arch/mips/au1000/db1x00/board_setup.c
--- linux/arch/mips/au1000/db1x00/board_setup.c 2004/07/14 05:43:49 1.1.2.5
+++ linux/arch/mips/au1000/db1x00/board_setup.c 2005/01/30 08:06:19 1.1.2.6
@@ -46,10 +46,22 @@
#include <asm/au1000.h>
#include <asm/db1x00.h>
-extern struct rtc_ops no_rtc_ops;
+#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
+#include <asm/au1xxx_dbdma.h>
+extern struct ide_ops *ide_ops;
+extern struct ide_ops au1xxx_ide_ops;
+extern u32 au1xxx_ide_virtbase;
+extern u64 au1xxx_ide_physbase;
+extern int au1xxx_ide_irq;
+
+/* Ddma */
+chan_tab_t *ide_read_ch, *ide_write_ch;
+u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
+
+dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0,
0, 0x00000000, 0, 0 };
+#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
-/* not correct for db1550 */
-static BCSR * const bcsr = (BCSR *)0xAE000000;
+extern struct rtc_ops no_rtc_ops;
void board_reset (void)
{
@@ -108,8 +120,42 @@
au_writel(0x02000200, GPIO2_OUTPUT);
#endif
+#if defined(CONFIG_AU1XXX_SMC91111)
+#define CPLD_CONTROL (0xAF00000C)
+ {
+ extern uint32_t au1xxx_smc91111_base;
+ extern unsigned int au1xxx_smc91111_irq;
+ extern int au1xxx_smc91111_nowait;
+
+ au1xxx_smc91111_base = 0xAC000300;
+ au1xxx_smc91111_irq = AU1000_GPIO_8;
+ au1xxx_smc91111_nowait = 1;
+
+ /* set up the Static Bus timing - only 396Mhz */
+ bcsr->resets |= 0x7;
+ au_writel(0x00010003, MEM_STCFG0);
+ au_writel(0x000c00c0, MEM_STCFG2);
+ au_writel(0x85E1900D, MEM_STTIME2);
+ }
+#endif /* end CONFIG_SMC91111 */
au_sync();
+#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
+ /*
+ * Iniz IDE parameters
+ */
+ ide_ops = &au1xxx_ide_ops;
+ au1xxx_ide_irq = DAUGHTER_CARD_IRQ;
+ au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
+ au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
+
+ /*
+ * change PIO or PIO+Ddma
+ * check the GPIO-6 pin condition. db1550:s6_dot
+ */
+ switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 6)) ? 1 : 0;
+#endif
+
#ifdef CONFIG_MIPS_DB1000
printk("AMD Alchemy Au1000/Db1000 Board\n");
#endif
diff -urN linux/arch/mips/au1000/db1x00/irqmap.c
linux/arch/mips/au1000/db1x00/irqmap.c
--- linux/arch/mips/au1000/db1x00/irqmap.c 2004/04/02 09:04:00 1.1.2.8
+++ linux/arch/mips/au1000/db1x00/irqmap.c 2005/01/30 08:06:19 1.1.2.9
@@ -53,6 +53,7 @@
#ifdef CONFIG_MIPS_DB1550
{ AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 IRQ#
{ AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 IRQ#
+ { AU1000_GPIO_8, INTC_INT_LOW_LEVEL, 0 }, // Daughtercard IRQ#
#else
{ AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0
Fully_Interted#
{ AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 STSCHG#
diff -urN linux/include/asm-mips/db1x00.h linux/include/asm-mips/db1x00.h
--- linux/include/asm-mips/Attic/db1x00.h 2004/07/14 06:30:30 1.1.2.8
+++ linux/include/asm-mips/Attic/db1x00.h 2005/01/30 08:06:19 1.1.2.9
@@ -1,5 +1,5 @@
/*
- * AMD Alchemy DB1x00 Reference Boards
+ * AMD Alchemy DB1x00 Reference Boards (BUT NOT DB1200)
*
* Copyright 2001 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
@@ -36,9 +36,18 @@
#define AC97_PSC_BASE PSC1_BASE_ADDR
#define SMBUS_PSC_BASE PSC2_BASE_ADDR
#define I2S_PSC_BASE PSC3_BASE_ADDR
+#define NAND_CS 1
+/* for drivers/pcmcia/au1000_db1x00.c */
+#define BOARD_PC0_INT AU1000_GPIO_3
+#define BOARD_PC1_INT AU1000_GPIO_5
+#define BOARD_CARD_INSERTED(SOCKET) !(bcsr->status & (1<<(4+SOCKET)))
#else
#define BCSR_KSEG1_ADDR 0xAE000000
+/* for drivers/pcmcia/au1000_db1x00.c */
+#define BOARD_PC0_INT AU1000_GPIO_2
+#define BOARD_PC1_INT AU1000_GPIO_5
+#define BOARD_CARD_INSERTED(SOCKET) !(bcsr->status & (1<<(4+SOCKET)))
#endif
/*
@@ -66,6 +75,7 @@
} BCSR;
+static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
/*
* Register/mask bit definitions for the BCSRs
@@ -130,14 +140,6 @@
#define BCSR_SWRESET_RESET 0x0080
-/* PCMCIA Db1x00 specific defines */
-#define PCMCIA_MAX_SOCK 1
-#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
-
-/* VPP/VCC */
-#define SET_VCC_VPP(VCC, VPP, SLOT)\
- ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
-
/* MTD CONFIG OPTIONS */
#if defined(CONFIG_MTD_DB1X00_BOOT) && defined(CONFIG_MTD_DB1X00_USER)
#define DB1X00_BOTH_BANKS
@@ -147,48 +149,15 @@
#define DB1X00_USER_ONLY
#endif
-/* SD controller macros */
-/*
- * Detect card.
- */
-#define mmc_card_inserted(_n_, _res_) \
- do { \
- BCSR * const bcsr = (BCSR *)0xAE000000; \
- unsigned long mmc_wp, board_specific; \
- if ((_n_)) { \
- mmc_wp = BCSR_BOARD_SD1_WP; \
- } else { \
- mmc_wp = BCSR_BOARD_SD0_WP; \
- } \
- board_specific = au_readl((unsigned long)(&bcsr->specific)); \
- if (!(board_specific & mmc_wp)) {/* low means card present */ \
- *(int *)(_res_) = 1; \
- } else { \
- *(int *)(_res_) = 0; \
- } \
- } while (0)
-
+#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
/*
- * Apply power to card slot(s).
+ * Daughter card information.
*/
-#define mmc_power_on(_n_) \
- do { \
- BCSR * const bcsr = (BCSR *)0xAE000000; \
- unsigned long mmc_pwr, mmc_wp, board_specific; \
- if ((_n_)) { \
- mmc_pwr = BCSR_BOARD_SD1_PWR; \
- mmc_wp = BCSR_BOARD_SD1_WP; \
- } else { \
- mmc_pwr = BCSR_BOARD_SD0_PWR; \
- mmc_wp = BCSR_BOARD_SD0_WP; \
- } \
- board_specific = au_readl((unsigned long)(&bcsr->specific)); \
- if (!(board_specific & mmc_wp)) {/* low means card present */ \
- board_specific |= mmc_pwr; \
- au_writel(board_specific, (int)(&bcsr->specific)); \
- au_sync(); \
- } \
- } while (0)
+#define DAUGHTER_CARD_IRQ (AU1000_GPIO_8)
+/* DC_IDE */
+#define AU1XXX_ATA_PHYS_ADDR (0x0C000000)
+#define AU1XXX_ATA_REG_OFFSET (5)
+#endif /* CONFIG_MIPS_DB1550 */
#endif /* __ASM_DB1X00_H */
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