CVSROOT: /home/cvs
Module name: linux
Changes by: ralf@ftp.linux-mips.org 05/01/13 14:07:19
Modified files:
. : CREDITS MAINTAINERS Makefile
Documentation : 00-INDEX Changes SAK.txt cciss.txt ide.txt
ioctl-number.txt kernel-parameters.txt pm.txt
riscom8.txt stable_api_nonsense.txt
stallion.txt
Documentation/DocBook: kernel-api.tmpl
Documentation/arm: IXP4xx
Documentation/cdrom: packet-writing.txt
Documentation/early-userspace: README
Documentation/filesystems: 00-INDEX
Documentation/i2c: i2c-stub
Documentation/i386: boot.txt zero-page.txt
Documentation/networking: e100.txt e1000.txt
Documentation/power: devices.txt
Documentation/powerpc: 00-INDEX
Documentation/scsi: scsi_mid_low_api.txt
Documentation/sound/alsa: ALSA-Configuration.txt MIXART.txt
OSS-Emulation.txt
Documentation/sound/alsa/DocBook: writing-an-alsa-driver.tmpl
Documentation/usb: sn9c102.txt
Documentation/vm: hugetlbpage.txt numa
Documentation/x86_64: boot-options.txt mm.txt
arch/alpha : Kconfig defconfig
arch/alpha/kernel: core_marvel.c proto.h srmcons.c
arch/alpha/mm : init.c numa.c
arch/alpha/oprofile: common.c op_model_ev4.c op_model_ev5.c
op_model_ev6.c op_model_ev67.c
arch/arm : Kconfig
arch/arm/boot/compressed: Makefile head-xscale.S
arch/arm/common: Makefile amba.c locomo.c sa1111.c
arch/arm/configs: ebsa110_defconfig ep80219_defconfig
iq31244_defconfig iq80321_defconfig
iq80331_defconfig ixp4xx_defconfig
arch/arm/kernel: Makefile asm-offsets.c entry-armv.S
entry-header.S head.S setup.c
arch/arm/mach-integrator: impd1.c integrator_ap.c
integrator_cp.c time.c
arch/arm/mach-iop3xx: Kconfig Makefile iop321-pci.c
iop321-setup.c iop331-pci.c iop331-setup.c
iq31244-pci.c iq80321-pci.c iq80331-pci.c
arch/arm/mach-ixp2000: core.c enp2611.c ixdp2400.c ixdp2800.c
arch/arm/mach-ixp4xx: Kconfig common-pci.c common.c
coyote-setup.c ixdp425-pci.c
ixdp425-setup.c prpmc1100-setup.c
arch/arm/mach-omap: board-h2.c board-h3.c board-innovator.c
board-osk.c board-perseus2.c common.c dma.c
pm.c
arch/arm/mach-pxa: Kconfig Makefile generic.c ssp.c
arch/arm/mach-s3c2410: cpu.c cpu.h mach-bast.c mach-h1940.c
mach-rx3715.c mach-smdk2410.c
mach-vr1000.c s3c2410.c s3c2410.h
s3c2440.c s3c2440.h
arch/arm/mach-sa1100: neponset.c
arch/arm/mach-versatile: core.c
arch/arm/mm : Kconfig alignment.c consistent.c init.c
mm-armv.c proc-arm1020.S proc-arm1020e.S
proc-arm1022.S proc-arm1026.S proc-arm6_7.S
proc-arm720.S proc-arm920.S proc-arm922.S
proc-arm925.S proc-arm926.S proc-sa110.S
proc-sa1100.S proc-v6.S proc-xscale.S
arch/arm/oprofile: common.c init.c op_model_xscale.c
arch/arm/tools : mach-types
arch/arm26 : ACKNOWLEDGEMENTS Kconfig Makefile
arch/arm26/boot: Makefile install.sh
arch/arm26/boot/compressed: head.S ll_char_wr.S uncompress.h
vmlinux.lds.in
arch/arm26/kernel: Makefile armksyms.c compat.c dma.c ecard.c
entry.S init_task.c process.c semaphore.c
setup.c sys_arm.c time.c traps.c
vmlinux-arm26-xip.lds.in vmlinux-arm26.lds.in
arch/arm26/lib : Makefile backtrace.S changebit.S clearbit.S
copy_page.S csumipv6.S csumpartial.S
csumpartialcopy.S csumpartialcopygeneric.S
delay.S ecard.S floppydma.S getuser.S
io-acorn.S io-readsb.S io-writesb.S
io-writesl.S memchr.S memcpy.S memset.S
memzero.S putuser.S setbit.S strchr.S strrchr.S
testchangebit.S testclearbit.S testsetbit.S
arch/arm26/machine: Makefile dma.c irq.c
arch/arm26/mm : Makefile extable.c fault.c init.c proc-funcs.S
arch/cris : Kconfig
arch/cris/arch-v10/kernel: fasttimer.c
arch/h8300 : Kconfig
arch/h8300/kernel: syscalls.S
arch/i386 : Kconfig defconfig
arch/i386/boot : edd.S setup.S
arch/i386/kernel: apic.c apm.c dmi_scan.c entry.S head.S
i386_ksyms.c kprobes.c mca.c microcode.c
mpparse.c numaq.c process.c ptrace.c setup.c
signal.c smpboot.c srat.c time.c trampoline.S
traps.c vm86.c
arch/i386/kernel/acpi: boot.c
arch/i386/kernel/cpu: amd.c common.c intel.c proc.c
arch/i386/kernel/cpu/cpufreq: speedstep-centrino.c
arch/i386/kernel/cpu/mtrr: generic.c
arch/i386/lib : delay.c
arch/i386/mach-default: topology.c
arch/i386/mach-voyager: voyager_smp.c
arch/i386/mm : discontig.c fault.c highmem.c hugetlbpage.c
init.c ioremap.c pageattr.c pgtable.c
arch/i386/oprofile: Makefile init.c nmi_int.c nmi_timer_int.c
op_model_athlon.c op_model_p4.c
op_model_ppro.c op_x86_model.h
arch/i386/pci : fixup.c irq.c numa.c pci.h
arch/ia64 : Kconfig
arch/ia64/configs: zx1_defconfig
arch/ia64/dig : Makefile
arch/ia64/ia32 : binfmt_elf32.c ia32_entry.S ia32_signal.c
ia32priv.h sys_ia32.c
arch/ia64/kernel: Makefile acpi.c domain.c head.S ia64_ksyms.c
iosapic.c irq.c irq_ia64.c perfmon.c process.c
smpboot.c unwind.c
arch/ia64/lib : io.c swiotlb.c
arch/ia64/mm : contig.c discontig.c fault.c hugetlbpage.c
init.c numa.c
arch/ia64/oprofile: Makefile init.c perfmon.c
arch/ia64/pci : pci.c
arch/ia64/sn/kernel: io_init.c setup.c
arch/ia64/sn/kernel/sn2: prominfo_proc.c sn2_smp.c sn_hwperf.c
arch/m32r : Kconfig
arch/m32r/kernel: entry.S irq.c ptrace.c setup.c signal.c
smpboot.c
arch/m32r/mm : discontig.c fault.c init.c
arch/m32r/oprofile: init.c
arch/m68k : Kconfig defconfig
arch/m68k/configs: amiga_defconfig apollo_defconfig
atari_defconfig bvme6000_defconfig
hp300_defconfig mac_defconfig
mvme147_defconfig mvme16x_defconfig
q40_defconfig sun3_defconfig sun3x_defconfig
arch/m68knommu : Kconfig
arch/m68knommu/kernel: process.c vmlinux.lds.S
arch/m68knommu/lib: checksum.c delay.c
arch/m68knommu/mm: init.c
arch/mips : Kconfig defconfig
arch/mips/au1000/common: usbdev.c
arch/mips/au1000/mtx-1: board_setup.c
arch/mips/configs: atlas_defconfig capcella_defconfig
cobalt_defconfig db1000_defconfig
db1100_defconfig db1500_defconfig
db1550_defconfig ddb5476_defconfig
ddb5477_defconfig decstation_defconfig
e55_defconfig ev64120_defconfig
ev96100_defconfig ip22_defconfig
ip27_defconfig ip32_defconfig
it8172_defconfig ivr_defconfig
jaguar-atx_defconfig jmr3927_defconfig
lasat200_defconfig malta_defconfig
mpc30x_defconfig ocelot_3_defconfig
ocelot_c_defconfig ocelot_defconfig
ocelot_g_defconfig osprey_defconfig
pb1100_defconfig pb1500_defconfig
pb1550_defconfig rm200_defconfig
sb1250-swarm_defconfig sead_defconfig
tb0226_defconfig tb0229_defconfig
workpad_defconfig yosemite_defconfig
arch/mips/ddb5xxx/ddb5074: setup.c
arch/mips/ddb5xxx/ddb5476: setup.c
arch/mips/ddb5xxx/ddb5477: setup.c
arch/mips/gt64120/ev64120: irq.c
arch/mips/jmr3927/rbhma3100: setup.c
arch/mips/kernel: irixelf.c irixsig.c scall64-n32.S
scall64-o32.S signal32.c
arch/mips/mm : highmem.c init.c
arch/mips/sgi-ip27: ip27-init.c ip27-klnuma.c ip27-memory.c
ip27-nmi.c ip27-reset.c ip27-smp.c
arch/mips/sibyte/swarm: setup.c
arch/parisc : Kconfig
arch/parisc/configs: a500_defconfig c3000_defconfig
n4000_defconfig
arch/parisc/kernel: binfmt_elf32.c smp.c sys_parisc32.c
syscall_table.S
arch/parisc/mm : init.c
arch/parisc/oprofile: init.c
arch/ppc : Kconfig Makefile
arch/ppc/boot/simple: Makefile head.S misc-ev64260.S misc.c
arch/ppc/configs: adir_defconfig apus_defconfig common_defconfig
ev64260_defconfig ibmchrp_defconfig
k2_defconfig menf1_defconfig pcore_defconfig
pmac_defconfig pplus_defconfig
arch/ppc/kernel: Makefile entry.S head_44x.S head_booke.h
head_e500.S idle.c misc.S setup.c signal.c
smp.c traps.c
arch/ppc/mm : fsl_booke_mmu.c init.c pgtable.c
arch/ppc/oprofile: Makefile
arch/ppc/platforms: Makefile chrp_pci.c chrp_setup.c ev64260.h
pmac_pci.c prep_pci.c prep_setup.c
arch/ppc/platforms/4xx: ebony.c ibm405ep.c ibm405gp.c
ibm405gpr.c ibm440gp.c ibm440gx.c
ibmnp405h.h ibmstbx25.c oak.c ocotea.c
redwood6.c sycamore.c
arch/ppc/syslib: Makefile gt64260_pic.c ibm44x_common.c
indirect_pci.c open_pic.c open_pic_defs.h
ppc4xx_dma.c ppc4xx_pic.c ppc4xx_setup.c
xilinx_pic.c
arch/ppc64 : Kconfig Kconfig.debug Makefile defconfig
arch/ppc64/configs: g5_defconfig iSeries_defconfig
pSeries_defconfig
arch/ppc64/kernel: LparData.c Makefile asm-offsets.c
binfmt_elf32.c eeh.c entry.S head.S
iSeries_iommu.c iSeries_pci.c iSeries_proc.c
iSeries_setup.c iSeries_smp.c idle.c iommu.c
irq.c lparcfg.c maple_pci.c maple_setup.c
misc.S nvram.c pSeries_iommu.c pSeries_lpar.c
pSeries_pci.c pSeries_setup.c pSeries_smp.c
pacaData.c pci.c pci.h pci_dn.c pmac_pci.c
pmac_setup.c ppc_ksyms.c proc_ppc64.c
process.c prom.c prom_init.c ras.c
rtas-proc.c rtas.c rtasd.c setup.c signal32.c
smp.c sys_ppc32.c sysfs.c time.c traps.c
u3_iommu.c udbg.c vio.c xics.c
arch/ppc64/lib : Makefile locks.c sstep.c
arch/ppc64/mm : fault.c hash_low.S hash_native.c hash_utils.c
hugetlbpage.c init.c numa.c slb.c stab.c
arch/ppc64/oprofile: common.c op_impl.h op_model_power4.c
op_model_rs64.c
arch/ppc64/xmon: start.c xmon.c
arch/s390 : Kconfig defconfig
arch/s390/kernel: Makefile binfmt_elf32.c compat_linux.c
compat_linux.h compat_signal.c
compat_wrapper.S entry.S entry64.S irq.c
process.c ptrace.c setup.c smp.c syscalls.S
time.c vtime.c
arch/s390/mm : extmem.c init.c
arch/s390/oprofile: init.c
arch/sh : Kconfig
arch/sh/boards/renesas/hs7751rvoip: io.c
arch/sh/drivers/pci: Kconfig
arch/sh/kernel : process.c sh_ksyms.c smp.c
arch/sh/lib : delay.c
arch/sh/oprofile: op_model_null.c
arch/sh64 : Kconfig
arch/sh64/kernel: process.c
arch/sparc : Kconfig
arch/sparc/kernel: pcic.c process.c signal.c sun4d_smp.c
sun4m_smp.c
arch/sparc/lib : bitext.c
arch/sparc/mm : fault.c highmem.c init.c io-unit.c iommu.c
arch/sparc/prom: ranges.c
arch/sparc64 : Kconfig defconfig
arch/sparc64/kernel: binfmt_aout32.c binfmt_elf32.c process.c
signal32.c sys_sparc32.c systbls.S
arch/sparc64/lib: delay.c
arch/sparc64/mm: init.c tlb.c
arch/sparc64/oprofile: init.c
arch/sparc64/solaris: ioctl.c socksys.c timod.c
arch/um : Kconfig Kconfig_char Makefile Makefile-i386
Makefile-x86_64 defconfig
arch/um/drivers: Makefile chan_kern.c chan_user.c cow.h
cow_sys.h cow_user.c line.c mconsole_kern.c
mmapper_kern.c net_kern.c net_user.c pty.c
ssl.c stdio_console.c ubd_kern.c ubd_user.c
xterm.c
arch/um/include: chan_kern.h chan_user.h frame_kern.h line.h
net_kern.h process.h ptrace_user.h um_uaccess.h
uml_uaccess.h
arch/um/include/sysdep-i386: ptrace.h syscalls.h
arch/um/include/sysdep-ppc: syscalls.h
arch/um/kernel : Makefile checksum.c exec_kern.c exitcode.c
helper.c initrd_user.c irq.c irq_user.c ksyms.c
main.c mem.c mem_user.c physmem.c process.c
process_kern.c ptrace.c signal_kern.c
signal_user.c smp.c sys_call_table.c
syscall_kern.c time.c time_kern.c tlb.c
trap_kern.c trap_user.c um_arch.c umid.c
arch/um/kernel/skas: Makefile mem.c process.c process_kern.c
tlb.c trap_user.c uaccess.c
arch/um/kernel/skas/include: mode-skas.h skas.h uaccess-skas.h
arch/um/kernel/skas/util: Makefile
arch/um/kernel/tt: Makefile exec_user.c gdb.c process_kern.c
syscall_kern.c syscall_user.c tlb.c tracer.c
trap_user.c uaccess.c
arch/um/kernel/tt/include: mode-tt.h tt.h
arch/um/kernel/tt/ptproxy: proxy.c sysdep.c wait.c
arch/um/os-Linux: Makefile process.c user_syms.c
arch/um/sys-i386: Makefile ldt.c ptrace.c ptrace_user.c
sigcontext.c syscalls.c
arch/v850 : Kconfig
arch/v850/kernel: fpga85e2c.c sim85e2.c
arch/x86_64 : Kconfig Makefile defconfig
arch/x86_64/boot: setup.S
arch/x86_64/ia32: ia32_aout.c ia32_binfmt.c ia32_signal.c
ia32entry.S sys_ia32.c syscall32.c
arch/x86_64/kernel: Makefile aperture.c apic.c early_printk.c
entry.S genapic.c head.S head64.c i8259.c
init_task.c io_apic.c mce.c mpparse.c
process.c reboot.c setup.c setup64.c
signal.c smp.c smpboot.c time.c traps.c
arch/x86_64/kernel/acpi: sleep.c
arch/x86_64/lib: delay.c io.c
arch/x86_64/mm : Makefile fault.c init.c ioremap.c k8topology.c
numa.c pageattr.c
arch/x86_64/oprofile: Makefile
crypto : Kconfig sha512.c tcrypt.c tcrypt.h
drivers : Kconfig Makefile
drivers/acpi : Kconfig Makefile asus_acpi.c bus.c ec.c
ibm_acpi.c numa.c osl.c pci_bind.c pci_irq.c
pci_link.c scan.c thermal.c toshiba_acpi.c
video.c
drivers/acpi/dispatcher: dsopcode.c dswexec.c
drivers/acpi/events: evgpe.c evxfevnt.c
drivers/acpi/executer: exconfig.c exconvrt.c exdump.c exfldio.c
exmisc.c exoparg1.c exoparg2.c exprep.c
exstore.c exstorob.c
drivers/acpi/hardware: hwsleep.c
drivers/acpi/parser: psopcode.c
drivers/acpi/sleep: proc.c
drivers/acpi/tables: tbconvrt.c tbrsdt.c tbxfroot.c
drivers/atm : ambassador.c atmtcp.c firestream.c he.c he.h
idt77105.c idt77105.h idt77252.h iphase.c
iphase.h nicstarmac.c nicstarmac.h zatm.c
drivers/base : Kconfig bus.c class.c cpu.c node.c platform.c
drivers/base/power: power.h runtime.c suspend.c
drivers/block : DAC960.c Kconfig cciss.c cciss_scsi.c
cciss_scsi.h cpqarray.c cpqarray.h
deadline-iosched.c floppy.c genhd.c ida_cmd.h
ida_ioctl.h loop.c nbd.c noop-iosched.c
pktcdvd.c ps2esdi.c scsi_ioctl.c smart1,2.h
sx8.c xd.c
drivers/block/paride: bpck6.c pcd.c pd.c pf.c pg.c pt.c
drivers/bluetooth: bfusb.c bluecard_cs.c bt3c_cs.c btuart_cs.c
dtl1_cs.c hci_usb.c
drivers/cdrom : aztcd.c cdrom.c gscd.c isp16.c mcd.c mcdx.c
optcd.c sjcd.c sonycd535.c
drivers/char : Kconfig applicom.c cyclades.c ds1286.c
ec3104_keyb.c efirtc.c esp.c generic_serial.c
genrtc.c hpet.c hvc_console.c hvcs.c hvsi.c
hw_random.c i8k.c ip2main.c isicom.c keyboard.c
lcd.c lcd.h lp.c misc.c mxser.c n_hdlc.c
n_tty.c nvram.c pty.c qtronix.c random.c rtc.c
scx200_gpio.c selection.c sonypi.c synclink.c
synclinkmp.c sysrq.c tipar.c toshiba.c tty_io.c
tty_ioctl.c vc_screen.c viocons.c vt.c
vt_ioctl.c
drivers/char/agp: agp.h ali-agp.c alpha-agp.c amd-k7-agp.c
amd64-agp.c ati-agp.c efficeon-agp.c generic.c
hp-agp.c i460-agp.c intel-agp.c
intel-mch-agp.c isoch.c nvidia-agp.c sis-agp.c
sworks-agp.c uninorth-agp.c via-agp.c
drivers/char/drm: Kconfig Makefile drmP.h drm_core.h
drm_memory.h drm_memory_debug.h drm_os_linux.h
ffb_drv.c ffb_drv.h gamma_dma.c gamma_lists.h
i810_dma.c i810_drm.h i810_drv.c i810_drv.h
i830_dma.c i830_drm.h i830_drv.c i830_drv.h
i830_irq.c i915_dma.c i915_drm.h i915_drv.c
i915_drv.h i915_irq.c i915_mem.c mga_dma.c
mga_drv.c mga_drv.h mga_irq.c mga_state.c
mga_warp.c r128_cce.c r128_drv.c r128_drv.h
r128_irq.c r128_state.c radeon_cp.c
radeon_drv.c radeon_drv.h radeon_irq.c
radeon_mem.c radeon_state.c sis_drm.h
sis_drv.c sis_drv.h sis_ds.c sis_ds.h sis_mm.c
tdfx_drv.c
drivers/char/ftape/compressor: zftape-compress.c
drivers/char/ftape/lowlevel: fc-10.c fdc-io.c fdc-io.h
ftape-bsm.c ftape-bsm.h ftape-ctl.c
ftape-ctl.h ftape-init.c ftape-io.c
ftape-io.h ftape-proc.c ftape-rw.c
ftape-rw.h
drivers/char/ftape/zftape: zftape-buffers.c zftape-buffers.h
zftape-init.c zftape-init.h
zftape-rw.c zftape-rw.h zftape-vtbl.c
zftape-vtbl.h zftape_syms.c
drivers/char/ip2: fip_firm.h i2cmd.c i2cmd.h i2lib.c
drivers/char/ipmi: ipmi_msghandler.c ipmi_poweroff.c
ipmi_si_intf.c ipmi_watchdog.c
drivers/char/mwave: 3780i.c mwavedd.c
drivers/char/pcmcia: synclink_cs.c
drivers/char/rio: func.h rio_linux.c rioboot.c riocmd.c
rioctrl.c rioinit.c riointr.c rioroute.c
riotable.c riotty.c
drivers/char/watchdog: Kconfig alim7101_wdt.c machzwd.c
pcwd_usb.c
drivers/eisa : Makefile
drivers/firmware: pcdp.c
drivers/i2c : i2c-sensor-vid.c
drivers/i2c/algos: Kconfig i2c-algo-bit.c i2c-algo-pca.c
i2c-algo-pcf.c
drivers/i2c/busses: Kconfig i2c-ali1535.c i2c-ali1563.c
i2c-ali15x3.c i2c-amd756.c i2c-amd8111.c
i2c-hydra.c i2c-i801.c i2c-iop3xx.c
i2c-iop3xx.h i2c-nforce2.c i2c-piix4.c
i2c-prosavage.c i2c-sis96x.c i2c-stub.c
i2c-viapro.c
drivers/i2c/chips: Kconfig Makefile asb100.c eeprom.c fscher.c
isp1301_omap.c it87.c lm78.c lm90.c pc87360.c
smsc47m1.c via686a.c w83627hf.c w83781d.c
drivers/ide : ide-cd.c ide-disk.c ide-dma.c ide-floppy.c
ide-io.c ide-iops.c ide-lib.c ide-proc.c
ide-taskfile.c ide.c setup-pci.c
drivers/ide/arm: icside.c
drivers/ide/cris: ide-v10.c
drivers/ide/legacy: ide-cs.c
drivers/ide/pci: aec62xx.c aec62xx.h alim15x3.c amd74xx.c
atiixp.c cmd64x.c cs5530.c cy82c693.c generic.c
hpt34x.c hpt366.c hpt366.h it8172.c ns87415.c
opti621.c opti621.h pdc202xx_new.c
pdc202xx_new.h pdc202xx_old.c pdc202xx_old.h
piix.c piix.h rz1000.c sc1200.c serverworks.c
serverworks.h sgiioc4.c siimage.c sis5513.c
sl82c105.c slc90e66.c triflex.c trm290.c
via82cxxx.c
drivers/ide/ppc: pmac.c
drivers/ieee1394: csr.c eth1394.c pcilynx.c sbp2.c
drivers/input : input.c mousedev.c
drivers/input/gameport: Kconfig
drivers/input/joystick: gamecon.c magellan.c spaceball.c
spaceorb.c stinger.c twidjoy.c warrior.c
drivers/input/joystick/iforce: iforce-main.c
drivers/input/keyboard: Kconfig atkbd.c lkkbd.c newtonkbd.c
sunkbd.c xtkbd.c
drivers/input/mouse: Kconfig Makefile logips2pp.c logips2pp.h
psmouse-base.c psmouse.h sermouse.c
synaptics.c synaptics.h vsxxxaa.c
drivers/input/serio: Kconfig Makefile gscps2.c i8042-io.h
i8042.c i8042.h maceps2.c parkbd.c serio.c
drivers/input/touchscreen: h3600_ts_input.c
drivers/isdn/act2000: module.c
drivers/isdn/capi: capifs.c
drivers/isdn/hardware/avm: avm_cs.c b1pcmcia.c
drivers/isdn/hardware/eicon: divamnt.c divasmain.c
drivers/isdn/hisax: avma1_cs.c config.c elsa_cs.c hfc_usb.c
hisax_fcpcipnp.c hisax_isac.c sedlbauer_cs.c
st5481_b.c st5481_d.c st5481_init.c
st5481_usb.c teles_cs.c
drivers/isdn/icn: icn.c
drivers/isdn/pcbit: module.c
drivers/isdn/sc: init.c
drivers/isdn/tpam: tpam_main.c
drivers/macintosh: via-pmu.c
drivers/mca : mca-bus.c mca-legacy.c mca-proc.c
drivers/md : Makefile kcopyd.c linear.c multipath.c raid1.c
raid10.c raid5.c raid6algos.c raid6main.c
drivers/media/common: saa7146_core.c
drivers/media/dvb/b2c2: b2c2-usb-core.c skystar2.c
drivers/media/dvb/cinergyT2: cinergyT2.c
drivers/media/dvb/dibusb: dvb-dibusb.c
drivers/media/dvb/frontends: dib3000-common.h tda80xx.c
drivers/media/dvb/ttpci: av7110_hw.c
drivers/media/dvb/ttusb-budget: dvb-ttusb-budget.c
drivers/media/dvb/ttusb-dec: ttusb_dec.c
drivers/media/radio: miropcm20-radio.c radio-aimslab.c
radio-aztech.c radio-cadet.c
radio-gemtek-pci.c radio-gemtek.c
radio-maestro.c radio-maxiradio.c
radio-rtrack2.c radio-sf16fmi.c
radio-sf16fmr2.c radio-terratec.c
radio-trust.c radio-typhoon.c
radio-zoltrix.c
drivers/media/video: Kconfig adv7170.c adv7175.c bt819.c bt856.c
bttv-cards.c bttv-driver.c bttv-i2c.c
bttv-risc.c bttv.h bttvp.h bw-qcam.c
c-qcam.c cpia.c cpia_pp.c dpc7146.c
hexium_gemini.c hexium_orion.c ir-kbd-i2c.c
meye.c msp3400.c mxb.c mxb.h pms.c
saa7110.c saa7114.c saa7185.c stradis.c
tda7432.c tda9875.c tuner-3036.c
videocodec.c videocodec.h vpx3220.c w9966.c
zoran_card.c zoran_device.c zoran_device.h
zoran_driver.c zr36016.c zr36050.c
zr36050.h zr36060.c zr36060.h zr36120.c
drivers/media/video/cx88: cx88-mpeg.c cx88-video.c
drivers/media/video/saa7134: saa7134-core.c saa7134-video.c
drivers/message/fusion: mptlan.c
drivers/message/i2o: pci.c
drivers/misc/ibmasm: ibmasmfs.c module.c
drivers/mmc : Kconfig mmc.c mmc_block.c mmci.c pxamci.c
wbsd.c
drivers/mtd : Kconfig cmdlinepart.c ftl.c inftlmount.c
mtdblock.c mtdchar.c nftlmount.c redboot.c
drivers/mtd/chips: Kconfig amd_flash.c cfi_cmdset_0001.c
cfi_cmdset_0002.c cfi_cmdset_0020.c
cfi_probe.c cfi_util.c jedec.c jedec_probe.c
map_ram.c map_rom.c
drivers/mtd/devices: Kconfig Makefile blkmtd.c doc2000.c
doc2001.c doc2001plus.c docprobe.c
ms02-nv.c mtdram.c phram.c pmc551.c slram.c
drivers/mtd/maps: Kconfig Makefile amd76xrom.c dilnetpc.c
ebony.c elan-104nc.c ichxrom.c l440gx.c
netsc520.c nettel.c ocelot.c pci.c pcmciamtd.c
physmap.c sbc_gxx.c sc520cdp.c scb2_flash.c
scx200_docflash.c ts5500_flash.c uclinux.c
drivers/mtd/nand: Kconfig Makefile diskonchip.c nand_base.c
nand_bbt.c s3c2410.c
drivers/net : 3c501.c 3c503.c 3c505.c 3c507.c 3c509.c 3c515.c
3c523.c 3c59x.c 8139cp.c 8139too.c 82596.c
8390.c 8390.h Kconfig Makefile ac3200.c
amd8111e.c at1700.c atp.c cs89x0.c de600.c
de620.c depca.c dgrs.c dl2k.c e100.c e2100.c
eepro100.c eexpress.c epic100.c es3210.c
eth16i.c ewrk3.c fealnx.c forcedeth.c
gt96100eth.c hamachi.c hp-plus.c hp.c hp100.c
ibmlana.c lance.c lne390.c lp486e.c mace.c
natsemi.c ne.c ne2.c ne2k-pci.c ne3210.c ni52.c
ni65.c pci-skeleton.c plip.c ppp_async.c
r8169.c s2io-regs.h s2io.c s2io.h seeq8005.c
shaper.c sis900.c smc-mca.c smc-ultra.c
smc9194.c starfire.c sundance.c sunhme.c tg3.c
tlan.c tlan.h tun.c typhoon.c via-rhine.c
via-velocity.c via-velocity.h wd.c yellowfin.c
znet.c
drivers/net/appletalk: cops.c ipddp.c ltpc.c
drivers/net/arcnet: Kconfig Makefile arc-rawmode.c arcnet.c
com20020-isa.c com20020.c rfc1051.c
rfc1201.c
drivers/net/bonding: bond_3ad.c bond_main.c
drivers/net/e1000: e1000_ethtool.c e1000_hw.c e1000_hw.h
e1000_main.c e1000_osdep.h e1000_param.c
drivers/net/hamradio: 6pack.c baycom_epp.c baycom_par.c
baycom_ser_fdx.c baycom_ser_hdx.c
drivers/net/irda: ali-ircc.c donauboe.c irda-usb.c irtty-sir.c
nsc-ircc.c smsc-ircc2.c stir4200.c
tekram-sir.c via-ircc.c vlsi_ir.c
w83977af_ir.c
drivers/net/ixgb: ixgb_param.c
drivers/net/pcmcia: 3c574_cs.c 3c589_cs.c Kconfig axnet_cs.c
com20020_cs.c fmvj18x_cs.c ibmtr_cs.c
nmclan_cs.c pcnet_cs.c smc91c92_cs.c
xirc2ps_cs.c
drivers/net/sk98lin: Makefile skaddr.c skge.c skproc.c
drivers/net/sk98lin/h: skdrv2nd.h
drivers/net/skfp: skfddi.c smt.c
drivers/net/skfp/h: fplustm.h targethw.h targetos.h types.h
drivers/net/tokenring: 3c359.c 3c359.h Kconfig ibmtr.c
lanstreamer.c lanstreamer.h olympic.c
proteon.c skisa.c smctr.c
drivers/net/tulip: de2104x.c dmfe.c media.c timer.c tulip.h
tulip_core.c winbond-840.c xircom_tulip_cb.c
drivers/net/wan: c101.c cosa.c cosa.h cycx_main.c dscc4.c
farsync.c hostess_sv11.c n2.c pc300_drv.c
sbni.c sdla.c sealevel.c syncppp.c x25_asy.c
drivers/net/wireless: Kconfig airo.c airo_cs.c arlan-main.c
arlan-proc.c arlan.h atmel_cs.c
netwave_cs.c orinoco.c orinoco_cs.c
ray_cs.c wavelan.c wavelan.p.h
wavelan_cs.c wavelan_cs.p.h wl3501_cs.c
drivers/net/wireless/prism54: isl_ioctl.c islpci_dev.c
islpci_hotplug.c prismcompat.h
drivers/oprofile: buffer_sync.c cpu_buffer.c cpu_buffer.h
event_buffer.h oprof.c oprof.h
oprofile_files.c oprofile_stats.c
oprofile_stats.h oprofilefs.c timer_int.c
drivers/parport: Kconfig parport_cs.c parport_pc.c probe.c
share.c
drivers/pci : pci-driver.c pci-sysfs.c pci.c probe.c quirks.c
setup-bus.c setup-irq.c
drivers/pci/hotplug: Kconfig acpiphp_ibm.c cpci_hotplug_pci.c
cpcihp_generic.c cpqphp_pci.c fakephp.c
ibmphp.h ibmphp_core.c ibmphp_pci.c
pciehp_core.c pciehp_hpc.c rpaphp_pci.c
shpchp.h shpchp_core.c
drivers/pcmcia : Kconfig Makefile cardbus.c cistpl.c cs.c
cs_internal.h ds.c hd64465_ss.c i82092.c
i82365.c m32r_cfc.c m32r_pcc.c pcmcia_compat.c
pd6729.c pd6729.h rsrc_mgr.c soc_common.c
tcic.c ti113x.h yenta_socket.c
drivers/pnp/isapnp: core.c
drivers/pnp/pnpacpi: core.c
drivers/s390/block: dasd_devmap.c dasd_diag.c dasd_eckd.c
dasd_proc.c
drivers/s390/char: Makefile con3270.c sclp.c sclp.h sclp_con.c
sclp_cpi.c sclp_rw.c sclp_rw.h sclp_tty.c
sclp_vt220.c tape_core.c tty3270.c
drivers/s390/cio: cio.c qdio.c
drivers/s390/net: ctcmain.c qeth.h qeth_main.c qeth_proc.c
qeth_sys.c
drivers/sbus : sbus.c
drivers/sbus/char: rtc.c
drivers/scsi : 53c700.c 53c700.h Kconfig Makefile NCR53C9x.c
NCR53C9x.h NCR_D700.c advansys.c aha152x.c
aha1542.c ahci.c aic7xxx_old.c ata_piix.c
constants.c dpt_i2o.c dpti.h eata.c fdomain.c
g_NCR5380.c gdth.c hosts.c ibmmca.c ide-scsi.c
in2000.c ipr.c ipr.h libata-core.c
libata-scsi.c libata.h mca_53c9x.c megaraid.c
nsp32.c qlogicfas.c sata_uli.c scsi.c
scsi_debug.c scsi_error.c scsi_ioctl.c
scsi_lib.c scsi_scan.c scsi_sysfs.c
scsi_transport_fc.c scsicam.c sim710.c sr.c
sr_ioctl.c
drivers/scsi/aacraid: README aachba.c aacraid.h linit.c
drivers/scsi/aic7xxx: aic79xx_osm.c aic7xxx_osm.c
drivers/scsi/aic7xxx_old: aic7xxx_proc.c
drivers/scsi/dpt: dpti_ioctl.h
drivers/scsi/ibmvscsi: ibmvscsi.c
drivers/scsi/pcmcia: aha152x_stub.c fdomain_stub.c nsp_cs.c
qlogic_stub.c sym53c500_cs.c
drivers/scsi/qla2xxx: Kconfig Makefile ql2300.c ql2300_fw.c
ql2322_fw.c ql6312.c ql6312_fw.c qla_def.h
qla_devtbl.h qla_gbl.h qla_init.c
qla_iocb.c qla_isr.c qla_mbx.c qla_os.c
qla_rscn.c qla_sup.c qla_version.h
drivers/serial : 8250.c 8250_pnp.c icom.c mcfserial.c
mpc52xx_uart.c serial_cs.c sn_console.c sunsu.c
drivers/telephony: ixj.c ixj_pcmcia.c
drivers/usb : Makefile README usb-skeleton.c
drivers/usb/atm: speedtch.c usb_atm.c usb_atm.h
drivers/usb/class: audio.c bluetty.c cdc-acm.c cdc-acm.h
usb-midi.c usb-midi.h usblp.c
drivers/usb/core: config.c devices.c devio.c hcd-pci.c hcd.c
hcd.h hub.c hub.h inode.c message.c
otg_whitelist.h sysfs.c urb.c usb.c usb.h
drivers/usb/gadget: Kconfig dummy_hcd.c epautoconf.c
file_storage.c inode.c omap_udc.c serial.c
drivers/usb/host: ehci-dbg.c ehci-hcd.c ehci-hub.c ehci-mem.c
ehci-q.c ehci-sched.c ehci.h hc_crisv10.c
ohci-dbg.c ohci-hcd.c ohci-hub.c
ohci-lh7a404.c ohci-mem.c ohci-omap.c
ohci-pci.c ohci-pxa27x.c ohci-q.c
ohci-sa1111.c ohci.h sl811-hcd.c sl811.h
uhci-debug.c uhci-hcd.c uhci-hcd.h
drivers/usb/image: Kconfig mdc800.c microtek.c
drivers/usb/input: aiptek.c ati_remote.c hid-core.c hid-debug.h
hid-ff.c hid-input.c hid-lgff.c hid.h
hiddev.c kbtab.c mtouchusb.c powermate.c
touchkitusb.c usbkbd.c usbmouse.c wacom.c
xpad.c
drivers/usb/media: Makefile dabusb.c ibmcam.c konicawc.c ov511.c
se401.c sn9c102.h sn9c102_core.c
sn9c102_pas106b.c sn9c102_pas202bcb.c
sn9c102_sensor.h sn9c102_tas5110c1b.c
sn9c102_tas5130d1b.c stv680.c ultracam.c
vicam.c w9968cf.c
drivers/usb/misc: Kconfig Makefile auerswald.c emi26.c emi62.c
legousbtower.c usblcd.c usbtest.c uss720.c
drivers/usb/net: catc.c kaweth.c usbnet.c
drivers/usb/serial: Kconfig Makefile belkin_sa.c ftdi_sio.c
ftdi_sio.h io_edgeport.c io_ti.c keyspan.c
keyspan_pda.c kobil_sct.c mct_u232.c
usb-serial.c usb-serial.h visor.c visor.h
drivers/usb/storage: scsiglue.c transport.c unusual_devs.h usb.c
usb.h
drivers/video : amba-clcd.c cg6.c cyber2000fb.c fbmem.c fbmon.c
hgafb.c modedb.c neofb.c pm2fb.c pxafb.c
radeonfb.c sa1100fb.c sstfb.c tdfxfb.c
tridentfb.c vfb.c vga16fb.c
drivers/video/aty: Makefile aty128fb.c atyfb.h atyfb_base.c
radeon_base.c xlinit.c
drivers/video/console: fbcon.c fbcon.h mdacon.c sticore.c
vgacon.c
drivers/video/i810: i810_accel.c
drivers/video/intelfb: intelfbdrv.c
drivers/video/matrox: matroxfb_base.c matroxfb_crtc2.c
drivers/video/riva: fbdev.c rivafb-i2c.c
drivers/video/savage: savagefb-i2c.c
drivers/video/sis: 300vtbl.h 310vtbl.h init.c init.h init301.c
init301.h initdef.h oem300.h oem310.h osdef.h
sis.h sis_main.c sis_main.h vgatypes.h
vstruct.h
drivers/w1 : dscore.c
fs : Kconfig Kconfig.binfmt Makefile attr.c
bad_inode.c binfmt_aout.c binfmt_elf.c
binfmt_em86.c binfmt_misc.c binfmt_script.c
binfmt_som.c bio.c buffer.c dcache.c
direct-io.c dquot.c exec.c fifo.c file_table.c
fs-writeback.c inode.c libfs.c locks.c namei.c
open.c pipe.c quota.c quota_v1.c quota_v2.c
read_write.c readdir.c select.c super.c
fs/adfs : inode.c
fs/affs : amigaffs.c bitmap.c dir.c file.c inode.c
namei.c super.c symlink.c
fs/afs : types.h volume.c
fs/autofs : inode.c
fs/autofs4 : inode.c
fs/befs : debug.c
fs/bfs : dir.c inode.c
fs/cifs : cifsfs.c connect.c file.c inode.c misc.c
fs/coda : cnode.c dir.c file.c inode.c psdev.c sysctl.c
upcall.c
fs/devfs : base.c
fs/devpts : inode.c
fs/efs : super.c
fs/ext2 : acl.h dir.c ext2.h ialloc.c inode.c ioctl.c
namei.c super.c xattr.c xattr.h
fs/ext3 : acl.h balloc.c dir.c file.c ialloc.c inode.c
ioctl.c namei.c resize.c super.c xattr.c
xattr.h
fs/fat : dir.c file.c
fs/hfs : catalog.c dir.c inode.c
fs/hfsplus : catalog.c dir.c inode.c ioctl.c
fs/hostfs : hostfs_kern.c
fs/hpfs : file.c
fs/hugetlbfs : inode.c
fs/isofs : compress.c
fs/jbd : checkpoint.c commit.c recovery.c revoke.c
transaction.c
fs/jffs : inode-v23.c
fs/jffs2 : Makefile README.Locking background.c build.c
compr_zlib.c dir.c erase.c file.c fs.c gc.c
ioctl.c malloc.c nodelist.c nodelist.h
nodemgmt.c os-linux.h pushpull.h read.c
readinode.c scan.c super.c symlink.c wbuf.c
write.c writev.c
fs/jfs : inode.c jfs_imap.c jfs_logmgr.c jfs_metapage.c
namei.c super.c xattr.c
fs/lockd : mon.c svc.c
fs/minix : bitmap.c dir.c itree_common.c namei.c
fs/msdos : namei.c
fs/nfs : dir.c direct.c file.c inode.c nfs3proc.c
nfs4proc.c nfs4state.c proc.c read.c unlink.c
write.c
fs/nfsd : Makefile nfs3xdr.c nfs4proc.c nfs4state.c
nfs4xdr.c nfsproc.c vfs.c
fs/nls : nls_ascii.c
fs/ntfs : mft.c super.c
fs/openpromfs : inode.c
fs/proc : Makefile array.c base.c generic.c inode.c
kcore.c proc_misc.c proc_tty.c task_mmu.c
task_nommu.c
fs/qnx4 : inode.c namei.c truncate.c
fs/ramfs : inode.c
fs/reiserfs : bitmap.c dir.c do_balan.c file.c fix_node.c
ibalance.c inode.c ioctl.c item_ops.c journal.c
namei.c prints.c stree.c super.c xattr.c
xattr_acl.c
fs/romfs : inode.c
fs/smbfs : file.c inode.c proc.c proto.h request.c
fs/sysfs : bin.c dir.c mount.c sysfs.h
fs/sysv : dir.c ialloc.c itree.c namei.c
fs/udf : ialloc.c inode.c namei.c super.c udfdecl.h
fs/ufs : dir.c ialloc.c inode.c namei.c truncate.c
fs/vfat : namei.c
fs/xfs/linux-2.6: xfs_super.c xfs_vfs.c
include/acpi : acconfig.h acdisasm.h aclocal.h acmacros.h
acobject.h acoutput.h acpi_bus.h acpi_drivers.h
acpixf.h actbl2.h amlcode.h amlresrc.h
processor.h
include/asm-alpha: hardirq.h pgalloc.h pgtable.h processor.h
spinlock.h
include/asm-arm: dma-mapping.h domain.h hardirq.h pgalloc.h
pgtable.h processor.h smp.h spinlock.h
include/asm-arm/arch-iop3xx: hardware.h iop321.h iop331-irqs.h
iop331.h iq31244.h iq80321.h
iq80331.h timex.h uncompress.h
vmalloc.h
include/asm-arm/arch-ixp2000: ixp2000-regs.h system.h
include/asm-arm/arch-ixp4xx: hardware.h irqs.h ixp4xx-regs.h
platform.h
include/asm-arm/arch-omap: dma.h gpio.h hardware.h irqs.h mux.h
omap16xx.h
include/asm-arm/arch-pxa: memory.h pxa-regs.h ssp.h
include/asm-arm/arch-rpc: io.h
include/asm-arm/arch-s3c2410: timex.h
include/asm-arm/hardware: amba_clcd.h
include/asm-arm26: atomic.h bitops.h checksum.h hardirq.h
hardware.h irqchip.h pgtable.h posix_types.h
processor.h setup.h system.h thread_info.h
tlb.h uaccess.h unistd.h
include/asm-cris: hardirq.h pgalloc.h pgtable.h
include/asm-generic: sections.h siginfo.h tlb.h
include/asm-h8300: hardirq.h pgtable.h processor.h unistd.h
include/asm-i386: acpi.h agp.h bug.h cpu.h cpufeature.h fixmap.h
highmem.h kprobes.h mca.h mmzone.h page.h
pgalloc.h pgtable-2level-defs.h
pgtable-2level.h pgtable-3level.h pgtable.h
processor.h ptrace.h smp.h spinlock.h string.h
system.h topology.h uaccess.h
include/asm-i386/mach-numaq: mach_apic.h
include/asm-ia64: acpi.h cpu.h hw_irq.h io.h iosapic.h mmzone.h
nodedata.h numa.h pgalloc.h pgtable.h
sections.h spinlock.h system.h tlb.h
topology.h unistd.h
include/asm-m32r: assembler.h atomic.h bitops.h elf.h hardirq.h
irq.h mmu_context.h pgalloc.h pgtable-2level.h
pgtable.h processor.h semaphore.h smp.h
system.h thread_info.h unistd.h
include/asm-m68k: hardirq.h motorola_pgalloc.h pgtable.h
include/asm-m68knommu: atomic.h bitops.h elf.h hardirq.h
m5206sim.h m5249sim.h m527xsim.h
m528xsim.h page.h pgtable.h processor.h
thread_info.h
include/asm-mips: compat.h pgalloc.h pgtable.h processor.h
sections.h spinlock.h unistd.h
include/asm-parisc: hardirq.h pgalloc.h pgtable.h processor.h
spinlock.h system.h unistd.h
include/asm-ppc: gg2.h highmem.h ibm44x.h io.h mmu.h open_pic.h
pci-bridge.h pgtable.h ppc4xx_pic.h processor.h
reg_booke.h sections.h serial.h signal.h
spinlock.h uaccess.h unistd.h
include/asm-ppc64: bug.h cache.h hardirq.h iommu.h machdep.h
mmu.h naca.h paca.h page.h pci-bridge.h
pgtable.h ppcdebug.h processor.h prom.h
rtas.h spinlock.h sstep.h system.h
systemcfg.h time.h topology.h unistd.h xics.h
include/asm-ppc64/iSeries: HvReleaseData.h LparData.h
include/asm-s390: cio.h hardirq.h lowcore.h pgtable.h spinlock.h
system.h timer.h unistd.h
include/asm-sh : hardirq.h pgalloc.h pgtable.h processor.h
spinlock.h
include/asm-sh/mpc1211: keyboard.h
include/asm-sh64: keyboard.h pgalloc.h pgtable.h processor.h
include/asm-sparc: asi.h bitext.h floppy.h hardirq.h highmem.h
io.h pcic.h pgtable.h processor.h sbus.h
spinlock.h string.h unistd.h winmacro.h
include/asm-sparc64: hardirq.h kprobes.h pgalloc.h pgtable.h
processor.h sections.h siginfo.h spinlock.h
unistd.h
include/asm-um : archparam-i386.h archparam-ppc.h elf.h fixmap.h
page.h pgalloc.h pgtable.h processor-i386.h
ptrace-generic.h thread_info.h uaccess.h
unistd.h
include/asm-v850: hardirq.h pgtable.h processor.h
include/asm-x86_64: acpi.h agp.h cacheflush.h calling.h
cpufeature.h e820.h hardirq.h hw_irq.h
ia32.h ia32_unistd.h io.h kdebug.h kprobes.h
mce.h mmu_context.h mmzone.h msr.h numa.h
numnodes.h page.h pda.h pgalloc.h pgtable.h
processor.h proto.h smp.h spinlock.h
system.h topology.h uaccess.h unistd.h
include/linux : ac97_codec.h acct.h acpi.h affs_fs.h amigaffs.h
arcdevice.h atalk.h binfmts.h bitops.h
bootmem.h cdrom.h coda.h coda_proc.h
coda_psdev.h com20020.h compat.h
console_struct.h cpu.h cpumask.h crypto.h
dcache.h delay.h device.h edd.h efs_vh.h elf.h
etherdevice.h ext3_fs.h ext3_fs_i.h ext3_jbd.h
fb.h fs.h generic_serial.h genhd.h gfp.h
hardirq.h highmem.h i2c-id.h ide.h if_arcnet.h
if_ether.h if_tun.h init.h init_task.h input.h
interrupt.h ip.h ipmi.h ipv6.h isicom.h jbd.h
jffs2.h jffs2_fs_sb.h jiffies.h kernel.h
kernel_stat.h kobject.h libata.h list.h lp.h
mca-legacy.h mca.h miscdevice.h mm.h mmzone.h
module.h mv643xx.h net.h netlink.h nfs_fs.h
nfs_xdr.h oprofile.h page-flags.h parport_pc.h
pci.h pci_ids.h personality.h pipe_fs_i.h
pkt_cls.h pm.h prctl.h preempt.h prio_tree.h
proc_fs.h ptrace.h quota.h quotaops.h random.h
rcupdate.h reiserfs_acl.h reiserfs_fs.h
reiserfs_fs_sb.h sched.h security.h selection.h
sem.h serio.h skbuff.h slab.h smp.h smp_lock.h
spinlock.h suspend.h syscalls.h sysctl.h
sysfs.h tcp.h time.h topology.h udp.h usb.h
usb_ch9.h vmalloc.h
include/linux/mmc: mmc.h
include/linux/mtd: cfi.h doc2000.h flashchip.h gen_probe.h map.h
nand.h
include/linux/netfilter_bridge: ebtables.h
include/linux/netfilter_ipv4: ip_conntrack.h ip_nat.h
ip_tables.h ipt_MARK.h
ipt_multiport.h
include/linux/nfsd: state.h xdr4.h
include/linux/raid: linear.h
include/linux/sunrpc: auth.h cache.h gss_asn1.h sched.h xdr.h
xprt.h
include/mtd : mtd-abi.h
include/net : act_api.h ax25.h icmp.h if_inet6.h ip.h
ip_fib.h ipconfig.h ipx.h llc_c_ac.h llc_c_ev.h
llc_conn.h llc_pdu.h llc_sap.h pkt_cls.h rose.h
route.h snmp.h tcp.h tcp_ecn.h x25.h xfrm.h
include/net/irda: ircomm_event.h ircomm_lmp.h ircomm_param.h
ircomm_ttp.h ircomm_tty.h ircomm_tty_attach.h
irda_device.h iriap.h irlan_client.h
irlan_common.h irlap.h irlap_frame.h irlmp.h
irttp.h parameters.h qos.h
include/net/sctp: sctp.h
include/pcmcia : bulkmem.h ciscode.h cisreg.h cistpl.h cs.h
cs_types.h ds.h mem_op.h ss.h
include/rxrpc : call.h packet.h transport.h
include/scsi : scsi_host.h scsi_tcq.h scsi_transport.h
scsi_transport_fc.h
include/sound : ac97_codec.h ad1848.h ainstr_fm.h ainstr_gf1.h
ainstr_iw.h ainstr_simple.h ak4531_codec.h
asound.h control.h core.h cs4231.h cs8427.h
emu10k1.h es1688.h gus.h info.h pcm.h rawmidi.h
sb.h seq_midi_emul.h snd_wavefront.h
soundfont.h trident.h version.h vx_core.h
ymfpci.h
include/video : permedia2.h
init : Kconfig Makefile initramfs.c main.c version.c
ipc : sem.c
kernel : acct.c audit.c auditsc.c capability.c compat.c
cpu.c dma.c exec_domain.c exit.c fork.c
intermodule.c itimer.c kallsyms.c kprobes.c
ksysfs.c kthread.c module.c params.c pid.c
posix-timers.c printk.c profile.c ptrace.c
rcupdate.c resource.c sched.c signal.c
softirq.c spinlock.c stop_machine.c sys.c
sysctl.c time.c timer.c user.c workqueue.c
kernel/irq : handle.c
kernel/power : swsusp.c
lib : Kconfig.debug Makefile kernel_lock.c
kobject_uevent.c string.c
lib/reed_solomon: reed_solomon.c
mm : Makefile bootmem.c filemap.c fremap.c highmem.c
hugetlb.c memory.c mempolicy.c mlock.c mmap.c
mprotect.c mremap.c msync.c nommu.c oom_kill.c
page_alloc.c pdflush.c prio_tree.c readahead.c
rmap.c shmem.c slab.c swapfile.c thrash.c
truncate.c vmalloc.c vmscan.c
net : socket.c
net/appletalk : aarp.c atalk_proc.c ddp.c
net/ax25 : af_ax25.c ax25_addr.c ax25_ds_subr.c
net/bridge/netfilter: Kconfig Makefile ebt_log.c ebtables.c
net/core : dev.c rtnetlink.c skbuff.c sock.c
net/ethernet : eth.c
net/ipv4 : Kconfig af_inet.c arp.c datagram.c devinet.c
fib_frontend.c fib_hash.c fib_lookup.h
fib_rules.c fib_semantics.c icmp.c igmp.c
ip_gre.c ip_output.c ip_sockglue.c ipconfig.c
raw.c route.c syncookies.c tcp.c tcp_diag.c
tcp_input.c tcp_ipv4.c tcp_minisocks.c
tcp_output.c tcp_timer.c udp.c xfrm4_policy.c
net/ipv4/ipvs : ip_vs_app.c ip_vs_conn.c ip_vs_ctl.c
ip_vs_proto.c ip_vs_proto_icmp.c ip_vs_sync.c
net/ipv4/netfilter: Kconfig Makefile arp_tables.c
ip_conntrack_core.c
ip_conntrack_proto_sctp.c
ip_conntrack_proto_tcp.c
ip_conntrack_standalone.c ip_nat_amanda.c
ip_nat_core.c ip_nat_ftp.c ip_nat_helper.c
ip_nat_irc.c ip_nat_proto_tcp.c
ip_nat_proto_udp.c ip_nat_rule.c
ip_nat_standalone.c ip_nat_tftp.c
ip_tables.c ipt_ECN.c ipt_MARK.c
ipt_MASQUERADE.c ipt_NETMAP.c ipt_REDIRECT.c
ipt_REJECT.c ipt_SAME.c ipt_multiport.c
ipt_recent.c
net/ipv6 : addrconf.c af_inet6.c datagram.c ip6_output.c
ipv6_sockglue.c ndisc.c raw.c tcp_ipv6.c udp.c
net/ipv6/netfilter: ip6_tables.c
net/ipx : af_ipx.c ipx_proc.c
net/irda : af_irda.c discovery.c irda_device.c iriap.c
irias_object.c irlap.c irlap_event.c
irlap_frame.c irlmp.c irmod.c irsysctl.c
irttp.c parameters.c qos.c
net/irda/ircomm: ircomm_core.c ircomm_event.c ircomm_lmp.c
ircomm_param.c ircomm_ttp.c ircomm_tty.c
ircomm_tty_attach.c ircomm_tty_ioctl.c
net/irda/irlan : irlan_client.c irlan_common.c irlan_provider.c
net/irda/irnet : irnet.h irnet_ppp.c irnet_ppp.h
net/key : af_key.c
net/llc : llc_c_ac.c llc_c_ev.c llc_conn.c llc_core.c
llc_if.c llc_pdu.c llc_proc.c llc_sap.c
llc_station.c
net/netlink : af_netlink.c
net/netrom : af_netrom.c nr_route.c
net/packet : af_packet.c
net/rose : af_rose.c rose_link.c rose_route.c rose_subr.c
net/rxrpc : call.c connection.c internal.h peer.c
rxrpc_syms.c transport.c
net/sched : Kconfig act_api.c cls_u32.c gact.c police.c
sch_api.c sch_dsmark.c sch_generic.c sch_htb.c
sch_ingress.c sch_prio.c
net/sctp : input.c ipv6.c protocol.c
net/sunrpc : auth.c cache.c clnt.c pmap_clnt.c rpc_pipe.c
sched.c sunrpc_syms.c svcauth.c svcauth_unix.c
svcsock.c xdr.c xprt.c
net/sunrpc/auth_gss: auth_gss.c gss_generic_token.c
gss_krb5_crypto.c gss_krb5_mech.c
gss_spkm3_mech.c svcauth_gss.c
net/unix : af_unix.c sysctl_net_unix.c
net/x25 : af_x25.c sysctl_net_x25.c x25_dev.c
x25_facilities.c x25_in.c x25_link.c x25_out.c
x25_proc.c x25_subr.c x25_timer.c
net/xfrm : xfrm_algo.c xfrm_export.c xfrm_policy.c
xfrm_state.c xfrm_user.c
scripts : Makefile.build gen_initramfs_list.sh kallsyms.c
ver_linux
scripts/kconfig: gconf.c gconf.glade
security : Kconfig commoncap.c dummy.c security.c
security/selinux: Kconfig avc.c hooks.c selinuxfs.c
security/selinux/include: av_inherit.h av_perm_to_string.h
av_permissions.h avc.h
class_to_string.h
common_perm_to_string.h flask.h
objsec.h
security/selinux/ss: avtab.c conditional.c ebitmap.c mls.c
policydb.c policydb.h services.c
sound : Kconfig
sound/arm : sa11xx-uda1341.c
sound/core : Kconfig control.c hwdep.c info.c init.c
memory.c pcm.c pcm_lib.c pcm_memory.c
pcm_native.c rawmidi.c sgbuf.c sound.c timer.c
sound/core/ioctl32: hwdep32.c ioctl32.c ioctl32.h pcm32.c
rawmidi32.c seq32.c timer32.c
sound/core/oss : mixer_oss.c mulaw.c pcm_oss.c pcm_plugin.c
pcm_plugin.h rate.c route.c
sound/core/seq : Makefile seq_clientmgr.c seq_clientmgr.h
seq_instr.c seq_memory.c seq_memory.h
seq_midi.c seq_midi_emul.c seq_midi_event.c
sound/core/seq/instr: ainstr_fm.c ainstr_gf1.c ainstr_iw.c
ainstr_simple.c
sound/core/seq/oss: seq_oss_device.h seq_oss_init.c
seq_oss_readq.c seq_oss_timer.c
sound/drivers/opl3: Makefile opl3_drums.c opl3_lib.c opl3_midi.c
opl3_seq.c
sound/drivers/opl4: opl4_lib.c
sound/drivers/vx: vx_cmd.c vx_cmd.h vx_core.c vx_hwdep.c
vx_pcm.c vx_uer.c
sound/i2c : cs8427.c i2c.c
sound/i2c/l3 : uda1341.c
sound/i2c/other: ak4117.c
sound/isa : als100.c es18xx.c opl3sa2.c sscape.c
sound/isa/ad1816a: ad1816a_lib.c
sound/isa/ad1848: ad1848_lib.c
sound/isa/cs423x: cs4231_lib.c cs4236.c
sound/isa/es1688: es1688_lib.c
sound/isa/gus : gus_dma.c gus_mem.c gus_sample.c
sound/isa/opti9xx: opti92x-ad1848.c
sound/isa/sb : emu8000.c emu8000_callback.c emu8000_pcm.c
sb16_main.c sb8_main.c sb_common.c
sound/isa/wavefront: wavefront.c wavefront_fx.c
wavefront_synth.c
sound/oss : ac97.c ac97.h ac97_codec.c aci.c ad1816.c
ad1848.c ad1889.c adlib_card.c aedsp16.c
ali5455.c awe_wave.c btaudio.c cmpci.c cs4232.c
cs46xx.c cs46xx_wrapper-24.h cs46xxpm-24.h
es1370.c es1371.c forte.c gus_card.c gus_wave.c
i810_audio.c mad16.c maestro.c maestro3.c
maestro3.h maui.c mpu401.c msnd_pinnacle.c
nm256_audio.c opl3.c opl3sa.c opl3sa2.c
pas2_card.c pss.c rme96xx.c sb.h sb_card.c
sb_common.c sb_ess.c sequencer.c sgalaxy.c
sonicvibes.c soundcard.c sscape.c trident.c
trix.c uart401.c uart6850.c via82cxxx_audio.c
vwsnd.c wavfront.c ymfpci.c
sound/oss/cs4281: cs4281_wrapper-24.c cs4281m.c cs4281pm-24.c
sound/oss/emu10k1: audio.c audio.h cardmi.c cardmi.h cardwi.c
efxmgr.c hwaccess.c hwaccess.h main.c
voicemgr.c
sound/pci : Kconfig Makefile atiixp.c atiixp_modem.c
azt3328.c bt87x.c cmipci.c cs4281.c ens1370.c
es1938.c es1968.c fm801.c intel8x0.c
intel8x0m.c maestro3.c rme32.c rme96.c
sonicvibes.c via82xx.c
sound/pci/ac97 : ac97_codec.c ac97_local.h ac97_patch.c
ac97_pcm.c ac97_proc.c ak4531_codec.c
sound/pci/ali5451: ali5451.c
sound/pci/au88x0: au88x0.c au88x0.h au88x0_core.c au88x0_eq.c
au88x0_mixer.c au88x0_pcm.c
sound/pci/cs46xx: cs46xx_lib.c cs46xx_lib.h dsp_spos.c
dsp_spos_scb_lib.c
sound/pci/cs46xx/imgs: cwcdma.h
sound/pci/emu10k1: Makefile emu10k1.c emu10k1_main.c
emu10k1_synth.c emufx.c emumixer.c emupcm.c
emuproc.c io.c irq.c
sound/pci/ice1712: ak4xxx.c aureon.c aureon.h delta.c ice1712.h
ice1724.c
sound/pci/korg1212: korg1212.c
sound/pci/mixart: mixart.c mixart_core.c mixart_hwdep.c
mixart_hwdep.h
sound/pci/nm256: nm256.c
sound/pci/rme9652: hdsp.c rme9652.c
sound/pci/trident: trident_main.c trident_memory.c
trident_synth.c
sound/pci/vx222: vx222.c vx222_ops.c
sound/pci/ymfpci: ymfpci_main.c
sound/pcmcia/pdaudiocf: pdaudiocf.c pdaudiocf.h pdaudiocf_core.c
sound/pcmcia/vx: vx_entry.c vxp_ops.c vxpocket.c vxpocket.h
sound/ppc : pmac.c
sound/sparc : cs4231.c
sound/synth/emux: emux.c emux_seq.c emux_synth.c soundfont.c
sound/usb : Kconfig usbaudio.c usbmidi.c usbmixer.c
sound/usb/usx2y: Makefile usX2Yhwdep.c usbusx2y.c usbusx2y.h
usbusx2yaudio.c usx2y.h
usr : Makefile gen_init_cpio.c
Added files:
Documentation : README.cycladesZ feature-removal-schedule.txt
sparse.txt
Documentation/aoe: aoe.txt autoload.sh mkdevs.sh mkshelf.sh
status.sh
Documentation/filesystems: sysfs-pci.txt
Documentation/fujitsu/frv: README.txt atomic-ops.txt booting.txt
clock.txt configuring.txt
features.txt gdbinit gdbstub.txt
mmu-layout.txt
Documentation/i2c/chips: smsc47b397.txt
Documentation/infiniband: ipoib.txt sysfs.txt user_mad.txt
Documentation/powerpc: cpu_features.txt
Documentation/scsi: ChangeLog.1992-1997
Documentation/sound/alsa: Bt87x.txt
Documentation/w1: w1.generic
arch/arm/boot/compressed: head-sharpsl.S
arch/arm/common: scoop.c
arch/arm/configs: iq80332_defconfig
arch/arm/kernel: smp.c
arch/arm/mach-iop3xx: iq80332-mm.c iq80332-pci.c
arch/arm/mach-pxa: corgi.c
arch/arm26/kernel: calls.S head.S
arch/arm26/lib : io-readsl.S io-readsw.S io-writesw.S
arch/arm26/machine: latches.c
arch/arm26/mm : memc.c small_page.c
arch/frv : Kconfig Makefile
arch/frv/boot : Makefile
arch/frv/kernel: Makefile break.S cmode.S debug-stub.c dma.c
entry-table.S entry.S frv_ksyms.c gdb-io.c
gdb-io.h gdb-stub.c head-mmu-fr451.S
head-uc-fr401.S head-uc-fr451.S head-uc-fr555.S
head.S head.inc init_task.c irq-mb93091.c
irq-mb93093.c irq-mb93493.c irq-routing.c irq.c
kernel_thread.S local.h pm-mb93093.c pm.c
process.c ptrace.c semaphore.c setup.c signal.c
sleep.S switch_to.S sys_frv.c sysctl.c time.c
traps.c uaccess.c vmlinux.lds.S
arch/frv/lib : Makefile __ashldi3.S __ashrdi3.S __lshrdi3.S
__muldi3.S __negdi2.S atomic-ops.S cache.S
checksum.c insl_ns.S insl_sw.S memcpy.S
memset.S outsl_ns.S outsl_sw.S
arch/frv/mb93090-mb00: Makefile pci-dma-nommu.c pci-dma.c
pci-frv.c pci-frv.h pci-irq.c pci-vdk.c
arch/frv/mm : Makefile cache-page.c dma-alloc.c elf-fdpic.c
extable.c fault.c highmem.c init.c kmap.c
mmu-context.c pgalloc.c tlb-flush.S tlb-miss.S
unaligned.c
arch/i386/oprofile: backtrace.c
arch/ia64/kernel: topology.c
arch/ia64/oprofile: backtrace.c
arch/m68knommu/platform/5307: head.S
arch/ppc/boot/include: mpsc_defs.h
arch/ppc/boot/simple: misc-chestnut.S misc-cpci690.c
misc-katana.c misc-mv64x60.S
mv64x60_stub.c mv64x60_tty.c
arch/ppc/configs: chestnut_defconfig cpci690_defconfig
katana_defconfig
arch/ppc/kernel: perfmon.c perfmon_fsl_booke.c
arch/ppc/oprofile: common.c op_impl.h op_model_fsl_booke.c
arch/ppc/platforms: chestnut.c chestnut.h cpci690.c cpci690.h
ev64260.c katana.c katana.h
arch/ppc/syslib: mv64360_pic.c mv64x60.c mv64x60_dbg.c
mv64x60_win.c ppc403_pic.c
arch/ppc64/kernel: kprobes.c pci_direct_iommu.c
arch/ppc64/xmon: setjmp.S
arch/um : Kconfig_arch Kconfig_i386 Kconfig_x86_64
arch/um/drivers: stderr_console.c
arch/um/include: elf_user.h registers.h
arch/um/include/sysdep-i386: signal.h
arch/um/include/sysdep-x86_64: checksum.h ptrace.h ptrace_user.h
sigcontext.h signal.h syscalls.h
arch/um/kernel/skas/util: mk_ptregs-i386.c mk_ptregs-x86_64.c
arch/um/os-Linux: elf_aux.c signal.c
arch/um/os-Linux/sys-i386: Makefile registers.c
arch/um/os-Linux/sys-x86_64: Makefile registers.c
arch/um/sys-i386: delay.c signal.c
arch/um/sys-x86_64: Makefile bugs.c delay.c fault.c mem.c
ptrace.c ptrace_user.c sigcontext.c signal.c
syscalls.c sysrq.c
arch/um/sys-x86_64/util: Makefile mk_sc.c mk_thread_kern.c
mk_thread_user.c
arch/x86_64/kernel: mce_intel.c
arch/x86_64/mm : srat.c
drivers/acpi : container.c processor_core.c processor_idle.c
processor_perflib.c processor_thermal.c
processor_throttling.c
drivers/block/aoe: Makefile aoe.h aoeblk.c aoechr.c aoecmd.c
aoedev.c aoemain.c aoenet.c
drivers/char/drm: ati_pcigart.c drm_agpsupport.c drm_auth.c
drm_bufs.c drm_context.c drm_dma.c
drm_drawable.c drm_drv.c drm_fops.c drm_init.c
drm_ioctl.c drm_irq.c drm_lock.c drm_memory.c
drm_proc.c drm_scatter.c drm_stub.c drm_vm.c
tdfx_drv.h
drivers/crypto : Kconfig Makefile padlock-aes.c
padlock-generic.c padlock.h
drivers/i2c/chips: smsc47b397.c
drivers/infiniband: Kconfig Makefile
drivers/infiniband/core: Makefile agent.c agent.h agent_priv.h
cache.c core_priv.h device.c fmr_pool.c
mad.c mad_priv.h packer.c sa_query.c
smi.c smi.h sysfs.c ud_header.c
user_mad.c verbs.c
drivers/infiniband/hw/mthca: Kconfig Makefile mthca_allocator.c
mthca_av.c mthca_cmd.c mthca_cmd.h
mthca_config_reg.h mthca_cq.c
mthca_dev.h mthca_doorbell.h
mthca_eq.c mthca_mad.c mthca_main.c
mthca_mcg.c mthca_mr.c mthca_pd.c
mthca_profile.c mthca_profile.h
mthca_provider.c mthca_provider.h
mthca_qp.c mthca_reset.c
drivers/infiniband/include: ib_cache.h ib_fmr_pool.h ib_mad.h
ib_pack.h ib_sa.h ib_smi.h
ib_user_mad.h ib_verbs.h
drivers/infiniband/ulp/ipoib: Kconfig Makefile ipoib.h
ipoib_fs.c ipoib_ib.c ipoib_main.c
ipoib_multicast.c ipoib_verbs.c
ipoib_vlan.c
drivers/input/mouse: alps.c alps.h
drivers/input/serio: i8042-x86ia64io.h libps2.c
drivers/md : raid6altivec.uc
drivers/mtd/devices: block2mtd.c
drivers/mtd/maps: chestnut.c sharpsl-flash.c walnut.c
drivers/mtd/nand: nandsim.c sharpsl.c
drivers/net/arcnet: capmode.c
drivers/net/sk98lin: skethtool.c
drivers/pcmcia : rsrc_nonstatic.c
drivers/s390/char: sclp_quiesce.c
drivers/scsi : scsi_transport_iscsi.c
drivers/usb/media: sn9c102_hv7131d.c sn9c102_mi0343.c
drivers/usb/serial: garmin_gps.c ti_fw_3410.h ti_fw_5052.h
ti_usb_3410_5052.c ti_usb_3410_5052.h
fs : binfmt_elf_fdpic.c
fs/affs : affs.h
fs/debugfs : Makefile file.c inode.c
fs/nfsd : nfs4callback.c
fs/proc : internal.h mmu.c nommu.c
include/acpi : container.h
include/asm-alpha: cputime.h
include/asm-arm: cpu.h cputime.h
include/asm-arm/arch-cl7500: entry-macro.S
include/asm-arm/arch-clps711x: entry-macro.S
include/asm-arm/arch-ebsa110: entry-macro.S
include/asm-arm/arch-ebsa285: entry-macro.S
include/asm-arm/arch-epxa10db: entry-macro.S
include/asm-arm/arch-h720x: entry-macro.S
include/asm-arm/arch-imx: entry-macro.S
include/asm-arm/arch-integrator: entry-macro.S
include/asm-arm/arch-iop3xx: entry-macro.S iq80332.h
include/asm-arm/arch-ixp2000: entry-macro.S
include/asm-arm/arch-ixp4xx: entry-macro.S
include/asm-arm/arch-l7200: entry-macro.S
include/asm-arm/arch-lh7a40x: entry-macro.S
include/asm-arm/arch-omap: entry-macro.S
include/asm-arm/arch-pxa: corgi.h entry-macro.S
include/asm-arm/arch-rpc: entry-macro.S
include/asm-arm/arch-s3c2410: entry-macro.S
include/asm-arm/arch-sa1100: entry-macro.S
include/asm-arm/arch-shark: entry-macro.S
include/asm-arm/arch-versatile: entry-macro.S
include/asm-arm/hardware: entry-macro-iomd.S scoop.h
include/asm-arm26: cputime.h dma-mapping.h
include/asm-cris: cputime.h
include/asm-frv: a.out.h atomic.h ax88796.h bitops.h bug.h
bugs.h busctl-regs.h byteorder.h cache.h
cacheflush.h checksum.h cpu-irqs.h cpumask.h
cputime.h current.h delay.h div64.h dm9000.h
dma-mapping.h dma.h elf.h errno.h fcntl.h fpu.h
gdb-stub.h gpio-regs.h hardirq.h highmem.h
hw_irq.h ide.h init.h io.h ioctl.h ioctls.h
ipc.h ipcbuf.h irc-regs.h irq-routing.h irq.h
kmap_types.h linkage.h local.h math-emu.h
mb-regs.h mb86943a.h mb93091-fpga-irqs.h
mb93093-fpga-irqs.h mb93493-irqs.h
mb93493-regs.h mem-layout.h mman.h mmu.h
mmu_context.h module.h msgbuf.h namei.h page.h
param.h pci.h percpu.h pgalloc.h pgtable.h
poll.h posix_types.h processor.h ptrace.h
registers.h resource.h scatterlist.h sections.h
segment.h semaphore.h sembuf.h serial-regs.h
serial.h setup.h shmbuf.h shmparam.h
sigcontext.h siginfo.h signal.h smp.h socket.h
sockios.h spinlock.h spr-regs.h stat.h statfs.h
string.h suspend.h system.h termbits.h
termios.h thread_info.h timer-regs.h timex.h
tlb.h tlbflush.h topology.h types.h uaccess.h
ucontext.h unaligned.h unistd.h user.h
virtconvert.h
include/asm-generic: 4level-fixup.h cputime.h pgtable-nopmd.h
pgtable-nopud.h termios.h
include/asm-h8300: cputime.h
include/asm-i386: cputime.h
include/asm-ia64: cputime.h
include/asm-m32r: cputime.h
include/asm-m68k: cputime.h
include/asm-m68knommu: cputime.h mcfcache.h
include/asm-mips: cputime.h
include/asm-parisc: cputime.h
include/asm-ppc: cputime.h mv64x60.h mv64x60_defs.h perfmon.h
include/asm-ppc64: cputime.h kdebug.h kprobes.h lppaca.h
include/asm-s390: cputime.h
include/asm-sh : cputime.h
include/asm-sh64: cputime.h
include/asm-sparc: cputime.h
include/asm-sparc64: cputime.h
include/asm-um : apic.h archparam-x86_64.h calling.h cputime.h
dwarf2.h module-x86_64.h pda.h pgtable-2level.h
pgtable-3level.h prctl.h processor-x86_64.h
ptrace-x86_64.h sigcontext-x86_64.h
system-x86_64.h vm-flags-i386.h
vm-flags-x86_64.h
include/asm-v850: cputime.h
include/asm-x86_64: cputime.h
include/linux : debugfs.h elf-fdpic.h if_infiniband.h libps2.h
include/linux/mtd: xip.h
include/linux/netfilter_bridge: ebt_ulog.h
include/scsi : scsi_transport_iscsi.h
init : calibrate.c
lib : find_next_bit.c prio_tree.c
mm : internal.h
net/bridge/netfilter: ebt_ulog.c
sound/pci : via82xx_modem.c
sound/pci/ca0106: Makefile ca0106.h ca0106_main.c ca0106_mixer.c
ca0106_proc.c
sound/pci/emu10k1: emu10k1x.c timer.c
sound/usb/usx2y: usx2yhwdeppcm.c usx2yhwdeppcm.h
Removed files:
Documentation : README.moxa mkdev.cciss
Documentation/filesystems: umsdos.txt
Documentation/i2c: i2c-old-porting
Documentation/scsi: ChangeLog
arch/arm26/boot/compressed: ofw-shark.c
arch/arm26/kernel: time-acorn.c
arch/arm26/lib : io-readsl-armv3.S io-readsw-armv3.S
io-writesw-armv3.S
arch/arm26/machine: head.S oldlatches.c small_page.c
arch/arm26/mm : mm-memc.c
arch/ia64/dig : topology.c
arch/m68k/apollo: dn_debug.c
arch/m68k/sun3x: sun3x_ksyms.c
arch/ppc : defconfig
arch/ppc/boot/simple: gt64260_tty.c
arch/ppc/oprofile: init.c
arch/ppc/platforms: ev64260_setup.c
arch/ppc/syslib: gt64260_common.c
arch/ppc64/kernel: pci_dma_direct.c
arch/ppc64/xmon: setjmp.c
arch/s390/kernel: compat_exec.c
arch/um/include: frame.h frame_user.h
arch/um/include/sysdep-i386: frame.h frame_kern.h frame_user.h
arch/um/kernel : frame.c frame_kern.c
arch/um/kernel/skas/include: ptrace-skas.h
arch/um/kernel/skas/sys-i386: Makefile sigcontext.c
arch/um/kernel/skas/util: mk_ptregs.c
arch/um/kernel/tt/include: ptrace-tt.h
arch/um/kernel/tt/sys-i386: Makefile sigcontext.c
arch/x86_64/kernel: warmreboot.S
arch/x86_64/lib: old-checksum.c
drivers/acpi : processor.c
drivers/char : README.cycladesZ rsf16fmi.h
drivers/char/drm: ati_pcigart.h drm_agpsupport.h drm_auth.h
drm_bufs.h drm_context.h drm_dma.h
drm_drawable.h drm_drv.h drm_fops.h drm_init.h
drm_ioctl.h drm_irq.h drm_lock.h drm_proc.h
drm_scatter.h drm_stub.h drm_vm.h tdfx.h
drivers/char/ip2: Makefile ip2mkdev.c ip2stat.c ip2trace.c
drivers/char/rio: cdproto.h
drivers/mtd/devices: doc1000.c
drivers/net : net_init.c
drivers/pcmcia : bulkmem.c
drivers/scsi : scsi_syms.c
drivers/scsi/qla2xxx: ql6322.c ql6322_fw.c
drivers/usb/misc: tiglusb.c tiglusb.h
fs/jfs : jfs_defragfs.h
fs/smbfs : ChangeLog
fs/umsdos : Makefile README-WIP.txt dir.c emd.c inode.c
ioctl.c mangle.c namei.c rdir.c specs
include/asm-arm26: calls.h ian_char.h
include/asm-m68k: adb_mouse.h atari_SCCserial.h
include/asm-m68knommu: keyboard.h nap.h
include/asm-ppc64/iSeries: ItLpPaca.h
include/linux : affs_fs_i.h affs_fs_sb.h blk.h umsdos_fs.h
umsdos_fs.p umsdos_fs_i.h
include/linux/netfilter_ipv4: compat_firewall.h ipchains_core.h
ipfwadm_core.h
include/sound : soundmem.h
net/ipv4/netfilter: ip_fw_compat.c ip_fw_compat.h
ip_fw_compat_masq.c ip_fw_compat_redir.c
ipchains_core.c ipfwadm_core.c
net/sunrpc : svcauth_des.c
net/sunrpc/auth_gss: gss_pseudoflavors.c sunrpcgss_syms.c
sound/core/seq/oss: seq_oss_misc.c
sound/oss : cs4232.h
Log message:
Merge with Linux 2.6.11-rc1.
diff -urN linux/CREDITS linux/CREDITS
--- linux/CREDITS 2004/11/15 11:49:12 1.135
+++ linux/CREDITS 2005/01/13 14:05:14 1.136
@@ -1893,7 +1893,7 @@
D: Bug fixes
N: Paul Laufer
-E: pelaufer@csupomona.edu
+E: paul@laufernet.com
D: Soundblaster driver fixes, ISAPnP quirk
S: California, USA
@@ -2021,6 +2021,15 @@
E: hjl@gnu.ai.mit.edu
D: GCC + libraries hacker
+N: Michal Ludvig
+E: michal@logix.cz
+W: http://www.logix.cz/michal
+P: 1024D/C45B2218 1162 6471 D391 76E0 9F99 29DA 0C3A 2509 C45B 2218
+D: VIA PadLock driver
+D: Netfilter pkttype module
+S: Prague 4
+S: Czech Republic
+
N: Tuomas J. Lukka
E: Tuomas.Lukka@Helsinki.FI
D: Original dual-monitor patches
@@ -3335,7 +3344,7 @@
D: Atari Falcon chipset IDE
D: Amiga Gayle chipset IDE
D: mipsel NEC DDB Vrc-5074
-S: Holsbeeksesteenweg 166
+S: Emiel Vlieberghlaan 2A/21
S: B-3010 Kessel-Lo
S: Belgium
@@ -3569,7 +3578,6 @@
N: David Woodhouse
E: dwmw2@infradead.org
-E: dwmw2@redhat.com
D: ARCnet stuff, Applicom board driver, SO_BINDTODEVICE,
D: some Alpha platform porting from 2.0, Memory Technology Devices,
D: Acquire watchdog timer, PC speaker driver maintenance,
diff -urN linux/MAINTAINERS linux/MAINTAINERS
--- linux/MAINTAINERS 2004/12/27 02:15:47 1.172
+++ linux/MAINTAINERS 2005/01/13 14:05:14 1.173
@@ -287,6 +287,11 @@
M: linux@treblig.org
S: Maintained
+ARM/CORGI MACHINE SUPPORT
+P: Richard Purdie
+M: rpurdie@rpsys.net
+S: Maintained
+
ARM/PLEB SUPPORT
P: Peter Chubb
M: pleb@gelato.unsw.edu.au
@@ -313,6 +318,20 @@
W: http://www.arm.linux.org.uk/
S: Maintained
+ARM/S3C2410 ARM ARCHITECTURE
+P: Ben Dooks
+M: ben-s3c2410@fluff.org
+L: linux-arm-kernel@lists.arm.linux.org.uk
+W: http://www.fluff.org/ben/linux/
+S: Maintained
+
+ARM/S3C2440 ARM ARCHITECTURE
+P: Ben Dooks
+M: ben-s3c2440@fluff.org
+L: linux-arm-kernel@lists.arm.linux.org.uk
+W: http://www.fluff.org/ben/linux/
+S: Maintained
+
ARPD SUPPORT
P: Jonathan Layes
L: linux-net@vger.kernel.org
@@ -328,6 +347,12 @@
W: http://julien.lerouge.free.fr
S: Maintained
+ATA OVER ETHERNET DRIVER
+P: Ed L. Cashin
+M: ecashin@coraid.com
+W: http://www.coraid.com/support/linux
+S: Supported
+
ATM
P: Chas Williams
M: chas@cmf.nrl.navy.mil
@@ -705,8 +730,8 @@
S: Maintained
DISKQUOTA:
-P: Marco van Wieringen
-M: mvw@planets.elm.net
+P: Jan Kara
+M: jack@suse.cz
L: linux-kernel@vger.kernel.org
S: Maintained
@@ -862,6 +887,11 @@
W: ftp://ftp.openlinux.org/pub/people/hch/vxfs
S: Maintained
+FUJITSU FR-V PORT
+P: David Howells
+M: dhowells@redhat.com
+S: Maintained
+
FTAPE/QIC-117
L: linux-tape@vger.kernel.org
W: http://sourceforge.net/projects/ftape
@@ -953,6 +983,11 @@
M: oliver@neukum.name
S: Maintained
+HUGETLB FILESYSTEM
+P: William Irwin
+M: wli@holomorphy.com
+S: Maintained
+
I2C AND SENSORS DRIVERS
P: Greg Kroah-Hartman
M: greg@kroah.com
@@ -988,8 +1023,8 @@
S: Maintained
IA64 (Itanium) PLATFORM
-P: David Mosberger-Tang
-M: davidm@hpl.hp.com
+P: Tony Luck
+M: tony.luck@intel.com
L: linux-ia64@vger.kernel.org
W: http://www.ia64-linux.org/
S: Maintained
@@ -1081,6 +1116,17 @@
L: linux-fbdev-devel@lists.sourceforge.net
S: Maintained
+INFINIBAND SUBSYSTEM
+P: Roland Dreier
+M: roland@topspin.com
+P: Sean Hefty
+M: mshefty@ichips.intel.com
+P: Hal Rosenstock
+M: halr@voltaire.com
+L: openib-general@openib.org
+W: http://www.openib.org/
+S: Supported
+
INPUT (KEYBOARD, MOUSE, JOYSTICK) DRIVERS
P: Vojtech Pavlik
M: vojtech@suse.cz
@@ -1140,13 +1186,6 @@
W: http://sourceforge.net/projects/e1000/
S: Supported
-INTERMEZZO FILE SYSTEM
-P: Cluster File Systems
-M: intermezzo-devel@lists.sf.net
-W: http://www.inter-mezzo.org/
-L: intermezzo-discuss@lists.sourceforge.net
-S: Maintained
-
IOC3 DRIVER
P: Ralf Baechle
M: ralf@linux-mips.org
@@ -1439,7 +1478,7 @@
MEMORY TECHNOLOGY DEVICES
P: David Woodhouse
-M: dwmw2@redhat.com
+M: dwmw2@infradead.org
W: http://www.linux-mtd.infradead.org/
L: linux-mtd@lists.infradead.org
S: Maintained
@@ -1568,7 +1607,6 @@
M: wensong@linux-vs.org
P: Julian Anastasov
M: ja@ssi.bg
-L: lvs-users@linuxvirtualserver.org
S: Maintained
NFS CLIENT
@@ -1713,7 +1751,6 @@
PCI HOTPLUG CORE
P: Greg Kroah-Hartman
M: greg@kroah.com
-M: gregkh@us.ibm.com
S: Supported
PCI HOTPLUG COMPAQ DRIVER
@@ -1842,9 +1879,7 @@
S: Maintained
RISCOM8 DRIVER
-P: Dmitry Gorodchanin
-L: linux-kernel@vger.kernel.org
-S: Maintained
+S: Orphan
RTLINUX REALTIME LINUX
P: Victor Yodaiken
@@ -2053,7 +2088,6 @@
SPECIALIX IO8+ MULTIPORT SERIAL CARD DRIVER
P: Roger Wolff
M: R.E.Wolff@BitWizard.nl
-M: io8-linux@specialix.co.uk
L: linux-kernel@vger.kernel.org ?
S: Supported
@@ -2210,13 +2244,6 @@
W: http://linux-udf.sourceforge.net
S: Maintained
-UMSDOS FILESYSTEM
-P: Matija Nalis
-M: Matija Nalis <mnalis-umsdos@voyager.hr>
-L: linux-kernel@vger.kernel.org
-W: http://linux.voyager.hr/umsdos/
-S: Maintained
-
UNIFORM CDROM DRIVER
P: Jens Axboe
M: axboe@suse.de
diff -urN linux/Makefile linux/Makefile
--- linux/Makefile 2004/12/27 02:15:47 1.241
+++ linux/Makefile 2005/01/13 14:05:14 1.242
@@ -1,7 +1,7 @@
VERSION = 2
PATCHLEVEL = 6
-SUBLEVEL = 10
-EXTRAVERSION =
+SUBLEVEL = 11
+EXTRAVERSION =-rc1
NAME=Woozy Numbat
# *DOCUMENTATION*
@@ -149,14 +149,13 @@
# careful not to include files twice if building in the source
# directory. LOCALVERSION from the command line override all of this
-ifeq ($(objtree),$(srctree))
-localversion-files := $(wildcard $(srctree)/localversion*)
-else
-localversion-files := $(wildcard $(objtree)/localversion*
$(srctree)/localversion*)
-endif
+localver := $(objtree)/localversion* $(srctree)/localversion*
+localver := $(sort $(wildcard $(localver)))
+# skip backup files (containing '~')
+localver := $(foreach f, $(localver), $(if $(findstring ~, $(f)),,$(f)))
LOCALVERSION = $(subst $(space),, \
- $(shell cat /dev/null $(localversion-files:%~=)) \
+ $(shell cat /dev/null $(localver)) \
$(patsubst "%",%,$(CONFIG_LOCALVERSION)))
KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)$(LOCALVERSION)
@@ -289,7 +288,7 @@
$(call cc-option, $(1),$(2))
# cc-option-yn
-# Usage: flag := $(call gcc-option-yn, -march=winchip-c6)
+# Usage: flag := $(call cc-option-yn, -march=winchip-c6)
cc-option-yn = $(shell if $(CC) $(CFLAGS) $(1) -S -o /dev/null -xc /dev/null \
> /dev/null 2>&1; then echo "y"; else echo "n"; fi;)
@@ -329,7 +328,10 @@
KALLSYMS = scripts/kallsyms
PERL = perl
CHECK = sparse
+
+NOSTDINC_FLAGS := -nostdinc -isystem $(shell $(CC) -print-file-name=include)
CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__
+CHECKFLAGS += $(NOSTDINC_FLAGS)
MODFLAGS = -DMODULE
CFLAGS_MODULE = $(MODFLAGS)
AFLAGS_MODULE = $(MODFLAGS)
@@ -337,7 +339,6 @@
CFLAGS_KERNEL =
AFLAGS_KERNEL =
-NOSTDINC_FLAGS = -nostdinc -iwithprefix include
# Use LINUXINCLUDE when you must reference the include/ directory.
# Needed to be compatible with the O= option
@@ -347,7 +348,8 @@
CPPFLAGS := -D__KERNEL__ $(LINUXINCLUDE)
CFLAGS := -Wall -Wstrict-prototypes -Wno-trigraphs \
- -fno-strict-aliasing -fno-common
+ -fno-strict-aliasing -fno-common \
+ -ffreestanding
AFLAGS := -D__ASSEMBLY__
export VERSION PATCHLEVEL SUBLEVEL EXTRAVERSION LOCALVERSION KERNELRELEASE \
@@ -387,7 +389,7 @@
# using a seperate output directory. This allows convinient use
# of make in output directory
outputmakefile:
- $(Q)if /usr/bin/env test ! $(srctree) -ef $(objtree); then \
+ $(Q)if test ! $(srctree) -ef $(objtree); then \
$(CONFIG_SHELL) $(srctree)/scripts/mkmakefile \
$(srctree) $(objtree) $(VERSION) $(PATCHLEVEL) \
> $(objtree)/Makefile; \
@@ -1164,7 +1166,7 @@
quiet_cmd_tags = MAKE $@
define cmd_tags
rm -f $@; \
- CTAGSF=`ctags --version | grep -i exuberant >/dev/null && echo "-I
__initdata,__exitdata,EXPORT_SYMBOL,EXPORT_SYMBOL_NOVERS"`; \
+ CTAGSF=`ctags --version | grep -i exuberant >/dev/null && echo "-I
__initdata,__exitdata,EXPORT_SYMBOL,EXPORT_SYMBOL_GPL"`; \
$(all-sources) | xargs ctags $$CTAGSF -a
endef
@@ -1208,6 +1210,9 @@
$(OBJDUMP) -d vmlinux $$(find . -name '*.ko') | \
$(PERL) $(src)/scripts/checkstack.pl $(ARCH)
+kernelrelease:
+ @echo $(KERNELRELEASE)
+
# FIXME Should go into a make.lib or something
# ===========================================================================
diff -urN linux/Documentation/README.cycladesZ
linux/Documentation/README.cycladesZ
--- linux/Documentation/README.cycladesZ 1970/01/01 00:00:00
+++ linux/Documentation/README.cycladesZ Thu Jan 13 14:05:14 2005
1.1
@@ -0,0 +1,8 @@
+
+The Cyclades-Z must have firmware loaded onto the card before it will
+operate. This operation should be performed during system startup,
+
+The firmware, loader program and the latest device driver code are
+available from Cyclades at
+ ftp://ftp.cyclades.com/pub/cyclades/cyclades-z/linux/
+
diff -urN linux/Documentation/feature-removal-schedule.txt
linux/Documentation/feature-removal-schedule.txt
--- linux/Documentation/feature-removal-schedule.txt 1970/01/01 00:00:00
+++ linux/Documentation/feature-removal-schedule.txt Thu Jan 13 14:05:14
2005 1.1
@@ -0,0 +1,34 @@
+The following is a list of files and features that are going to be
+removed in the kernel source tree. Every entry should contain what
+exactly is going away, why it is happening, and who is going to be doing
+the work. When the feature is removed from the kernel, it should also
+be removed from this file.
+
+---------------------------
+
+What: devfs
+When: July 2005
+Files: fs/devfs/*, include/linux/devfs_fs*.h and assorted devfs
+ function calls throughout the kernel tree
+Why: It has been unmaintained for a number of years, has unfixable
+ races, contains a naming policy within the kernel that is
+ against the LSB, and can be replaced by using udev.
+Who: Greg Kroah-Hartman <greg@kroah.com>
+
+---------------------------
+
+What: /proc/sys/cpu/*, sysctl and /proc/cpufreq interfaces to cpufreq (2.4.x
interfaces)
+When: January 2005
+Files: drivers/cpufreq/: cpufreq_userspace.c, proc_intf.c
+Why: /proc/sys/cpu/* has been deprecated since inclusion of cpufreq into
+ the main kernel tree. It bloats /proc/ unnecessarily and doesn't work
+ well with the "governor"-based design of cpufreq.
+ /proc/cpufreq/* has also been deprecated for a long time and was only
+ meant for usage during 2.5. until the new sysfs-based interface became
+ ready. It has an inconsistent interface which doesn't work well with
+ userspace setting the frequency. The output from /proc/cpufreq/* can
+ be emulated using "cpufreq-info --proc" (cpufrequtils).
+ Both interfaces are superseded by the cpufreq interface in
+ /sys/devices/system/cpu/cpu%n/cpufreq/.
+Who: Dominik Brodowski <linux@brodo.de>
+
diff -urN linux/Documentation/sparse.txt linux/Documentation/sparse.txt
--- linux/Documentation/sparse.txt 1970/01/01 00:00:00
+++ linux/Documentation/sparse.txt Thu Jan 13 14:05:14 2005 1.1
@@ -0,0 +1,72 @@
+Copyright 2004 Linus Torvalds
+Copyright 2004 Pavel Machek <pavel@suse.cz>
+
+Using sparse for typechecking
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+"__bitwise" is a type attribute, so you have to do something like this:
+
+ typedef int __bitwise pm_request_t;
+
+ enum pm_request {
+ PM_SUSPEND = (__force pm_request_t) 1,
+ PM_RESUME = (__force pm_request_t) 2
+ };
+
+which makes PM_SUSPEND and PM_RESUME "bitwise" integers (the "__force" is
+there because sparse will complain about casting to/from a bitwise type,
+but in this case we really _do_ want to force the conversion). And because
+the enum values are all the same type, now "enum pm_request" will be that
+type too.
+
+And with gcc, all the __bitwise/__force stuff goes away, and it all ends
+up looking just like integers to gcc.
+
+Quite frankly, you don't need the enum there. The above all really just
+boils down to one special "int __bitwise" type.
+
+So the simpler way is to just do
+
+ typedef int __bitwise pm_request_t;
+
+ #define PM_SUSPEND ((__force pm_request_t) 1)
+ #define PM_RESUME ((__force pm_request_t) 2)
+
+and you now have all the infrastructure needed for strict typechecking.
+
+One small note: the constant integer "0" is special. You can use a
+constant zero as a bitwise integer type without sparse ever complaining.
+This is because "bitwise" (as the name implies) was designed for making
+sure that bitwise types don't get mixed up (little-endian vs big-endian
+vs cpu-endian vs whatever), and there the constant "0" really _is_
+special.
+
+Modify top-level Makefile to say
+
+CHECK = sparse -Wbitwise
+
+or you don't get any checking at all.
+
+
+Where to get sparse
+~~~~~~~~~~~~~~~~~~~
+
+With BK, you can just get it from
+
+ bk://sparse.bkbits.net/sparse
+
+and DaveJ has tar-balls at
+
+ http://www.codemonkey.org.uk/projects/bitkeeper/sparse/
+
+
+Once you have it, just do
+
+ make
+ make install
+
+as your regular user, and it will install sparse in your ~/bin directory.
+After that, doing a kernel make with "make C=1" will run sparse on all the
+C files that get recompiled, or with "make C=2" will run sparse on the
+files whether they need to be recompiled or not (ie the latter is fast way
+to check the whole tree if you have already built it).
diff -urN linux/Documentation/00-INDEX linux/Documentation/00-INDEX
--- linux/Documentation/00-INDEX 2004/11/15 11:49:12 1.25
+++ linux/Documentation/00-INDEX 2005/01/13 14:05:14 1.26
@@ -40,8 +40,6 @@
- directory with info on RCU (read-copy update).
README.DAC960
- info on Mylex DAC960/DAC1100 PCI RAID Controller Driver for Linux.
-README.moxa
- - release notes for Moxa mutiport serial card.
SAK.txt
- info on Secure Attention Keys.
SubmittingDrivers
@@ -174,8 +172,6 @@
- info on typical Linux memory problems.
mips/
- directory with info about Linux on MIPS architecture.
-mkdev.cciss
- - script to make /dev entries for SMART controllers (see cciss.txt).
mono.txt
- how to execute Mono-based .NET binaries with the help of BINFMT_MISC.
moxa-smartio
diff -urN linux/Documentation/Changes linux/Documentation/Changes
--- linux/Documentation/Changes 2004/04/23 15:54:05 1.80
+++ linux/Documentation/Changes 2005/01/13 14:05:14 1.81
@@ -223,6 +223,11 @@
version v0.99.0 or higher. Running old versions may cause problems
with programs using shared memory.
+udev
+----
+udev is a userspace application for populating /dev dynamically with
+only entries for devices actually present. udev replaces devfs.
+
Networking
==========
@@ -368,6 +373,10 @@
----------
o <http://powertweak.sourceforge.net/>
+udev
+----
+o <http://www.kernel.org/pub/linux/utils/kernel/hotplug/udev.html>
+
Networking
**********
@@ -399,4 +408,3 @@
---------
o <http://nfs.sourceforge.net/>
-
diff -urN linux/Documentation/SAK.txt linux/Documentation/SAK.txt
--- linux/Documentation/SAK.txt 2001/04/05 04:56:06 1.1
+++ linux/Documentation/SAK.txt 2005/01/13 14:05:14 1.2
@@ -1,5 +1,5 @@
Linux 2.4.2 Secure Attention Key (SAK) handling
-18 March 2001, Andrew Morton <andrewm@uow.edu.au>
+18 March 2001, Andrew Morton <akpm@osdl.org>
An operating system's Secure Attention Key is a security tool which is
provided as protection against trojan password capturing programs. It
@@ -44,7 +44,7 @@
/dev/console opened.
Unfortunately this includes a number of things which you don't
- actually want killed. This is because these appliccaitons are
+ actually want killed. This is because these applications are
incorrectly holding /dev/console open. Be sure to complain to your
Linux distributor about this!
diff -urN linux/Documentation/cciss.txt linux/Documentation/cciss.txt
--- linux/Documentation/cciss.txt 2004/05/10 14:25:29 1.9
+++ linux/Documentation/cciss.txt 2005/01/13 14:05:14 1.10
@@ -14,28 +14,29 @@
* SA 6400
* SA 6400 U320 Expansion Module
* SA 6i
- * SA 6422
- * SA V100
+ * SA P600
-If nodes are not already created in the /dev/cciss directory
+If nodes are not already created in the /dev/cciss directory, run as root:
-# mkdev.cciss [ctlrs]
-
-Where ctlrs is the number of controllers you have (defaults to 1 if not
-specified).
+# cd /dev
+# ./MAKEDEV cciss
Device Naming:
--------------
-You need some entries in /dev for the cciss device. The mkdev.cciss script
+You need some entries in /dev for the cciss device. The MAKEDEV script
can make device nodes for you automatically. Currently the device setup
is as follows:
Major numbers:
104 cciss0
105 cciss1
- 106 cciss2
- etc...
+ 106 cciss2
+ 105 cciss3
+ 108 cciss4
+ 109 cciss5
+ 110 cciss6
+ 111 cciss7
Minor numbers:
b7 b6 b5 b4 b3 b2 b1 b0
@@ -45,7 +46,7 @@
|
+-------------------- Logical Volume number
-The suggested device naming scheme is:
+The device naming scheme is:
/dev/cciss/c0d0 Controller 0, disk 0, whole device
/dev/cciss/c0d0p1 Controller 0, disk 0, partition 1
/dev/cciss/c0d0p2 Controller 0, disk 0, partition 2
@@ -117,16 +118,13 @@
Note that the naming convention of the /proc filesystem entries
contains a number in addition to the driver name. (E.g. "cciss0"
-instead of just "cciss" which you might expect.) This is because
-of changes to the 2.4 kernel PCI interface related to PCI hot plug
-that imply the driver must register with the SCSI mid layer once per
-adapter instance rather than once per driver.
+instead of just "cciss" which you might expect.)
Note: ONLY sequential access devices and medium changers are presented
as SCSI devices to the SCSI mid layer by the cciss driver. Specifically,
physical SCSI disk drives are NOT presented to the SCSI mid layer. The
physical SCSI disk drives are controlled directly by the array controller
-hardware and it is important to prevent the OS from attempting to directly
+hardware and it is important to prevent the kernel from attempting to directly
access these devices too, as if the array controller were merely a SCSI
controller in the same way that we are allowing it to access SCSI tape drives.
diff -urN linux/Documentation/ide.txt linux/Documentation/ide.txt
--- linux/Documentation/ide.txt 2004/11/15 11:49:12 1.24
+++ linux/Documentation/ide.txt 2005/01/13 14:05:14 1.25
@@ -297,6 +297,8 @@
"ide=reverse" : formerly called to pci sub-system, but now local.
+ "ide=nodma" : disable DMA globally for the IDE subsystem.
+
The following are valid ONLY on ide0, which usually corresponds
to the first ATA interface found on the particular host, and the defaults for
the base,ctl ports must not be altered.
diff -urN linux/Documentation/ioctl-number.txt
linux/Documentation/ioctl-number.txt
--- linux/Documentation/ioctl-number.txt 2004/10/12 14:36:31 1.30
+++ linux/Documentation/ioctl-number.txt 2005/01/13 14:05:14 1.31
@@ -72,6 +72,7 @@
0x09 all linux/md.h
0x12 all linux/fs.h
linux/blkpg.h
+0x1b all InfiniBand Subsystem <http://www.openib.org/>
0x20 all drivers/cdrom/cm206.h
0x22 all scsi/sg.h
'#' 00-3F IEEE 1394 Subsystem Block for the entire subsystem
diff -urN linux/Documentation/kernel-parameters.txt
linux/Documentation/kernel-parameters.txt
--- linux/Documentation/kernel-parameters.txt 2004/12/27 02:15:47 1.53
+++ linux/Documentation/kernel-parameters.txt 2005/01/13 14:05:14 1.54
@@ -29,6 +29,7 @@
CD Appropriate CD support is enabled.
DEVFS devfs support is enabled.
DRM Direct Rendering Management support is enabled.
+ EDD BIOS Enhanced Disk Drive Services (EDD) is enabled
EFI EFI Partitioning (GPT) is enabled
EIDE EIDE/ATAPI support is enabled.
FB The frame buffer device is enabled.
@@ -50,6 +51,7 @@
MOUSE Appropriate mouse support is enabled.
MTD MTD support is enabled.
NET Appropriate network support is enabled.
+ NUMA NUMA support is enabled.
NFS Appropriate NFS support is enabled.
OSS OSS sound support is enabled.
PARIDE The ParIDE subsystem is enabled.
@@ -150,6 +152,8 @@
debugging. After system has booted up, it can be set
via /proc/acpi/debug_level.
+ acpi_fake_ecdt [HW,ACPI] Workaround failure due to BIOS lacking ECDT
+
ad1816= [HW,OSS]
Format: <io>,<irq>,<dma>,<dma2>
See also Documentation/sound/oss/AD1816.
@@ -408,6 +412,10 @@
edb= [HW,PS2]
+ edd= [EDD]
+ Format: {"of[f]" | "sk[ipmbr]"}
+ See comment in arch/i386/boot/edd.S
+
eicon= [HW,ISDN]
Format: <id>,<membase>,<irq>
@@ -474,6 +482,10 @@
gvp11= [HW,SCSI]
+ hashdist= [KNL,NUMA] Large hashes allocated during boot
+ are distributed across NUMA nodes. Defaults on
+ for IA-64, off otherwise.
+
hcl= [IA-64] SGI's Hardware Graph compatibility layer
hd= [EIDE] (E)IDE hard drive subsystem geometry
@@ -498,6 +510,8 @@
i8042.dumbkbd [HW] Pretend that controlled can only read data from
keyboard and can not control its state
(Don't attempt to blink the leds)
+ i8042.noacpi [HW] Don't use ACPI to discover KBD/AUX controller
+ settings
i8042.noaux [HW] Don't check for auxiliary (== mouse) port
i8042.nomux [HW] Don't check presence of an active multiplexing
controller
@@ -573,11 +587,13 @@
Format: <RDP>, <reset>, <pci_scan>, <verbosity>
isolcpus= [KNL,SMP] Isolate CPUs from the general scheduler.
- Format: <cpu number>, ..., <cpu number>
+ Format: <cpu number>,...,<cpu number>
This option can be used to specify one or more CPUs
to isolate from the general SMP balancing and scheduling
algorithms. The only way to move a process onto or off
an "isolated" CPU is via the CPU affinity syscalls.
+ <cpu number> begins at 0 and the maximum value is
+ "number of CPUs in system - 1".
This option is the preferred way to isolate CPUs. The
alternative - manually setting the CPU mask of all tasks
@@ -872,6 +888,13 @@
panic= [KNL] Kernel behaviour on panic
Format: <timeout>
+ parkbd.port= [HW] Parallel port number the keyboard adapter is
+ connected to, default is 0.
+ Format: <parport#>
+ parkbd.mode= [HW] Parallel port keyboard adapter mode of operation,
+ 0 for XT, 1 for AT (default is AT).
+ Format: <mode>
+
parport=0 [HW,PPT] Specify parallel ports. 0 disables.
parport=auto Use 'auto' to force the driver to use
parport=0xBBB[,IRQ[,DMA]] any IRQ/DMA settings detected (the
@@ -1319,8 +1342,12 @@
thash_entries= [KNL,NET]
Set number of hash buckets for TCP connection
- tipar= [HW]
- See header of drivers/char/tipar.c.
+ tipar.timeout= [HW,PPT]
+ Set communications timeout in tenths of a second
+ (default 15).
+
+ tipar.delay= [HW,PPT]
+ Set inter-bit delay in microseconds (default 10).
tiusb= [HW,USB] Texas Instruments' USB GraphLink (aka
SilverLink)
Format: <timeout>
diff -urN linux/Documentation/pm.txt linux/Documentation/pm.txt
--- linux/Documentation/pm.txt 2004/11/15 11:49:12 1.6
+++ linux/Documentation/pm.txt 2005/01/13 14:05:14 1.7
@@ -91,54 +91,6 @@
void pm_unregister_all(pm_callback cback);
/*
- * Device idle/use detection
- *
- * In general, drivers for all devices should call "pm_access"
- * before accessing the hardware (ie. before reading or modifying
- * a hardware register). Request or packet-driven drivers should
- * additionally call "pm_dev_idle" when a device is not being used.
- *
- * Examples:
- * 1) A keyboard driver would call pm_access whenever a key is pressed
- * 2) A network driver would call pm_access before submitting
- * a packet for transmit or receive and pm_dev_idle when its
- * transfer and receive queues are empty.
- * 3) A VGA driver would call pm_access before it accesses any
- * of the video controller registers
- *
- * Ultimately, the PM policy manager uses the access and idle
- * information to decide when to suspend individual devices
- * or when to suspend the entire system
- */
-
-/*
- * Description: Update device access time and wake up device, if necessary
- *
- * Parameters:
- * dev - PM device previously returned from pm_register
- *
- * Details: If called from an interrupt handler pm_access updates
- * access time but should never need to wake up the device
- * (if device is generating interrupts, it should be awake
- * already) This is important as we can not wake up
- * devices from an interrupt handler.
- */
-void pm_access(struct pm_dev *dev);
-
-/*
- * Description: Identify device as currently being idle
- *
- * Parameters:
- * dev - PM device previously returned from pm_register
- *
- * Details: A call to pm_dev_idle might signal to the policy manager
- * to put a device to sleep. If a new device request arrives
- * between the call to pm_dev_idle and the pm_callback
- * callback, the driver should fail the pm_callback request.
- */
-void pm_dev_idle(struct pm_dev *dev);
-
-/*
* Power management request callback
*
* Parameters:
diff -urN linux/Documentation/riscom8.txt linux/Documentation/riscom8.txt
--- linux/Documentation/riscom8.txt 1998/05/07 02:55:54 1.3
+++ linux/Documentation/riscom8.txt 2005/01/13 14:05:14 1.4
@@ -1,5 +1,12 @@
+* NOTE - this is an unmaintained driver. The original author cannot be
located.
+
+SDL Communications is now SBS Technologies, and does not have any
+information on these ancient ISA cards on their website.
+
+James Nelson <james4765@gmail.com> - 12-12-2004
+
This is the README for RISCom/8 multi-port serial driver
- (C) 1994-1996 D.Gorodchanin (pgmdsg@ibi.com)
+ (C) 1994-1996 D.Gorodchanin
See file LICENSE for terms and conditions.
NOTE: English is not my native language.
@@ -10,47 +17,20 @@
1) This driver can support up to 4 boards at time.
Use string "riscom8=0xXXX,0xXXX,0xXXX,0xXXX" at LILO prompt, for
setting I/O base addresses for boards. If you compile driver
- as module use insmod options "iobase=0xXXX iobase1=0xXXX iobase2=..."
+ as module use modprobe options "iobase=0xXXX iobase1=0xXXX iobase2=..."
2) The driver partially supports famous 'setserial' program, you can use almost
any of its options, excluding port & irq settings.
3) There are some misc. defines at the beginning of riscom8.c, please read the
comments and try to change some of them in case of problems.
-
+
4) I consider the current state of the driver as BETA.
- If you REALLY think you found a bug, send me e-mail, I hope I'll
- fix it. For any other problems please ask support@sdlcomm.com.
5) SDL Communications WWW page is http://www.sdlcomm.com.
-6) You can use the script at the end of this file to create RISCom/8 devices.
+6) You can use the MAKEDEV program to create RISCom/8 /dev/ttyL* entries.
7) Minor numbers for first board are 0-7, for second 8-15, etc.
22 Apr 1996.
-
--------------------------------cut here-------------------------------------
-#!/bin/bash
-NORMAL_DEVICE=/dev/ttyL
-CALLOUT_DEVICE=/dev/cuL
-NORMAL_MAJOR=48
-CALLOUT_MAJOR=49
-
-echo "Creating devices... "
-for i in 0 1 2 3; do
- echo "Board No $[$i+1]"
- for j in 0 1 2 3 4 5 6 7; do
- k=$[ 8 * $i + $j]
- rm -f $NORMAL_DEVICE$k
- mknod $NORMAL_DEVICE$k c $NORMAL_MAJOR $k
- chmod a+rw $NORMAL_DEVICE$k
- echo -n $NORMAL_DEVICE$k" "
- rm -f $CALLOUT_DEVICE$k
- mknod $CALLOUT_DEVICE$k c $CALLOUT_MAJOR $k
- chmod a+rw $CALLOUT_DEVICE$k
- echo $CALLOUT_DEVICE$k
- done
-done
-echo "done."
--------------------------------cut here-------------------------------------
diff -urN linux/Documentation/stable_api_nonsense.txt
linux/Documentation/stable_api_nonsense.txt
--- linux/Documentation/stable_api_nonsense.txt 2004/12/04 18:15:57 1.1
+++ linux/Documentation/stable_api_nonsense.txt 2005/01/13 14:05:14 1.2
@@ -9,7 +9,7 @@
kernel to userspace interfaces. The kernel to userspace interface is
the one that application programs use, the syscall interface. That
interface is _very_ stable over time, and will not break. I have old
-programs that were built on a pre 0.9something kernel that still works
+programs that were built on a pre 0.9something kernel that still work
just fine on the latest 2.6 kernel release. This interface is the one
that users and application programmers can count on being stable.
@@ -167,7 +167,7 @@
ensures that your driver is always buildable, and works over time, with
very little effort on your part.
-The very good side affects of having your driver in the main kernel tree
+The very good side effects of having your driver in the main kernel tree
are:
- The quality of the driver will rise as the maintenance costs (to the
original developer) will decrease.
diff -urN linux/Documentation/stallion.txt linux/Documentation/stallion.txt
--- linux/Documentation/stallion.txt 2000/08/08 12:37:17 1.9
+++ linux/Documentation/stallion.txt 2005/01/13 14:05:14 1.10
@@ -1,8 +1,13 @@
+* NOTE - This is an unmaintained driver. Lantronix, which bought Stallion
+technologies, is not active in driver maintenance, and they have no information
+on when or if they will have a 2.6 driver.
+
+James Nelson <james4765@gmail.com> - 12-12-2004
Stallion Multiport Serial Driver Readme
---------------------------------------
-Copyright (C) 1994-1999, Stallion Technologies (support@stallion.com).
+Copyright (C) 1994-1999, Stallion Technologies.
Version: 5.5.1
Date: 28MAR99
@@ -19,29 +24,20 @@
If you are using any of the Stallion intelligent multiport boards (Brumby,
ONboard, EasyConnection 8/64 (ISA, EISA, MCA), EasyConnection/RA-PCI) with
-Linux you will need to get the driver utility package. This package is
-available at most of the Linux archive sites (and on CD-ROMs that contain
-these archives). The file will be called stallion-X.X.X.tar.gz where X.X.X
-will be the version number. In particular this package contains the board
-embedded executable images that are required for these boards. It also
-contains the downloader program. These boards cannot be used without this.
+Linux you will need to get the driver utility package. This contains a
+firmware loader and the firmware images necessary to make the devices operate.
The Stallion Technologies ftp site, ftp.stallion.com, will always have
-the latest version of the driver utility package. Other sites that usually
-have the latest version are tsx-11.mit.edu, sunsite.unc.edu and their
-mirrors.
-
-ftp.stallion.com:/drivers/ata5/Linux/v550.tar.gz
-tsx-11.mit.edu:/pub/linux/packages/stallion/stallion-5.5.0.tar.gz
-sunsite.unc.edu:/pub/Linux/kernel/patches/serial/stallion-5.5.0.tar.gz
+the latest version of the driver utility package.
+
+ftp://ftp.stallion.com/drivers/ata5/Linux/ata-linux-550.tar.gz
As of the printing of this document the latest version of the driver
utility package is 5.5.0. If a later version is now available then you
should use the latest version.
If you are using the EasyIO, EasyConnection 8/32 or EasyConnection 8/64-PCI
-boards then you don't need this package. Although it does have a handy
-script to create the /dev device nodes for these boards, and a serial stats
+boards then you don't need this package, although it does have a serial stats
display program.
If you require DIP switch settings, EISA or MCA configuration files, or any
@@ -85,7 +81,7 @@
Typically to load up the smart board driver use:
- insmod stallion.o
+ modprobe stallion
This will load the EasyIO and EasyConnection 8/32 driver. It will output a
message to say that it loaded and print the driver version number. It will
@@ -96,12 +92,12 @@
To load the intelligent board driver use:
- insmod istallion.o
+ modprobe istallion
It will output similar messages to the smart board driver.
If not using an auto-detectable board type (that is a PCI board) then you
-will also need to supply command line arguments to the "insmod" command
+will also need to supply command line arguments to the modprobe command
when loading the driver. The general form of the configuration argument is
board?=<name>[,<ioaddr>[,<addr>][,<irq>]]
@@ -111,7 +107,7 @@
board? -- specifies the arbitrary board number of this board,
can be in the range 0 to 3.
- name -- textual name of this board. The board name is the comman
+ name -- textual name of this board. The board name is the common
board name, or any "shortened" version of that. The board
type number may also be used here.
@@ -127,24 +123,24 @@
Up to 4 board configuration arguments can be specified on the load line.
Here is some examples:
- insmod stallion.o board0=easyio,0x2a0,5
+ modprobe stallion board0=easyio,0x2a0,5
This configures an EasyIO board as board 0 at I/O address 0x2a0 and IRQ 5.
- insmod istallion.o board3=ec8/64,0x2c0,0xcc000
+ modprobe istallion board3=ec8/64,0x2c0,0xcc000
This configures an EasyConnection 8/64 ISA as board 3 at I/O address 0x2c0 at
memory address 0xcc000.
- insmod stallion.o board1=ec8/32-at,0x2a0,0x280,10
+ modprobe stallion board1=ec8/32-at,0x2a0,0x280,10
This configures an EasyConnection 8/32 ISA board at primary I/O address 0x2a0,
secondary address 0x280 and IRQ 10.
You will probably want to enter this module load and configuration information
into your system startup scripts so that the drivers are loaded and configured
-on each system boot. Typically the start up script would be something line
-/etc/rc.d/rc.modules.
+on each system boot. Typically the start up script would be something like
+/etc/modprobe.conf.
2.2 STATIC DRIVER CONFIGURATION:
@@ -161,8 +157,8 @@
To set up the driver(s) for the boards that you want to use you need to
edit the appropriate driver file and add configuration entries.
-If using EasyIO or EasyConnection 8/32 ISA or MCA boards, do:
- vi /usr/src/linux/drivers/char/stallion.c
+If using EasyIO or EasyConnection 8/32 ISA or MCA boards,
+ In drivers/char/stallion.c:
- find the definition of the stl_brdconf array (of structures)
near the top of the file
- modify this to match the boards you are going to install
@@ -170,8 +166,8 @@
- save and exit
If using ONboard, Brumby, Stallion or EasyConnection 8/64 (ISA or EISA)
-boards then do:
- vi /usr/src/linux/drivers/char/istallion.c
+boards,
+ In drivers/char/istallion.c:
- find the definition of the stli_brdconf array (of structures)
near the top of the file
- modify this to match the boards you are going to install
@@ -291,20 +287,20 @@
of course the ports will not be operational!
If you are using the modularized version of the driver you might want to put
-the insmod calls in the startup script as well (before the download lines
+the modprobe calls in the startup script as well (before the download lines
obviously).
3.2 USING THE SERIAL PORTS
Once the driver is installed you will need to setup some device nodes to
-access the serial ports. The simplest method is to use the stallion utility
-"mkdevnods" script. It will automatically create device entries for Stallion
-boards. This will create the normal serial port devices as /dev/ttyE# where
-# is the port number starting from 0. A bank of 64 minor device numbers is
-allocated to each board, so the first port on the second board is port 64,
-etc. A set of callout type devices is also created. They are created as the
-devices /dev/cue# where # is the same as for the ttyE devices.
+access the serial ports. The simplest method is to use the /dev/MAKEDEV
program.
+It will automatically create device entries for Stallion boards. This will
+create the normal serial port devices as /dev/ttyE# where# is the port number
+starting from 0. A bank of 64 minor device numbers is allocated to each board,
+so the first port on the second board is port 64,etc. A set of callout type
+devices may also be created. They are created as the devices /dev/cue# where #
+is the same as for the ttyE devices.
For the most part the Stallion driver tries to emulate the standard PC system
COM ports and the standard Linux serial driver. The idea is that you should
diff -urN linux/Documentation/README.moxa linux/Documentation/README.moxa
--- linux/Documentation/Attic/README.moxa Thu Jan 13 14:05:14 2005
1.1
+++ linux/Documentation/Attic/README.moxa 1970/01/01 00:00:002002
@@ -1,18 +0,0 @@
- ===================================================================
- Release Note of Linux Driver for Moxa's C104/C168/CI-104J
- ===================================================================
-
- -------------------------------------------------------------------
- Ver. 1.1 Sep. 1, 1999
- -------------------------------------------------------------------
- 1. Improved:
- a. Static driver (kernel) and dynamic driver (loadable module)
- modes are supported.
- b. Multiple Smartio PCI series boards sharing the same IRQ
- supported.
-
- -------------------------------------------------------------------
- Ver. 1.0 Feb 17, 1997
- -------------------------------------------------------------------
- 1. Newly release.
-
diff -urN linux/Documentation/mkdev.cciss linux/Documentation/mkdev.cciss
--- linux/Documentation/Attic/mkdev.cciss Thu Jan 13 14:05:14 2005
1.1
+++ linux/Documentation/Attic/mkdev.cciss 1970/01/01 00:00:002002
@@ -1,40 +0,0 @@
-#!/bin/sh
-# Script to create device nodes for SMART array controllers
-# Usage:
-# mkdev.cciss [num controllers] [num log volumes] [num partitions]
-#
-# With no arguments, the script assumes 1 controller, 16 logical volumes,
-# and 16 partitions/volume, which is adequate for most configurations.
-#
-# If you had 5 controllers and were planning on no more than 4 logical volumes
-# each, using a maximum of 8 partitions per volume, you could say:
-#
-# mkdev.cciss 5 4 8
-#
-# Of course, this has no real benefit over "mkdev.cciss 5" except that it
-# doesn't create so many device nodes in /dev/cciss.
-
-NR_CTLR=${1-1}
-NR_VOL=${2-16}
-NR_PART=${3-16}
-
-if [ ! -d /dev/cciss ]; then
- mkdir -p /dev/cciss
-fi
-
-C=0; while [ $C -lt $NR_CTLR ]; do
- MAJ=`expr $C + 104`
- D=0; while [ $D -lt $NR_VOL ]; do
- P=0; while [ $P -lt $NR_PART ]; do
- MIN=`expr $D \* 16 + $P`
- if [ $P -eq 0 ]; then
- mknod /dev/cciss/c${C}d${D} b $MAJ $MIN
- else
- mknod /dev/cciss/c${C}d${D}p${P} b $MAJ $MIN
- fi
- P=`expr $P + 1`
- done
- D=`expr $D + 1`
- done
- C=`expr $C + 1`
-done
diff -urN linux/Documentation/DocBook/kernel-api.tmpl
linux/Documentation/DocBook/kernel-api.tmpl
--- linux/Documentation/DocBook/kernel-api.tmpl 2004/12/04 18:15:57 1.35
+++ linux/Documentation/DocBook/kernel-api.tmpl 2005/01/13 14:05:14 1.36
@@ -105,6 +105,15 @@
</sect1>
</chapter>
+ <chapter id="debugfs">
+ <title>The debugfs filesystem</title>
+
+ <sect1><title>debugfs interface</title>
+!Efs/debugfs/inode.c
+!Efs/debugfs/file.c
+ </sect1>
+ </chapter>
+
<chapter id="vfs">
<title>The Linux VFS</title>
<sect1><title>The Directory Cache</title>
diff -urN linux/Documentation/aoe/aoe.txt linux/Documentation/aoe/aoe.txt
--- linux/Documentation/aoe/aoe.txt 1970/01/01 00:00:00
+++ linux/Documentation/aoe/aoe.txt Thu Jan 13 14:05:15 2005 1.1
@@ -0,0 +1,75 @@
+The EtherDrive (R) HOWTO for users of 2.6 kernels is found at ...
+
+ http://www.coraid.com/support/linux/EtherDrive-2.6-HOWTO.html
+
+ It has many tips and hints!
+
+CREATING DEVICE NODES
+
+ Users of udev should find device nodes created automatically. Two
+ scripts are provided in Documentation/aoe as examples of static
+ device node creation for using the aoe driver.
+
+ rm -rf /dev/etherd
+ sh Documentation/aoe/mkdevs.sh /dev/etherd
+
+ ... or to make just one shelf's worth of block device nodes ...
+
+ sh Documentation/aoe/mkshelf.sh /dev/etherd 0
+
+ There is also an autoload script that shows how to edit
+ /etc/modprobe.conf to ensure that the aoe module is loaded when
+ necessary.
+
+USING DEVICE NODES
+
+ "cat /dev/etherd/err" blocks, waiting for error diagnostic output,
+ like any retransmitted packets.
+
+ "echo eth2 eth4 > /dev/etherd/interfaces" tells the aoe driver to
+ limit ATA over Ethernet traffic to eth2 and eth4. AoE traffic from
+ untrusted networks should be ignored as a matter of security.
+
+ "echo > /dev/etherd/discover" tells the driver to find out what AoE
+ devices are available.
+
+ The block devices are named like this:
+
+ e{shelf}.{slot}
+ e{shelf}.{slot}p{part}
+
+ ... so that "e0.2" is the third blade from the left (slot 2) in the
+ first shelf (shelf address zero). That's the whole disk. The first
+ partition on that disk would be "e0.2p1".
+
+USING SYSFS
+
+ Each aoe block device in /sys/block has the extra attributes of
+ state, mac, and netif. The state attribute is "up" when the device
+ is ready for I/O and "down" if detected but unusable. The
+ "down,closewait" state shows that the device is still open and
+ cannot come up again until it has been closed.
+
+ The mac attribute is the ethernet address of the remote AoE device.
+ The netif attribute is the network interface on the localhost
+ through which we are communicating with the remote AoE device.
+
+ There is a script in this directory that formats this information
+ in a convenient way.
+
+ root@makki linux# sh Documentation/aoe/status.sh
+ device mac netif state
+ e6.0 0010040010c6 eth0 up
+ e6.1 001004001067 eth0 up
+ e6.2 001004001068 eth0 up
+ e6.3 001004001065 eth0 up
+ e6.4 001004001066 eth0 up
+ e6.5 0010040010c7 eth0 up
+ e6.6 0010040010c8 eth0 up
+ e6.7 0010040010c9 eth0 up
+ e6.8 0010040010ca eth0 up
+ e6.9 0010040010cb eth0 up
+ e9.0 001004000020 eth1 up
+ e9.5 001004000025 eth1 up
+ e9.9 001004000029 eth1 up
+
diff -urN linux/Documentation/aoe/autoload.sh
linux/Documentation/aoe/autoload.sh
--- linux/Documentation/aoe/autoload.sh 1970/01/01 00:00:00
+++ linux/Documentation/aoe/autoload.sh Thu Jan 13 14:05:15 2005 1.1
@@ -0,0 +1,17 @@
+#!/bin/sh
+# set aoe to autoload by installing the
+# aliases in /etc/modprobe.conf
+
+f=/etc/modprobe.conf
+
+if test ! -r $f || test ! -w $f; then
+ echo "cannot configure $f for module autoloading" 1>&2
+ exit 1
+fi
+
+grep major-152 $f >/dev/null
+if [ $? = 1 ]; then
+ echo alias block-major-152 aoe >> $f
+ echo alias char-major-152 aoe >> $f
+fi
+
diff -urN linux/Documentation/aoe/mkdevs.sh linux/Documentation/aoe/mkdevs.sh
--- linux/Documentation/aoe/mkdevs.sh 1970/01/01 00:00:00
+++ linux/Documentation/aoe/mkdevs.sh Thu Jan 13 14:05:15 2005 1.1
@@ -0,0 +1,33 @@
+#!/bin/sh
+
+n_shelves=10
+
+if test "$#" != "1"; then
+ echo "Usage: sh mkdevs.sh {dir}" 1>&2
+ exit 1
+fi
+dir=$1
+
+MAJOR=152
+
+echo "Creating AoE devnode files in $dir ..."
+
+set -e
+
+mkdir -p $dir
+
+# (Status info is in sysfs. See status.sh.)
+# rm -f $dir/stat
+# mknod -m 0400 $dir/stat c $MAJOR 1
+rm -f $dir/err
+mknod -m 0400 $dir/err c $MAJOR 2
+rm -f $dir/discover
+mknod -m 0200 $dir/discover c $MAJOR 3
+rm -f $dir/interfaces
+mknod -m 0200 $dir/interfaces c $MAJOR 4
+
+i=0
+while test $i -lt $n_shelves; do
+ sh -xc "sh `dirname $0`/mkshelf.sh $dir $i"
+ i=`expr $i + 1`
+done
diff -urN linux/Documentation/aoe/mkshelf.sh linux/Documentation/aoe/mkshelf.sh
--- linux/Documentation/aoe/mkshelf.sh 1970/01/01 00:00:00
+++ linux/Documentation/aoe/mkshelf.sh Thu Jan 13 14:05:15 2005 1.1
@@ -0,0 +1,23 @@
+#! /bin/sh
+
+if test "$#" != "2"; then
+ echo "Usage: sh mkshelf.sh {dir} {shelfaddress}" 1>&2
+ exit 1
+fi
+dir=$1
+shelf=$2
+MAJOR=152
+
+set -e
+
+minor=`echo 10 \* $shelf \* 16 | bc`
+for slot in `seq 0 9`; do
+ for part in `seq 0 15`; do
+ name=e$shelf.$slot
+ test "$part" != "0" && name=${name}p$part
+ rm -f $dir/$name
+ mknod -m 0660 $dir/$name b $MAJOR $minor
+
+ minor=`expr $minor + 1`
+ done
+done
diff -urN linux/Documentation/aoe/status.sh linux/Documentation/aoe/status.sh
--- linux/Documentation/aoe/status.sh 1970/01/01 00:00:00
+++ linux/Documentation/aoe/status.sh Thu Jan 13 14:05:15 2005 1.1
@@ -0,0 +1,15 @@
+# collate and present sysfs information about AoE storage
+
+set -e
+format="%8s\t%12s\t%8s\t%8s\n"
+
+printf "$format" device mac netif state
+
+for d in `ls -d /sys/block/etherd* | grep -v p`; do
+ dev=`echo "$d" | sed 's/.*!//'`
+ printf "$format" \
+ "$dev" \
+ "`cat \"$d/mac\"`" \
+ "`cat \"$d/netif\"`" \
+ "`cat \"$d/state\"`"
+done | sort
diff -urN linux/Documentation/arm/IXP4xx linux/Documentation/arm/IXP4xx
--- linux/Documentation/arm/IXP4xx 2004/12/04 18:15:57 1.2
+++ linux/Documentation/arm/IXP4xx 2005/01/13 14:05:15 1.3
@@ -12,8 +12,11 @@
in industrial control and other areas due to low cost and power
consumption. The IXP4xx family currently consists of several processors
that support different network offload functions such as encryption,
-routing, firewalling, etc. For more information on the various
-versions of the CPU, see:
+routing, firewalling, etc. The IXP46x family is an updated version which
+supports faster speeds, new memory and flash configurations, and more
+integration such as an on-chip I2C controller.
+
+For more information on the various versions of the CPU, see:
http://developer.intel.com/design/network/products/npfamily/ixp4xx.htm
@@ -27,7 +30,7 @@
- Dual serial ports
- PCI interface
- Flash access (MTD/JFFS)
-- I2C through GPIO
+- I2C through GPIO on IXP42x
- GPIO for input/output/interrupts
See include/asm-arm/arch-ixp4xx/platform.h for access functions.
- Timers (watchdog, OS)
@@ -122,6 +125,12 @@
also known as the Richfield board. It contains 4 PCI slots, 16MB
of flash, two 10/100 ports and one ADSL port.
+Intel IXDP465 Development Platform
+http://developer.intel.com/design/network/products/npfamily/ixdp465.htm
+
+ This is basically an IXDP425 with an IXP465 and 32M of flash instead
+ of just 16.
+
Intel IXDPG425 Development Platform
This is basically and ADI Coyote board with a NEC EHCI controller
@@ -154,6 +163,7 @@
The following people have contributed patches/comments/etc:
+Lennerty Buytenhek
Lutz Jaenicke
Justin Mayfield
Robert E. Ranslam
@@ -161,4 +171,4 @@
-------------------------------------------------------------------------
-Last Update: 11/16/2004
+Last Update: 01/04/2005
diff -urN linux/Documentation/cdrom/packet-writing.txt
linux/Documentation/cdrom/packet-writing.txt
--- linux/Documentation/cdrom/packet-writing.txt 2004/10/25 20:44:08
1.1
+++ linux/Documentation/cdrom/packet-writing.txt 2005/01/13 14:05:15
1.2
@@ -43,6 +43,8 @@
that it should be possible to put any filesystem with a block size >=
2KB on such a disc. For example, it should be possible to do:
+ # dvd+rw-format /dev/hdc (only needed if the disc has never
+ been formatted)
# mkudffs /dev/hdc
# mount /dev/hdc /cdrom -t udf -o rw,noatime
@@ -54,6 +56,7 @@
Both problems can be solved by using the pktcdvd driver, which always
generates aligned writes.
+ # dvd+rw-format /dev/hdc
# pktsetup dev_name /dev/hdc
# mkudffs /dev/pktcdvd/dev_name
# mount /dev/pktcdvd/dev_name /cdrom -t udf -o rw,noatime
diff -urN linux/Documentation/early-userspace/README
linux/Documentation/early-userspace/README
--- linux/Documentation/early-userspace/README 2004/04/23 15:54:05 1.2
+++ linux/Documentation/early-userspace/README 2005/01/13 14:05:15 1.3
@@ -1,7 +1,7 @@
Early userspace support
=======================
-Last update: 2003-08-21
+Last update: 2004-12-20 tlh
"Early userspace" is a set of libraries and programs that provide
@@ -17,15 +17,66 @@
- initramfs, a chunk of code that unpacks the compressed cpio image
midway through the kernel boot process.
- klibc, a userspace C library, currently packaged separately, that is
- optimised for correctness and small size.
+ optimized for correctness and small size.
The cpio file format used by initramfs is the "newc" (aka "cpio -c")
-format, and is documented in the file "buffer-format.txt". If you
-want to generate your own cpio files directly instead of hacking on
-gen_init_cpio, you will need to short-circuit the build process in
-usr/ so that gen_init_cpio does not get run, then simply pop your own
-initramfs_data.cpio.gz file into place.
+format, and is documented in the file "buffer-format.txt". There are
+two ways to add an early userspace image: specify an existing cpio
+archive to be used as the image or have the kernel build process build
+the image from specifications.
+
+CPIO ARCHIVE method
+
+You can create a cpio archive that contains the early userspace image.
+Youre cpio archive should be specified in CONFIG_INITRAMFS_SOURCE and it
+will be used directly. Only a single cpio file may be specified in
+CONFIG_INITRAMFS_SOURCE and directory and file names are not allowed in
+combination with a cpio archive.
+
+IMAGE BUILDING method
+
+The kernel build process can also build an early userspace image from
+source parts rather than supplying a cpio archive. This method provides
+a way to create images with root-owned files even though the image was
+built by an unprivileged user.
+
+The image is specified as one or more sources in
+CONFIG_INITRAMFS_SOURCE. Sources can be either directories or files -
+cpio archives are *not* allowed when building from sources.
+
+A source directory will have it and all of it's contents packaged. The
+specified directory name will be mapped to '/'. When packaging a
+directory, limited user and group ID translation can be performed.
+INITRAMFS_ROOT_UID can be set to a user ID that needs to be mapped to
+user root (0). INITRAMFS_ROOT_GID can be set to a group ID that needs
+to be mapped to group root (0).
+
+A source file must be directives in the format required by the
+usr/gen_init_cpio utility (run 'usr/gen_init_cpio --help' to get the
+file format). The directives in the file will be passed directly to
+usr/gen_init_cpio.
+
+When a combination of directories and files are specified then the
+initramfs image will be an aggregate of all of them. In this way a user
+can create a 'root-image' directory and install all files into it.
+Because device-special files cannot be created by a unprivileged user,
+special files can be listed in a 'root-files' file. Both 'root-image'
+and 'root-files' can be listed in CONFIG_INITRAMFS_SOURCE and a complete
+early userspace image can be built by an unprivileged user.
+
+As a technical note, when directories and files are specified, the
+entire CONFIG_INITRAMFS_SOURCE is passed to
+scripts/gen_initramfs_list.sh. This means that CONFIG_INITRAMFS_SOURCE
+can really be interpreted as any legal argument to
+gen_initramfs_list.sh. If a directory is specified as an argument then
+the contents are scanned, uid/gid translation is performed, and
+usr/gen_init_cpio file directives are output. If a directory is
+specified as an arugemnt to scripts/gen_initramfs_list.sh then the
+contents of the file are simply copied to the output. All of the output
+directives from directory scanning and file contents copying are
+processed by usr/gen_init_cpio.
+See also 'scripts/gen_initramfs_list.sh -h'.
Where's this all leading?
=========================
diff -urN linux/Documentation/filesystems/sysfs-pci.txt
linux/Documentation/filesystems/sysfs-pci.txt
--- linux/Documentation/filesystems/sysfs-pci.txt 1970/01/01 00:00:00
+++ linux/Documentation/filesystems/sysfs-pci.txt Thu Jan 13 14:05:15
2005 1.1
@@ -0,0 +1,88 @@
+Accessing PCI device resources through sysfs
+
+sysfs, usually mounted at /sys, provides access to PCI resources on platforms
+that support it. For example, a given bus might look like this:
+
+ /sys/devices/pci0000:17
+ |-- 0000:17:00.0
+ | |-- class
+ | |-- config
+ | |-- detach_state
+ | |-- device
+ | |-- irq
+ | |-- local_cpus
+ | |-- resource
+ | |-- resource0
+ | |-- resource1
+ | |-- resource2
+ | |-- rom
+ | |-- subsystem_device
+ | |-- subsystem_vendor
+ | `-- vendor
+ `-- detach_state
+
+The topmost element describes the PCI domain and bus number. In this case,
+the domain number is 0000 and the bus number is 17 (both values are in hex).
+This bus contains a single function device in slot 0. The domain and bus
+numbers are reproduced for convenience. Under the device directory are several
+files, each with their own function.
+
+ file function
+ ---- --------
+ class PCI class (ascii, ro)
+ config PCI config space (binary, rw)
+ detach_state connection status (bool, rw)
+ device PCI device (ascii, ro)
+ irq IRQ number (ascii, ro)
+ local_cpus nearby CPU mask (cpumask, ro)
+ resource PCI resource host addresses (ascii, ro)
+ resource0..N PCI resource N, if present (binary, mmap)
+ rom PCI ROM resource, if present (binary, ro)
+ subsystem_device PCI subsystem device (ascii, ro)
+ subsystem_vendor PCI subsystem vendor (ascii, ro)
+ vendor PCI vendor (ascii, ro)
+
+ ro - read only file
+ rw - file is readable and writable
+ mmap - file is mmapable
+ ascii - file contains ascii text
+ binary - file contains binary data
+ cpumask - file contains a cpumask type
+
+The read only files are informational, writes to them will be ignored.
+Writable files can be used to perform actions on the device (e.g. changing
+config space, detaching a device). mmapable files are available via an
+mmap of the file at offset 0 and can be used to do actual device programming
+from userspace. Note that some platforms don't support mmapping of certain
+resources, so be sure to check the return value from any attempted mmap.
+
+Accessing legacy resources through sysfs
+
+Legacy I/O port and ISA memory resources are also provided in sysfs if the
+underlying platform supports them. They're located in the PCI class heirarchy,
+e.g.
+
+ /sys/class/pci_bus/0000:17/
+ |-- bridge -> ../../../devices/pci0000:17
+ |-- cpuaffinity
+ |-- legacy_io
+ `-- legacy_mem
+
+The legacy_io file is a read/write file that can be used by applications to
+do legacy port I/O. The application should open the file, seek to the desired
+port (e.g. 0x3e8) and do a read or a write of 1, 2 or 4 bytes. The legacy_mem
+file should be mmapped with an offset corresponding to the memory offset
+desired, e.g. 0xa0000 for the VGA frame buffer. The application can then
+simply dereference the returned pointer (after checking for errors of course)
+to access legacy memory space.
+
+Supporting PCI access on new platforms
+
+In order to support PCI resource mapping as described above, Linux platform
+code must define HAVE_PCI_MMAP and provide a pci_mmap_page_range function.
+Platforms are free to only support subsets of the mmap functionality, but
+useful return codes should be provided.
+
+Legacy resources are protected by the HAVE_PCI_LEGACY define. Platforms
+wishing to support legacy functionality should define it and provide
+pci_legacy_read, pci_legacy_write and pci_mmap_legacy_page_range functions.
\ No newline at end of file
diff -urN linux/Documentation/filesystems/00-INDEX
linux/Documentation/filesystems/00-INDEX
--- linux/Documentation/filesystems/00-INDEX 2002/11/01 23:26:52 1.14
+++ linux/Documentation/filesystems/00-INDEX 2005/01/13 14:05:15 1.15
@@ -42,8 +42,6 @@
- info and mount options for the UDF filesystem.
ufs.txt
- info on the ufs filesystem.
-umsdos.txt
- - info on the umsdos extensions to the msdos filesystem.
vfat.txt
- info on using the VFAT filesystem used in Windows NT and Windows 95
vfs.txt
diff -urN linux/Documentation/filesystems/umsdos.txt
linux/Documentation/filesystems/umsdos.txt
--- linux/Documentation/filesystems/Attic/umsdos.txt Thu Jan 13 14:05:15
2005 1.3
+++ linux/Documentation/filesystems/Attic/umsdos.txt 1970/01/01 00:00:002002
@@ -1,100 +0,0 @@
-Firstly, let me say that UMSDOS is going through some major code changes,
-and has some KNOWN BUGS (and quite a few unknown :-). Please read
-fs/umsdos/README-WIP.txt for more information on current status. Thanks.
-
-----------------------------------------------------------------------------
-Very short explanation for the impatient!
-
-Umsdos is a file system driver that run on top the MSDOS fs driver.
-It is written by Jacques Gelinas (jacques@solucorp.qc.ca)
-and is currently maintained by Matija Nalis (mnalis@jagor.srce.hr)
-
-Umsdos is not a file system per se, but a twist to make a boring
-one into a useful one.
-
-It gives you:
-
- long file names
- Permissions and owners
- Links
- Special files (devices, pipes...)
- All that is needed to be a linux root fs.
-
-There is plenty of documentation on it in the source. A formatted document
-made from those comments is available from
-sunsite.unc.edu:/pub/Linux/system/Filesystems/umsdos.
-
-You mount a DOS partition like this:
-
-mount -t umsdos /dev/hda3 /mnt
- ^
----------|
-
-All options are passed to the msdos drivers. Option like uid,gid etc are
-given to msdos.
-
-The default behavior of Umsdos is to do the same thing as the msdos driver
-mostly passing commands to it without much processing. Again, this is
-the default. After doing the mount on a DOS partition, nothing special
-happens. This is why all mount options are passed to the msdos fs driver.
-
-Umsdos uses a special DOS file --linux-.--- to store the information
-which can't be handled by the normal MS-DOS filesystem. This is the trick.
-
---linux-.--- is optional. There is one per directory.
-
-**** If --linux-.--- is missing, then Umsdos process the directory the
- same way the msdos driver does. Short file names, no goodies, default
- owner and permissions. So each directory may have or not this
- --linux-.---
-
-Now, how to get those --linux-.---.
-
-\begin joke_section
-
- Well send me a directory content
- and I will send you one customised for you.
- $5 per directory. Add any applicable taxes.
-\end joke_section
-
-A utility umssync creates those. The kernel maintains them. It is available
-from the same directory above (sunsite) in the file umsdos_progs-0.7.tar.gz.
-A compiled version is available in umsdos_progs-0.7.bin.tar.gz.
-
-So in our example, after mounting mnt, we do
-
- umssync .
-
-This will promote this directory (a recursive option is available) to full
-umsdos capabilities (long name, etc.). However, an "ls -l" before and after
-won't show much difference. The files which were there are still there, but
-now you can do all this:
-
- chmod 644 *
- chown you.your_group *
- ls >THIS_IS.A.VERY.LONG.NAME
- ln -s toto tata
- ls -l
-
-Once a directory is promoted, all subdirectories created will inherit that
-promotion.
-
-What happens if you boot DOS and create files in those promoted directories ?
-Umsdos won't notice new files, but will signal removed files (it won't crash).
-Using umssync in /etc/rc will make sure the DOS directory is in sync with
-the --linux-.---.
-
-It is a good idea to put the following command in your RC file just
-after the "mount -a":
-
- mount -a
- /sbin/umssync -i+ -c+ -r99 /umsdos_mount_point
-
- (You put one for each umsdos mount point in the fstab)
-
-This will ensure nice operation. A umsdos.fsck is in the making,
-so you will be allowed to manage umsdos partitions in the same way
-other filesystems are, using the generic fsck front end.
-
-Hope this helps!
-
diff -urN linux/Documentation/fujitsu/frv/README.txt
linux/Documentation/fujitsu/frv/README.txt
--- linux/Documentation/fujitsu/frv/README.txt 1970/01/01 00:00:00
+++ linux/Documentation/fujitsu/frv/README.txt Thu Jan 13 14:05:15 2005
1.1
@@ -0,0 +1,51 @@
+ ================================
+ Fujitsu FR-V LINUX DOCUMENTATION
+ ================================
+
+This directory contains documentation for the Fujitsu FR-V CPU architecture
+port of Linux.
+
+The following documents are available:
+
+ (*) features.txt
+
+ A description of the basic features inherent in this architecture port.
+
+
+ (*) configuring.txt
+
+ A summary of the configuration options particular to this architecture.
+
+
+ (*) booting.txt
+
+ A description of how to boot the kernel image and a summary of the kernel
+ command line options.
+
+
+ (*) gdbstub.txt
+
+ A description of how to debug the kernel using GDB attached by serial
+ port, and a summary of the services available.
+
+
+ (*) mmu-layout.txt
+
+ A description of the virtual and physical memory layout used in the
+ MMU linux kernel, and the registers used to support it.
+
+
+ (*) gdbinit
+
+ An example .gdbinit file for use with GDB. It includes macros for viewing
+ MMU state on the FR451. See mmu-layout.txt for more information.
+
+
+ (*) clock.txt
+
+ A description of the CPU clock scaling interface.
+
+
+ (*) atomic-ops.txt
+
+ A description of how the FR-V kernel's atomic operations work.
diff -urN linux/Documentation/fujitsu/frv/atomic-ops.txt
linux/Documentation/fujitsu/frv/atomic-ops.txt
--- linux/Documentation/fujitsu/frv/atomic-ops.txt 1970/01/01 00:00:00
+++ linux/Documentation/fujitsu/frv/atomic-ops.txt Thu Jan 13 14:05:15
2005 1.1
@@ -0,0 +1,134 @@
+ =====================================
+ FUJITSU FR-V KERNEL ATOMIC OPERATIONS
+ =====================================
+
+On the FR-V CPUs, there is only one atomic Read-Modify-Write operation: the
SWAP/SWAPI
+instruction. Unfortunately, this alone can't be used to implement the
following operations:
+
+ (*) Atomic add to memory
+
+ (*) Atomic subtract from memory
+
+ (*) Atomic bit modification (set, clear or invert)
+
+ (*) Atomic compare and exchange
+
+On such CPUs, the standard way of emulating such operations in uniprocessor
mode is to disable
+interrupts, but on the FR-V CPUs, modifying the PSR takes a lot of clock
cycles, and it has to be
+done twice. This means the CPU runs for a relatively long time with interrupts
disabled,
+potentially having a great effect on interrupt latency.
+
+
+=============
+NEW ALGORITHM
+=============
+
+To get around this, the following algorithm has been implemented. It operates
in a way similar to
+the LL/SC instruction pairs supported on a number of platforms.
+
+ (*) The CCCR.CC3 register is reserved within the kernel to act as an atomic
modify abort flag.
+
+ (*) In the exception prologues run on kernel->kernel entry, CCCR.CC3 is set
to 0 (Undefined
+ state).
+
+ (*) All atomic operations can then be broken down into the following
algorithm:
+
+ (1) Set ICC3.Z to true and set CC3 to True (ORCC/CKEQ/ORCR).
+
+ (2) Load the value currently in the memory to be modified into a register.
+
+ (3) Make changes to the value.
+
+ (4) If CC3 is still True, simultaneously and atomically (by VLIW packing):
+
+ (a) Store the modified value back to memory.
+
+ (b) Set ICC3.Z to false (CORCC on GR29 is sufficient for this - GR29
holds the current
+ task pointer in the kernel, and so is guaranteed to be non-zero).
+
+ (5) If ICC3.Z is still true, go back to step (1).
+
+This works in a non-SMP environment because any interrupt or other exception
that happens between
+steps (1) and (4) will set CC3 to the Undefined, thus aborting the store in
(4a), and causing the
+condition in ICC3 to remain with the Z flag set, thus causing step (5) to loop
back to step (1).
+
+
+This algorithm suffers from two problems:
+
+ (1) The condition CCCR.CC3 is cleared unconditionally by an exception,
irrespective of whether or
+ not any changes were made to the target memory location during that
exception.
+
+ (2) The branch from step (5) back to step (1) may have to happen more than
once until the store
+ manages to take place. In theory, this loop could cycle forever because
there are too many
+ interrupts coming in, but it's unlikely.
+
+
+=======
+EXAMPLE
+=======
+
+Taking an example from include/asm-frv/atomic.h:
+
+ static inline int atomic_add_return(int i, atomic_t *v)
+ {
+ unsigned long val;
+
+ asm("0: \n"
+
+It starts by setting ICC3.Z to true for later use, and also transforming that
into CC3 being in the
+True state.
+
+ " orcc gr0,gr0,gr0,icc3 \n" <-- (1)
+ " ckeq icc3,cc7 \n" <-- (1)
+
+Then it does the load. Note that the final phase of step (1) is done at the
same time as the
+load. The VLIW packing ensures they are done simultaneously. The ".p" on the
load must not be
+removed without swapping the order of these two instructions.
+
+ " ld.p %M0,%1 \n" <-- (2)
+ " orcr cc7,cc7,cc3 \n" <-- (1)
+
+Then the proposed modification is generated. Note that the old value can be
retained if required
+(such as in test_and_set_bit()).
+
+ " add%I2 %1,%2,%1 \n" <-- (3)
+
+Then it attempts to store the value back, contingent on no exception having
cleared CC3 since it
+was set to True.
+
+ " cst.p %1,%M0 ,cc3,#1 \n" <-- (4a)
+
+It simultaneously records the success or failure of the store in ICC3.Z.
+
+ " corcc gr29,gr29,gr0 ,cc3,#1 \n" <-- (4b)
+
+Such that the branch can then be taken if the operation was aborted.
+
+ " beq icc3,#0,0b \n" <-- (5)
+ : "+U"(v->counter), "=&r"(val)
+ : "NPr"(i)
+ : "memory", "cc7", "cc3", "icc3"
+ );
+
+ return val;
+ }
+
+
+=============
+CONFIGURATION
+=============
+
+The atomic ops implementation can be made inline or out-of-line by changing the
+CONFIG_FRV_OUTOFLINE_ATOMIC_OPS configuration variable. Making it out-of-line
has a number of
+advantages:
+
+ - The resulting kernel image may be smaller
+ - Debugging is easier as atomic ops can just be stepped over and they can be
breakpointed
+
+Keeping it inline also has a number of advantages:
+
+ - The resulting kernel may be Faster
+ - no out-of-line function calls need to be made
+ - the compiler doesn't have half its registers clobbered by making a call
+
+The out-of-line implementations live in arch/frv/lib/atomic-ops.S.
diff -urN linux/Documentation/fujitsu/frv/booting.txt
linux/Documentation/fujitsu/frv/booting.txt
--- linux/Documentation/fujitsu/frv/booting.txt 1970/01/01 00:00:00
+++ linux/Documentation/fujitsu/frv/booting.txt Thu Jan 13 14:05:15 2005
1.1
@@ -0,0 +1,181 @@
+ =========================
+ BOOTING FR-V LINUX KERNEL
+ =========================
+
+======================
+PROVIDING A FILESYSTEM
+======================
+
+First of all, a root filesystem must be made available. This can be done in
+one of two ways:
+
+ (1) NFS Export
+
+ A filesystem should be constructed in a directory on an NFS server that
+ the target board can reach. This directory should then be NFS exported
+ such that the target board can read and write into it as root.
+
+ (2) Flash Filesystem (JFFS2 Recommended)
+
+ In this case, the image must be stored or built up on flash before it
+ can be used. A complete image can be built using the mkfs.jffs2 or
+ similar program and then downloaded and stored into flash by RedBoot.
+
+
+========================
+LOADING THE KERNEL IMAGE
+========================
+
+The kernel will need to be loaded into RAM by RedBoot (or by some alternative
+boot loader) before it can be run. The kernel image (arch/frv/boot/Image) may
+be loaded in one of three ways:
+
+ (1) Load from Flash
+
+ This is the simplest. RedBoot can store an image in the flash (see the
+ RedBoot documentation) and then load it back into RAM. RedBoot keeps
+ track of the load address, entry point and size, so the command to do
+ this is simply:
+
+ fis load linux
+
+ The image is then ready to be executed.
+
+ (2) Load by TFTP
+
+ The following command will download a raw binary kernel image from the
+ default server (as negotiated by BOOTP) and store it into RAM:
+
+ load -b 0x00100000 -r /tftpboot/image.bin
+
+ The image is then ready to be executed.
+
+ (3) Load by Y-Modem
+
+ The following command will download a raw binary kernel image across the
+ serial port that RedBoot is currently using:
+
+ load -m ymodem -b 0x00100000 -r zImage
+
+ The serial client (such as minicom) must then be told to transmit the
+ program by Y-Modem.
+
+ When finished, the image will then be ready to be executed.
+
+
+==================
+BOOTING THE KERNEL
+==================
+
+Boot the image with the following RedBoot command:
+
+ exec -c "<CMDLINE>" 0x00100000
+
+For example:
+
+ exec -c "console=ttySM0,115200 ip=:::::dhcp root=/dev/mtdblock2 rw"
+
+This will start the kernel running. Note that if the GDB-stub is compiled in,
+then the kernel will immediately wait for GDB to connect over serial before
+doing anything else. See the section on kernel debugging with GDB.
+
+The kernel command line <CMDLINE> tells the kernel where its console is and
+how to find its root filesystem. This is made up of the following components,
+separated by spaces:
+
+ (*) console=ttyS<x>[,<baud>[<parity>[<bits>[<flow>]]]]
+
+ This specifies that the system console should output through on-chip
+ serial port <x> (which can be "0" or "1").
+
+ <baud> is a standard baud rate between 1200 and 115200 (default 9600).
+
+ <parity> is a parity setting of "N", "O", "E", "M" or "S" for None, Odd,
+ Even, Mark or Space. "None" is the default.
+
+ <stop> is "7" or "8" for the number of bits per character. "8" is the
+ default.
+
+ <flow> is "r" to use flow control (XCTS on serial port 2 only). The
+ default is to not use flow control.
+
+ For example:
+
+ console=ttyS0,115200
+
+ To use the first on-chip serial port at baud rate 115200, no parity, 8
+ bits, and no flow control.
+
+ (*) root=/dev/<xxxx>
+
+ This specifies the device upon which the root filesystem resides. For
+ example:
+
+ /dev/nfs NFS root filesystem
+ /dev/mtdblock3 Fourth RedBoot partition on the System Flash
+
+ (*) rw
+
+ Start with the root filesystem mounted Read/Write.
+
+ The remaining components are all optional:
+
+ (*) ip=<ip>::::<host>:<iface>:<cfg>
+
+ Configure the network interface. If <cfg> is "off" then <ip> should
+ specify the IP address for the network device <iface>. <host> provide
+ the hostname for the device.
+
+ If <cfg> is "bootp" or "dhcp", then all of these parameters will be
+ discovered by consulting a BOOTP or DHCP server.
+
+ For example, the following might be used:
+
+ ip=192.168.73.12::::frv:eth0:off
+
+ This sets the IP address on the VDK motherboard RTL8029 ethernet chipset
+ (eth0) to be 192.168.73.12, and sets the board's hostname to be "frv".
+
+ (*) nfsroot=<server>:<dir>[,v<vers>]
+
+ This is mandatory if "root=/dev/nfs" is given as an option. It tells the
+ kernel the IP address of the NFS server providing its root filesystem,
+ and the pathname on that server of the filesystem.
+
+ The NFS version to use can also be specified. v2 and v3 are supported by
+ Linux.
+
+ For example:
+
+ nfsroot=192.168.73.1:/nfsroot-frv
+
+ (*) profile=1
+
+ Turns on the kernel profiler (accessible through /proc/profile).
+
+ (*) console=gdb0
+
+ This can be used as an alternative to the "console=ttyS..." listed
+ above. I tells the kernel to pass the console output to GDB if the
+ gdbstub is compiled in to the kernel.
+
+ If this is used, then the gdbstub passes the text to GDB, which then
+ simply dumps it to its standard output.
+
+ (*) mem=<xxx>M
+
+ Normally the kernel will work out how much SDRAM it has by reading the
+ SDRAM controller registers. That can be overridden with this
+ option. This allows the kernel to be told that it has <xxx> megabytes of
+ memory available.
+
+ (*) init=<prog> [<arg> [<arg> [<arg> ...]]]
+
+ This tells the kernel what program to run initially. By default this is
+ /sbin/init, but /sbin/sash or /bin/sh are common alternatives.
+
+ (*) vdc=...
+
+ This option configures the MB93493 companion chip visual display
+ driver. Please see Documentation/fujitsu/mb93493/vdc.txt for more
+ information.
diff -urN linux/Documentation/fujitsu/frv/clock.txt
linux/Documentation/fujitsu/frv/clock.txt
--- linux/Documentation/fujitsu/frv/clock.txt 1970/01/01 00:00:00
+++ linux/Documentation/fujitsu/frv/clock.txt Thu Jan 13 14:05:15 2005
1.1
@@ -0,0 +1,65 @@
+Clock scaling
+-------------
+
+The kernel supports scaling of CLCK.CMODE, CLCK.CM and CLKC.P0 clock
+registers. If built with CONFIG_PM and CONFIG_SYSCTL options enabled, four
+extra files will appear in the directory /proc/sys/pm/. Reading these files
+will show:
+
+ p0 -- current value of the P0 bit in CLKC register.
+ cm -- current value of the CM bits in CLKC register.
+ cmode -- current value of the CMODE bits in CLKC register.
+
+On all boards, the 'p0' file should also be writable, and either '1' or '0'
+can be rewritten, to set or clear the CLKC_P0 bit respectively, hence
+controlling whether the resource bus rate clock is halved.
+
+The 'cm' file should also be available on all boards. '0' can be written to it
+to shift the board into High-Speed mode (normal), and '1' can be written to
+shift the board into Medium-Speed mode. Selecting Low-Speed mode is not
+supported by this interface, even though some CPUs do support it.
+
+On the boards with FR405 CPU (i.e. CB60 and CB70), the 'cmode' file is also
+writable, allowing the CPU core speed (and other clock speeds) to be
+controlled from userspace.
+
+
+Determining current and possible settings
+-----------------------------------------
+
+The current state and the available masks can be found in /proc/cpuinfo. For
+example, on the CB70:
+
+ # cat /proc/cpuinfo
+ CPU-Series: fr400
+ CPU-Core: fr405, gr0-31, BE, CCCR
+ CPU: mb93405
+ MMU: Prot
+ FP-Media: fr0-31, Media
+ System: mb93091-cb70, mb93090-mb00
+ PM-Controls: cmode=0xd31f, cm=0x3, p0=0x3, suspend=0x9
+ PM-Status: cmode=3, cm=0, p0=0
+ Clock-In: 50.00 MHz
+ Clock-Core: 300.00 MHz
+ Clock-SDRAM: 100.00 MHz
+ Clock-CBus: 100.00 MHz
+ Clock-Res: 50.00 MHz
+ Clock-Ext: 50.00 MHz
+ Clock-DSU: 25.00 MHz
+ BogoMips: 300.00
+
+And on the PDK, the PM lines look like the following:
+
+ PM-Controls: cm=0x3, p0=0x3, suspend=0x9
+ PM-Status: cmode=9, cm=0, p0=0
+
+The PM-Controls line, if present, will indicate which /proc/sys/pm files can
+be set to what values. The specification values are bitmasks; so, for example,
+"suspend=0x9" indicates that 0 and 3 can be written validly to
+/proc/sys/pm/suspend.
+
+The PM-Controls line will only be present if CONFIG_PM is configured to Y.
+
+The PM-Status line indicates which clock controls are set to which value. If
+the file can be read, then the suspend value must be 0, and so that's not
+included.
diff -urN linux/Documentation/fujitsu/frv/configuring.txt
linux/Documentation/fujitsu/frv/configuring.txt
--- linux/Documentation/fujitsu/frv/configuring.txt 1970/01/01 00:00:00
+++ linux/Documentation/fujitsu/frv/configuring.txt Thu Jan 13 14:05:15
2005 1.1
@@ -0,0 +1,125 @@
+ =======================================
+ FUJITSU FR-V LINUX KERNEL CONFIGURATION
+ =======================================
+
+=====================
+CONFIGURATION OPTIONS
+=====================
+
+The most important setting is in the "MMU support options" tab (the first
+presented in the configuration tools available):
+
+ (*) "Kernel Type"
+
+ This options allows selection of normal, MMU-requiring linux, and uClinux
+ (which doesn't require an MMU and doesn't have inter-process protection).
+
+There are a number of settings in the "Processor type and features" section of
+the kernel configuration that need to be considered.
+
+ (*) "CPU"
+
+ The register and instruction sets at the core of the processor. This can
+ only be set to "FR40x/45x/55x" at the moment - but this permits usage of
+ the kernel with MB93091 CB10, CB11, CB30, CB41, CB60, CB70 and CB451
+ CPU boards, and with the MB93093 PDK board.
+
+ (*) "System"
+
+ This option allows a choice of basic system. This governs the peripherals
+ that are expected to be available.
+
+ (*) "Motherboard"
+
+ This specifies the type of motherboard being used, and the peripherals
+ upon it. Currently only "MB93090-MB00" can be set here.
+
+ (*) "Default cache-write mode"
+
+ This controls the initial data cache write management mode. By default
+ Write-Through is selected, but Write-Back (Copy-Back) can also be
+ selected. This can be changed dynamically once the kernel is running (see
+ features.txt).
+
+There are some architecture specific configuration options in the "General
+Setup" section of the kernel configuration too:
+
+ (*) "Reserve memory uncached for (PCI) DMA"
+
+ This requests that a uClinux kernel set aside some memory in an uncached
+ window for the use as consistent DMA memory (mainly for PCI). At least a
+ megabyte will be allocated in this way, possibly more. Any memory so
+ reserved will not be available for normal allocations.
+
+ (*) "Kernel support for ELF-FDPIC binaries"
+
+ This enables the binary-format driver for the new FDPIC ELF binaries that
+ this platform normally uses. These binaries are totally relocatable -
+ their separate sections can relocated independently, allowing them to be
+ shared on uClinux where possible. This should normally be enabled.
+
+ (*) "Kernel image protection"
+
+ This makes the protection register governing access to the core kernel
+ image prohibit access by userspace programs. This option is available on
+ uClinux only.
+
+There are also a number of settings in the "Kernel Hacking" section of the
+kernel configuration especially for debugging a kernel on this
+architecture. See the "gdbstub.txt" file for information about those.
+
+
+======================
+DEFAULT CONFIGURATIONS
+======================
+
+The kernel sources include a number of example default configurations:
+
+ (*) defconfig-mb93091
+
+ Default configuration for the MB93091-VDK with both CPU board and
+ MB93090-MB00 motherboard running uClinux.
+
+
+ (*) defconfig-mb93091-fb
+
+ Default configuration for the MB93091-VDK with CPU board,
+ MB93090-MB00 motherboard, and DAV board running uClinux.
+ Includes framebuffer driver.
+
+
+ (*) defconfig-mb93093
+
+ Default configuration for the MB93093-PDK board running uClinux.
+
+
+ (*) defconfig-cb70-standalone
+
+ Default configuration for the MB93091-VDK with only CB70 CPU board
+ running uClinux. This will use the CB70's DM9000 for network access.
+
+
+ (*) defconfig-mmu
+
+ Default configuration for the MB93091-VDK with both CB451 CPU board and
+ MB93090-MB00 motherboard running MMU linux.
+
+ (*) defconfig-mmu-audio
+
+ Default configuration for the MB93091-VDK with CB451 CPU board, DAV
+ board, and MB93090-MB00 motherboard running MMU linux. Includes
+ audio driver.
+
+ (*) defconfig-mmu-fb
+
+ Default configuration for the MB93091-VDK with CB451 CPU board, DAV
+ board, and MB93090-MB00 motherboard running MMU linux. Includes
+ framebuffer driver.
+
+ (*) defconfig-mmu-standalone
+
+ Default configuration for the MB93091-VDK with only CB451 CPU board
+ running MMU linux.
+
+
+
diff -urN linux/Documentation/fujitsu/frv/features.txt
linux/Documentation/fujitsu/frv/features.txt
--- linux/Documentation/fujitsu/frv/features.txt 1970/01/01 00:00:00
+++ linux/Documentation/fujitsu/frv/features.txt Thu Jan 13 14:05:15
2005 1.1
@@ -0,0 +1,310 @@
+ ===========================
+ FUJITSU FR-V LINUX FEATURES
+ ===========================
+
+This kernel port has a number of features of which the user should be aware:
+
+ (*) Linux and uClinux
+
+ The FR-V architecture port supports both normal MMU linux and uClinux out
+ of the same sources.
+
+
+ (*) CPU support
+
+ Support for the FR401, FR403, FR405, FR451 and FR555 CPUs should work with
+ the same uClinux kernel configuration.
+
+ In normal (MMU) Linux mode, only the FR451 CPU will work as that is the
+ only one with a suitably featured CPU.
+
+ The kernel is written and compiled with the assumption that only the
+ bottom 32 GR registers and no FR registers will be used by the kernel
+ itself, however all extra userspace registers will be saved on context
+ switch. Note that since most CPUs can't support lazy switching, no attempt
+ is made to do lazy register saving where that would be possible (FR555
+ only currently).
+
+
+ (*) Board support
+
+ The board on which the kernel will run can be configured on the "Processor
+ type and features" configuration tab.
+
+ Set the System to "MB93093-PDK" to boot from the MB93093 (FR403) PDK.
+
+ Set the System to "MB93091-VDK" to boot from the CB11, CB30, CB41, CB60,
+ CB70 or CB451 VDK boards. Set the Motherboard setting to "MB93090-MB00" to
+ boot with the standard ATA90590B VDK motherboard, and set it to "None" to
+ boot without any motherboard.
+
+
+ (*) Binary Formats
+
+ The only userspace binary format supported is FDPIC ELF. Normal ELF, FLAT
+ and AOUT binaries are not supported for this architecture.
+
+ FDPIC ELF supports shared library and program interpreter facilities.
+
+
+ (*) Scheduler Speed
+
+ The kernel scheduler runs at 100Hz irrespective of the clock speed on this
+ architecture. This value is set in asm/param.h (see the HZ macro defined
+ there).
+
+
+ (*) Normal (MMU) Linux Memory Layout.
+
+ See mmu-layout.txt in this directory for a description of the normal linux
+ memory layout
+
+ See include/asm-frv/mem-layout.h for constants pertaining to the memory
+ layout.
+
+ See include/asm-frv/mb-regs.h for the constants pertaining to the I/O bus
+ controller configuration.
+
+
+ (*) uClinux Memory Layout
+
+ The memory layout used by the uClinux kernel is as follows:
+
+ 0x00000000 - 0x00000FFF Null pointer catch page
+ 0x20000000 - 0x200FFFFF CS2# [PDK] FPGA
+ 0xC0000000 - 0xCFFFFFFF SDRAM
+ 0xC0000000 Base of Linux kernel image
+ 0xE0000000 - 0xEFFFFFFF CS2# [VDK] SLBUS/PCI window
+ 0xF0000000 - 0xF0FFFFFF CS5# MB93493 CSC area (DAV daughter board)
+ 0xF1000000 - 0xF1FFFFFF CS7# [CB70/CB451] CPU-card PCMCIA port space
+ 0xFC000000 - 0xFC0FFFFF CS1# [VDK] MB86943 config space
+ 0xFC100000 - 0xFC1FFFFF CS6# [CB70/CB451] CPU-card DM9000 NIC space
+ 0xFC100000 - 0xFC1FFFFF CS6# [PDK] AX88796 NIC space
+ 0xFC200000 - 0xFC2FFFFF CS3# MB93493 CSR area (DAV daughter board)
+ 0xFD000000 - 0xFDFFFFFF CS4# [CB70/CB451] CPU-card extra flash space
+ 0xFE000000 - 0xFEFFFFFF Internal CPU peripherals
+ 0xFF000000 - 0xFF1FFFFF CS0# Flash 1
+ 0xFF200000 - 0xFF3FFFFF CS0# Flash 2
+ 0xFFC00000 - 0xFFC0001F CS0# [VDK] FPGA
+
+ The kernel reads the size of the SDRAM from the memory bus controller
+ registers by default.
+
+ The kernel initialisation code (1) adjusts the SDRAM base addresses to
+ move the SDRAM to desired address, (2) moves the kernel image down to the
+ bottom of SDRAM, (3) adjusts the bus controller registers to move I/O
+ windows, and (4) rearranges the protection registers to protect all of
+ this.
+
+ The reasons for doing this are: (1) the page at address 0 should be
+ inaccessible so that NULL pointer errors can be caught; and (2) the bottom
+ three quarters are left unoccupied so that an FR-V CPU with an MMU can use
+ it for virtual userspace mappings.
+
+ See include/asm-frv/mem-layout.h for constants pertaining to the memory
+ layout.
+
+ See include/asm-frv/mb-regs.h for the constants pertaining to the I/O bus
+ controller configuration.
+
+
+ (*) uClinux Memory Protection
+
+ A DAMPR register is used to cover the entire region used for I/O
+ (0xE0000000 - 0xFFFFFFFF). This permits the kernel to make uncached
+ accesses to this region. Userspace is not permitted to access it.
+
+ The DAMPR/IAMPR protection registers not in use for any other purpose are
+ tiled over the top of the SDRAM such that:
+
+ (1) The core kernel image is covered by as small a tile as possible
+ granting only the kernel access to the underlying data, whilst
+ making sure no SDRAM is actually made unavailable by this approach.
+
+ (2) All other tiles are arranged to permit userspace access to the rest
+ of the SDRAM.
+
+ Barring point (1), there is nothing to protect kernel data against
+ userspace damage - but this is uClinux.
+
+
+ (*) Exceptions and Fixups
+
+ Since the FR40x and FR55x CPUs that do not have full MMUs generate
+ imprecise data error exceptions, there are currently no automatic fixup
+ services available in uClinux. This includes misaligned memory access
+ fixups.
+
+ Userspace EFAULT errors can be trapped by issuing a MEMBAR instruction and
+ forcing the fault to happen there.
+
+ On the FR451, however, data exceptions are mostly precise, and so
+ exception fixup handling is implemented as normal.
+
+
+ (*) Userspace Breakpoints
+
+ The ptrace() system call supports the following userspace debugging
+ features:
+
+ (1) Hardware assisted single step.
+
+ (2) Breakpoint via the FR-V "BREAK" instruction.
+
+ (3) Breakpoint via the FR-V "TIRA GR0, #1" instruction.
+
+ (4) Syscall entry/exit trap.
+
+ Each of the above generates a SIGTRAP.
+
+
+ (*) On-Chip Serial Ports
+
+ The FR-V on-chip serial ports are made available as ttyS0 and ttyS1. Note
+ that if the GDB stub is compiled in, ttyS1 will not actually be available
+ as it will be being used for the GDB stub.
+
+ These ports can be made by:
+
+ mknod /dev/ttyS0 c 4 64
+ mknod /dev/ttyS1 c 4 65
+
+
+ (*) Maskable Interrupts
+
+ Level 15 (Non-maskable) interrupts are dealt with by the GDB stub if
+ present, and cause a panic if not. If the GDB stub is present, ttyS1's
+ interrupts are rated at level 15.
+
+ All other interrupts are distributed over the set of available priorities
+ so that no IRQs are shared where possible. The arch interrupt handling
+ routines attempt to disentangle the various sources available through the
+ CPU's own multiplexor, and those on off-CPU peripherals.
+
+
+ (*) Accessing PCI Devices
+
+ Where PCI is available, care must be taken when dealing with drivers that
+ access PCI devices. PCI devices present their data in little-endian form,
+ but the CPU sees it in big-endian form. The macros in asm/io.h try to get
+ this right, but may not under all circumstances...
+
+
+ (*) Ax88796 Ethernet Driver
+
+ The MB93093 PDK board has an Ax88796 ethernet chipset (an NE2000 clone). A
+ driver has been written to deal specifically with this. The driver
+ provides MII services for the card.
+
+ The driver can be configured by running make xconfig, and going to:
+
+ (*) Network device support
+ - turn on "Network device support"
+ (*) Ethernet (10 or 100Mbit)
+ - turn on "Ethernet (10 or 100Mbit)"
+ - turn on "AX88796 NE2000 compatible chipset"
+
+ The driver can be found in:
+
+ drivers/net/ax88796.c
+ include/asm/ax88796.h
+
+
+ (*) WorkRAM Driver
+
+ This driver provides a character device that permits access to the WorkRAM
+ that can be found on the FR451 CPU. Each page is accessible through a
+ separate minor number, thereby permitting each page to have its own
+ filesystem permissions set on the device file.
+
+ The device files should be:
+
+ mknod /dev/frv/workram0 c 240 0
+ mknod /dev/frv/workram1 c 240 1
+ mknod /dev/frv/workram2 c 240 2
+ ...
+
+ The driver will not permit the opening of any device file that does not
+ correspond to at least a partial page of WorkRAM. So the first device file
+ is the only one available on the FR451. If any other CPU is detected, none
+ of the devices will be openable.
+
+ The devices can be accessed with read, write and llseek, and can also be
+ mmapped. If they're mmapped, they will only map at the appropriate
+ 0x7e8nnnnn address on linux and at the 0xfe8nnnnn address on uClinux. If
+ MAP_FIXED is not specified, the appropriate address will be chosen anyway.
+
+ The mappings must be MAP_SHARED not MAP_PRIVATE, and must not be
+ PROT_EXEC. They must also start at file offset 0, and must not be longer
+ than one page in size.
+
+ This driver can be configured by running make xconfig, and going to:
+
+ (*) Character devices
+ - turn on "Fujitsu FR-V CPU WorkRAM support"
+
+
+ (*) Dynamic data cache write mode changing
+
+ It is possible to view and to change the data cache's write mode through
+ the /proc/sys/frv/cache-mode file while the kernel is running. There are
+ two modes available:
+
+ NAME MEANING
+ ===== ==========================================
+ wthru Data cache is in Write-Through mode
+ wback Data cache is in Write-Back/Copy-Back mode
+
+ To read the cache mode:
+
+ # cat /proc/sys/frv/cache-mode
+ wthru
+
+ To change the cache mode:
+
+ # echo wback >/proc/sys/frv/cache-mode
+ # cat /proc/sys/frv/cache-mode
+ wback
+
+
+ (*) MMU Context IDs and Pinning
+
+ On MMU Linux the CPU supports the concept of a context ID in its MMU to
+ make it more efficient (TLB entries are labelled with a context ID to link
+ them to specific tasks).
+
+ Normally once a context ID is allocated, it will remain affixed to a task
+ or CLONE_VM'd group of tasks for as long as it exists. However, since the
+ kernel is capable of supporting more tasks than there are possible ID
+ numbers, the kernel will pass context IDs from one task to another if
+ there are insufficient available.
+
+ The context ID currently in use by a task can be viewed in /proc:
+
+ # grep CXNR /proc/1/status
+ CXNR: 1
+
+ Note that kernel threads do not have a userspace context, and so will not
+ show a CXNR entry in that file.
+
+ Under some circumstances, however, it is desirable to pin a context ID on
+ a process such that the kernel won't pass it on. This can be done by
+ writing the process ID of the target process to a special file:
+
+ # echo 17 >/proc/sys/frv/pin-cxnr
+
+ Reading from the file will then show the context ID pinned.
+
+ # cat /proc/sys/frv/pin-cxnr
+ 4
+
+ The context ID will remain pinned as long as any process is using that
+ context, i.e.: when the all the subscribing processes have exited or
+ exec'd; or when an unpinning request happens:
+
+ # echo 0 >/proc/sys/frv/pin-cxnr
+
+ When there isn't a pinned context, the file shows -1:
+
+ # cat /proc/sys/frv/pin-cxnr
+ -1
diff -urN linux/Documentation/fujitsu/frv/gdbinit
linux/Documentation/fujitsu/frv/gdbinit
--- linux/Documentation/fujitsu/frv/gdbinit 1970/01/01 00:00:00
+++ linux/Documentation/fujitsu/frv/gdbinit Thu Jan 13 14:05:15 2005
1.1
@@ -0,0 +1,102 @@
+set remotebreak 1
+
+define _amr
+
+printf "AMRx DAMR IAMR \n"
+printf "==== ===================== =====================\n"
+printf "amr0 : L:%08lx P:%08lx : L:%08lx
P:%08lx\n",__debug_mmu.damr[0x0].L,__debug_mmu.damr[0x0].P,__debug_mmu.iamr[0x0].L,__debug_mmu.iamr[0x0].P
+printf "amr1 : L:%08lx P:%08lx : L:%08lx
P:%08lx\n",__debug_mmu.damr[0x1].L,__debug_mmu.damr[0x1].P,__debug_mmu.iamr[0x1].L,__debug_mmu.iamr[0x1].P
+printf "amr2 : L:%08lx P:%08lx : L:%08lx
P:%08lx\n",__debug_mmu.damr[0x2].L,__debug_mmu.damr[0x2].P,__debug_mmu.iamr[0x2].L,__debug_mmu.iamr[0x2].P
+printf "amr3 : L:%08lx P:%08lx : L:%08lx
P:%08lx\n",__debug_mmu.damr[0x3].L,__debug_mmu.damr[0x3].P,__debug_mmu.iamr[0x3].L,__debug_mmu.iamr[0x3].P
+printf "amr4 : L:%08lx P:%08lx : L:%08lx
P:%08lx\n",__debug_mmu.damr[0x4].L,__debug_mmu.damr[0x4].P,__debug_mmu.iamr[0x4].L,__debug_mmu.iamr[0x4].P
+printf "amr5 : L:%08lx P:%08lx : L:%08lx
P:%08lx\n",__debug_mmu.damr[0x5].L,__debug_mmu.damr[0x5].P,__debug_mmu.iamr[0x5].L,__debug_mmu.iamr[0x5].P
+printf "amr6 : L:%08lx P:%08lx : L:%08lx
P:%08lx\n",__debug_mmu.damr[0x6].L,__debug_mmu.damr[0x6].P,__debug_mmu.iamr[0x6].L,__debug_mmu.iamr[0x6].P
+printf "amr7 : L:%08lx P:%08lx : L:%08lx
P:%08lx\n",__debug_mmu.damr[0x7].L,__debug_mmu.damr[0x7].P,__debug_mmu.iamr[0x7].L,__debug_mmu.iamr[0x7].P
+
+printf "amr8 : L:%08lx
P:%08lx\n",__debug_mmu.damr[0x8].L,__debug_mmu.damr[0x8].P
+printf "amr9 : L:%08lx
P:%08lx\n",__debug_mmu.damr[0x9].L,__debug_mmu.damr[0x9].P
+printf "amr10: L:%08lx
P:%08lx\n",__debug_mmu.damr[0xa].L,__debug_mmu.damr[0xa].P
+printf "amr11: L:%08lx
P:%08lx\n",__debug_mmu.damr[0xb].L,__debug_mmu.damr[0xb].P
+
+end
+
+
+define _tlb
+printf "tlb[0x00]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x0].L,__debug_mmu.tlb[0x0].P,__debug_mmu.tlb[0x40+0x0].L,__debug_mmu.tlb[0x40+0x0].P
+printf "tlb[0x01]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x1].L,__debug_mmu.tlb[0x1].P,__debug_mmu.tlb[0x40+0x1].L,__debug_mmu.tlb[0x40+0x1].P
+printf "tlb[0x02]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x2].L,__debug_mmu.tlb[0x2].P,__debug_mmu.tlb[0x40+0x2].L,__debug_mmu.tlb[0x40+0x2].P
+printf "tlb[0x03]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x3].L,__debug_mmu.tlb[0x3].P,__debug_mmu.tlb[0x40+0x3].L,__debug_mmu.tlb[0x40+0x3].P
+printf "tlb[0x04]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x4].L,__debug_mmu.tlb[0x4].P,__debug_mmu.tlb[0x40+0x4].L,__debug_mmu.tlb[0x40+0x4].P
+printf "tlb[0x05]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x5].L,__debug_mmu.tlb[0x5].P,__debug_mmu.tlb[0x40+0x5].L,__debug_mmu.tlb[0x40+0x5].P
+printf "tlb[0x06]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x6].L,__debug_mmu.tlb[0x6].P,__debug_mmu.tlb[0x40+0x6].L,__debug_mmu.tlb[0x40+0x6].P
+printf "tlb[0x07]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x7].L,__debug_mmu.tlb[0x7].P,__debug_mmu.tlb[0x40+0x7].L,__debug_mmu.tlb[0x40+0x7].P
+printf "tlb[0x08]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x8].L,__debug_mmu.tlb[0x8].P,__debug_mmu.tlb[0x40+0x8].L,__debug_mmu.tlb[0x40+0x8].P
+printf "tlb[0x09]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x9].L,__debug_mmu.tlb[0x9].P,__debug_mmu.tlb[0x40+0x9].L,__debug_mmu.tlb[0x40+0x9].P
+printf "tlb[0x0a]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0xa].L,__debug_mmu.tlb[0xa].P,__debug_mmu.tlb[0x40+0xa].L,__debug_mmu.tlb[0x40+0xa].P
+printf "tlb[0x0b]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0xb].L,__debug_mmu.tlb[0xb].P,__debug_mmu.tlb[0x40+0xb].L,__debug_mmu.tlb[0x40+0xb].P
+printf "tlb[0x0c]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0xc].L,__debug_mmu.tlb[0xc].P,__debug_mmu.tlb[0x40+0xc].L,__debug_mmu.tlb[0x40+0xc].P
+printf "tlb[0x0d]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0xd].L,__debug_mmu.tlb[0xd].P,__debug_mmu.tlb[0x40+0xd].L,__debug_mmu.tlb[0x40+0xd].P
+printf "tlb[0x0e]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0xe].L,__debug_mmu.tlb[0xe].P,__debug_mmu.tlb[0x40+0xe].L,__debug_mmu.tlb[0x40+0xe].P
+printf "tlb[0x0f]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0xf].L,__debug_mmu.tlb[0xf].P,__debug_mmu.tlb[0x40+0xf].L,__debug_mmu.tlb[0x40+0xf].P
+printf "tlb[0x10]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x10].L,__debug_mmu.tlb[0x10].P,__debug_mmu.tlb[0x40+0x10].L,__debug_mmu.tlb[0x40+0x10].P
+printf "tlb[0x11]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x11].L,__debug_mmu.tlb[0x11].P,__debug_mmu.tlb[0x40+0x11].L,__debug_mmu.tlb[0x40+0x11].P
+printf "tlb[0x12]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x12].L,__debug_mmu.tlb[0x12].P,__debug_mmu.tlb[0x40+0x12].L,__debug_mmu.tlb[0x40+0x12].P
+printf "tlb[0x13]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x13].L,__debug_mmu.tlb[0x13].P,__debug_mmu.tlb[0x40+0x13].L,__debug_mmu.tlb[0x40+0x13].P
+printf "tlb[0x14]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x14].L,__debug_mmu.tlb[0x14].P,__debug_mmu.tlb[0x40+0x14].L,__debug_mmu.tlb[0x40+0x14].P
+printf "tlb[0x15]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x15].L,__debug_mmu.tlb[0x15].P,__debug_mmu.tlb[0x40+0x15].L,__debug_mmu.tlb[0x40+0x15].P
+printf "tlb[0x16]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x16].L,__debug_mmu.tlb[0x16].P,__debug_mmu.tlb[0x40+0x16].L,__debug_mmu.tlb[0x40+0x16].P
+printf "tlb[0x17]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x17].L,__debug_mmu.tlb[0x17].P,__debug_mmu.tlb[0x40+0x17].L,__debug_mmu.tlb[0x40+0x17].P
+printf "tlb[0x18]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x18].L,__debug_mmu.tlb[0x18].P,__debug_mmu.tlb[0x40+0x18].L,__debug_mmu.tlb[0x40+0x18].P
+printf "tlb[0x19]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x19].L,__debug_mmu.tlb[0x19].P,__debug_mmu.tlb[0x40+0x19].L,__debug_mmu.tlb[0x40+0x19].P
+printf "tlb[0x1a]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x1a].L,__debug_mmu.tlb[0x1a].P,__debug_mmu.tlb[0x40+0x1a].L,__debug_mmu.tlb[0x40+0x1a].P
+printf "tlb[0x1b]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x1b].L,__debug_mmu.tlb[0x1b].P,__debug_mmu.tlb[0x40+0x1b].L,__debug_mmu.tlb[0x40+0x1b].P
+printf "tlb[0x1c]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x1c].L,__debug_mmu.tlb[0x1c].P,__debug_mmu.tlb[0x40+0x1c].L,__debug_mmu.tlb[0x40+0x1c].P
+printf "tlb[0x1d]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x1d].L,__debug_mmu.tlb[0x1d].P,__debug_mmu.tlb[0x40+0x1d].L,__debug_mmu.tlb[0x40+0x1d].P
+printf "tlb[0x1e]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x1e].L,__debug_mmu.tlb[0x1e].P,__debug_mmu.tlb[0x40+0x1e].L,__debug_mmu.tlb[0x40+0x1e].P
+printf "tlb[0x1f]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x1f].L,__debug_mmu.tlb[0x1f].P,__debug_mmu.tlb[0x40+0x1f].L,__debug_mmu.tlb[0x40+0x1f].P
+printf "tlb[0x20]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x20].L,__debug_mmu.tlb[0x20].P,__debug_mmu.tlb[0x40+0x20].L,__debug_mmu.tlb[0x40+0x20].P
+printf "tlb[0x21]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x21].L,__debug_mmu.tlb[0x21].P,__debug_mmu.tlb[0x40+0x21].L,__debug_mmu.tlb[0x40+0x21].P
+printf "tlb[0x22]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x22].L,__debug_mmu.tlb[0x22].P,__debug_mmu.tlb[0x40+0x22].L,__debug_mmu.tlb[0x40+0x22].P
+printf "tlb[0x23]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x23].L,__debug_mmu.tlb[0x23].P,__debug_mmu.tlb[0x40+0x23].L,__debug_mmu.tlb[0x40+0x23].P
+printf "tlb[0x24]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x24].L,__debug_mmu.tlb[0x24].P,__debug_mmu.tlb[0x40+0x24].L,__debug_mmu.tlb[0x40+0x24].P
+printf "tlb[0x25]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x25].L,__debug_mmu.tlb[0x25].P,__debug_mmu.tlb[0x40+0x25].L,__debug_mmu.tlb[0x40+0x25].P
+printf "tlb[0x26]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x26].L,__debug_mmu.tlb[0x26].P,__debug_mmu.tlb[0x40+0x26].L,__debug_mmu.tlb[0x40+0x26].P
+printf "tlb[0x27]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x27].L,__debug_mmu.tlb[0x27].P,__debug_mmu.tlb[0x40+0x27].L,__debug_mmu.tlb[0x40+0x27].P
+printf "tlb[0x28]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x28].L,__debug_mmu.tlb[0x28].P,__debug_mmu.tlb[0x40+0x28].L,__debug_mmu.tlb[0x40+0x28].P
+printf "tlb[0x29]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x29].L,__debug_mmu.tlb[0x29].P,__debug_mmu.tlb[0x40+0x29].L,__debug_mmu.tlb[0x40+0x29].P
+printf "tlb[0x2a]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x2a].L,__debug_mmu.tlb[0x2a].P,__debug_mmu.tlb[0x40+0x2a].L,__debug_mmu.tlb[0x40+0x2a].P
+printf "tlb[0x2b]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x2b].L,__debug_mmu.tlb[0x2b].P,__debug_mmu.tlb[0x40+0x2b].L,__debug_mmu.tlb[0x40+0x2b].P
+printf "tlb[0x2c]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x2c].L,__debug_mmu.tlb[0x2c].P,__debug_mmu.tlb[0x40+0x2c].L,__debug_mmu.tlb[0x40+0x2c].P
+printf "tlb[0x2d]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x2d].L,__debug_mmu.tlb[0x2d].P,__debug_mmu.tlb[0x40+0x2d].L,__debug_mmu.tlb[0x40+0x2d].P
+printf "tlb[0x2e]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x2e].L,__debug_mmu.tlb[0x2e].P,__debug_mmu.tlb[0x40+0x2e].L,__debug_mmu.tlb[0x40+0x2e].P
+printf "tlb[0x2f]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x2f].L,__debug_mmu.tlb[0x2f].P,__debug_mmu.tlb[0x40+0x2f].L,__debug_mmu.tlb[0x40+0x2f].P
+printf "tlb[0x30]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x30].L,__debug_mmu.tlb[0x30].P,__debug_mmu.tlb[0x40+0x30].L,__debug_mmu.tlb[0x40+0x30].P
+printf "tlb[0x31]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x31].L,__debug_mmu.tlb[0x31].P,__debug_mmu.tlb[0x40+0x31].L,__debug_mmu.tlb[0x40+0x31].P
+printf "tlb[0x32]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x32].L,__debug_mmu.tlb[0x32].P,__debug_mmu.tlb[0x40+0x32].L,__debug_mmu.tlb[0x40+0x32].P
+printf "tlb[0x33]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x33].L,__debug_mmu.tlb[0x33].P,__debug_mmu.tlb[0x40+0x33].L,__debug_mmu.tlb[0x40+0x33].P
+printf "tlb[0x34]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x34].L,__debug_mmu.tlb[0x34].P,__debug_mmu.tlb[0x40+0x34].L,__debug_mmu.tlb[0x40+0x34].P
+printf "tlb[0x35]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x35].L,__debug_mmu.tlb[0x35].P,__debug_mmu.tlb[0x40+0x35].L,__debug_mmu.tlb[0x40+0x35].P
+printf "tlb[0x36]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x36].L,__debug_mmu.tlb[0x36].P,__debug_mmu.tlb[0x40+0x36].L,__debug_mmu.tlb[0x40+0x36].P
+printf "tlb[0x37]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x37].L,__debug_mmu.tlb[0x37].P,__debug_mmu.tlb[0x40+0x37].L,__debug_mmu.tlb[0x40+0x37].P
+printf "tlb[0x38]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x38].L,__debug_mmu.tlb[0x38].P,__debug_mmu.tlb[0x40+0x38].L,__debug_mmu.tlb[0x40+0x38].P
+printf "tlb[0x39]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x39].L,__debug_mmu.tlb[0x39].P,__debug_mmu.tlb[0x40+0x39].L,__debug_mmu.tlb[0x40+0x39].P
+printf "tlb[0x3a]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x3a].L,__debug_mmu.tlb[0x3a].P,__debug_mmu.tlb[0x40+0x3a].L,__debug_mmu.tlb[0x40+0x3a].P
+printf "tlb[0x3b]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x3b].L,__debug_mmu.tlb[0x3b].P,__debug_mmu.tlb[0x40+0x3b].L,__debug_mmu.tlb[0x40+0x3b].P
+printf "tlb[0x3c]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x3c].L,__debug_mmu.tlb[0x3c].P,__debug_mmu.tlb[0x40+0x3c].L,__debug_mmu.tlb[0x40+0x3c].P
+printf "tlb[0x3d]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x3d].L,__debug_mmu.tlb[0x3d].P,__debug_mmu.tlb[0x40+0x3d].L,__debug_mmu.tlb[0x40+0x3d].P
+printf "tlb[0x3e]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x3e].L,__debug_mmu.tlb[0x3e].P,__debug_mmu.tlb[0x40+0x3e].L,__debug_mmu.tlb[0x40+0x3e].P
+printf "tlb[0x3f]: %08lx %08lx %08lx
%08lx\n",__debug_mmu.tlb[0x3f].L,__debug_mmu.tlb[0x3f].P,__debug_mmu.tlb[0x40+0x3f].L,__debug_mmu.tlb[0x40+0x3f].P
+end
+
+
+define _pgd
+p (pgd_t[0x40])*(pgd_t*)(__debug_mmu.damr[0x3].L)
+end
+
+define _ptd_i
+p (pte_t[0x1000])*(pte_t*)(__debug_mmu.damr[0x4].L)
+end
+
+define _ptd_d
+p (pte_t[0x1000])*(pte_t*)(__debug_mmu.damr[0x5].L)
+end
diff -urN linux/Documentation/fujitsu/frv/gdbstub.txt
linux/Documentation/fujitsu/frv/gdbstub.txt
--- linux/Documentation/fujitsu/frv/gdbstub.txt 1970/01/01 00:00:00
+++ linux/Documentation/fujitsu/frv/gdbstub.txt Thu Jan 13 14:05:15 2005
1.1
@@ -0,0 +1,130 @@
+ ====================
+ DEBUGGING FR-V LINUX
+ ====================
+
+
+The kernel contains a GDB stub that talks GDB remote protocol across a serial
+port. This permits GDB to single step through the kernel, set breakpoints and
+trap exceptions that happen in kernel space and interrupt execution. It also
+permits the NMI interrupt button or serial port events to jump the kernel into
+the debugger.
+
+On the CPUs that have on-chip UARTs (FR400, FR403, FR405, FR555), the
+GDB stub hijacks a serial port for its own purposes, and makes it
+generate level 15 interrupts (NMI). The kernel proper cannot see the serial
+port in question under these conditions.
+
+On the MB93091-VDK CPU boards, the GDB stub uses UART1, which would otherwise
+be /dev/ttyS1. On the MB93093-PDK, the GDB stub uses UART0. Therefore, on the
+PDK there is no externally accessible serial port and the serial port to
+which the touch screen is attached becomes /dev/ttyS0.
+
+Note that the GDB stub runs entirely within CPU debug mode, and so should not
+incur any exceptions or interrupts whilst it is active. In particular, note
+that the clock will lose time since it is implemented in software.
+
+
+==================
+KERNEL PREPARATION
+==================
+
+Firstly, a debuggable kernel must be built. To do this, unpack the kernel tree
+and copy the configuration that you wish to use to .config. Then reconfigure
+the following things on the "Kernel Hacking" tab:
+
+ (*) "Include debugging information"
+
+ Set this to "Y". This causes all C and Assembly files to be compiled
+ to include debugging information.
+
+ (*) "In-kernel GDB stub"
+
+ Set this to "Y". This causes the GDB stub to be compiled into the
+ kernel.
+
+ (*) "Immediate activation"
+
+ Set this to "Y" if you want the GDB stub to activate as soon as possible
+ and wait for GDB to connect. This allows you to start tracing right from
+ the beginning of start_kernel() in init/main.c.
+
+ (*) "Console through GDB stub"
+
+ Set this to "Y" if you wish to be able to use "console=gdb0" on the
+ command line. That tells the kernel to pass system console messages to
+ GDB (which then prints them on its standard output). This is useful when
+ debugging the serial drivers that'd otherwise be used to pass console
+ messages to the outside world.
+
+Then build as usual, download to the board and execute. Note that if
+"Immediate activation" was selected, then the kernel will wait for GDB to
+attach. If not, then the kernel will boot immediately and GDB will have to
+interupt it or wait for an exception to occur if before doing anything with
+the kernel.
+
+
+=========================
+KERNEL DEBUGGING WITH GDB
+=========================
+
+Set the serial port on the computer that's going to run GDB to the appropriate
+baud rate. Assuming the board's debug port is connected to ttyS0/COM1 on the
+computer doing the debugging:
+
+ stty -F /dev/ttyS0 115200
+
+Then start GDB in the base of the kernel tree:
+
+ frv-uclinux-gdb linux [uClinux]
+
+Or:
+
+ frv-uclinux-gdb vmlinux [MMU linux]
+
+When the prompt appears:
+
+ GNU gdb frv-031024
+ Copyright 2003 Free Software Foundation, Inc.
+ GDB is free software, covered by the GNU General Public License, and
you are
+ welcome to change it and/or distribute copies of it under certain
conditions.
+ Type "show copying" to see the conditions.
+ There is absolutely no warranty for GDB. Type "show warranty" for
details.
+ This GDB was configured as "--host=i686-pc-linux-gnu
--target=frv-uclinux"...
+ (gdb)
+
+Attach to the board like this:
+
+ (gdb) target remote /dev/ttyS0
+ Remote debugging using /dev/ttyS0
+ start_kernel () at init/main.c:395
+ (gdb)
+
+This should show the appropriate lines from the source too. The kernel can
+then be debugged almost as if it's any other program.
+
+
+===============================
+INTERRUPTING THE RUNNING KERNEL
+===============================
+
+The kernel can be interrupted whilst it is running, causing a jump back to the
+GDB stub and the debugger:
+
+ (*) Pressing Ctrl-C in GDB. This will cause GDB to try and interrupt the
+ kernel by sending an RS232 BREAK over the serial line to the GDB
+ stub. This will (mostly) immediately interrupt the kernel and return it
+ to the debugger.
+
+ (*) Pressing the NMI button on the board will also cause a jump into the
+ debugger.
+
+ (*) Setting a software breakpoint. This sets a break instruction at the
+ desired location which the GDB stub then traps the exception for.
+
+ (*) Setting a hardware breakpoint. The GDB stub is capable of using the IBAR
+ and DBAR registers to assist debugging.
+
+Furthermore, the GDB stub will intercept a number of exceptions automatically
+if they are caused by kernel execution. It will also intercept BUG() macro
+invokation.
+
diff -urN linux/Documentation/fujitsu/frv/mmu-layout.txt
linux/Documentation/fujitsu/frv/mmu-layout.txt
--- linux/Documentation/fujitsu/frv/mmu-layout.txt 1970/01/01 00:00:00
+++ linux/Documentation/fujitsu/frv/mmu-layout.txt Thu Jan 13 14:05:15
2005 1.1
@@ -0,0 +1,306 @@
+ =================================
+ FR451 MMU LINUX MEMORY MANAGEMENT
+ =================================
+
+============
+MMU HARDWARE
+============
+
+FR451 MMU Linux puts the MMU into EDAT mode whilst running. This means that it
uses both the SAT
+registers and the DAT TLB to perform address translation.
+
+There are 8 IAMLR/IAMPR register pairs and 16 DAMLR/DAMPR register pairs for
SAT mode.
+
+In DAT mode, there is also a TLB organised in cache format as 64 lines x 2
ways. Each line spans a
+16KB range of addresses, but can match a larger region.
+
+
+===========================
+MEMORY MANAGEMENT REGISTERS
+===========================
+
+Certain control registers are used by the kernel memory management routines:
+
+ REGISTERS USAGE
+ ======================
==================================================
+ IAMR0, DAMR0 Kernel image and data mappings
+ IAMR1, DAMR1 First-chance TLB lookup mapping
+ DAMR2 Page attachment for cache flush by page
+ DAMR3 Current PGD mapping
+ SCR0, DAMR4 Instruction TLB PGE/PTD cache
+ SCR1, DAMR5 Data TLB PGE/PTD cache
+ DAMR6-10 kmap_atomic() mappings
+ DAMR11 I/O mapping
+ CXNR mm_struct context ID
+ TTBR Page directory (PGD) pointer (physical address)
+
+
+=====================
+GENERAL MEMORY LAYOUT
+=====================
+
+The physical memory layout is as follows:
+
+ PHYSICAL ADDRESS CONTROLLER DEVICE
+ =================== ============== =======================================
+ 00000000 - BFFFFFFF SDRAM SDRAM area
+ E0000000 - EFFFFFFF L-BUS CS2# VDK SLBUS/PCI window
+ F0000000 - F0FFFFFF L-BUS CS5# MB93493 CSC area (DAV daughter board)
+ F1000000 - F1FFFFFF L-BUS CS7# (CB70 CPU-card PCMCIA port I/O space)
+ FC000000 - FC0FFFFF L-BUS CS1# VDK MB86943 config space
+ FC100000 - FC1FFFFF L-BUS CS6# DM9000 NIC I/O space
+ FC200000 - FC2FFFFF L-BUS CS3# MB93493 CSR area (DAV daughter board)
+ FD000000 - FDFFFFFF L-BUS CS4# (CB70 CPU-card extra flash space)
+ FE000000 - FEFFFFFF Internal CPU peripherals
+ FF000000 - FF1FFFFF L-BUS CS0# Flash 1
+ FF200000 - FF3FFFFF L-BUS CS0# Flash 2
+ FFC00000 - FFC0001F L-BUS CS0# FPGA
+
+The virtual memory layout is:
+
+ VIRTUAL ADDRESS PHYSICAL TRANSLATOR FLAGS SIZE OCCUPATION
+ ================= ======== ============== ======= =======
===================================
+ 00004000-BFFFFFFF various TLB,xAMR1 D-N-??V 3GB Userspace
+ C0000000-CFFFFFFF 00000000 xAMPR0 -L-S--V 256MB Kernel image
and data
+ D0000000-D7FFFFFF various TLB,xAMR1 D-NS??V 128MB vmalloc area
+ D8000000-DBFFFFFF various TLB,xAMR1 D-NS??V 64MB kmap() area
+ DC000000-DCFFFFFF various TLB 1MB Secondary
kmap_atomic() frame
+ DD000000-DD27FFFF various DAMR 160KB Primary
kmap_atomic() frame
+ DD040000 DAMR2/IAMR2 -L-S--V page Page cache
flush attachment point
+ DD080000 DAMR3 -L-SC-V page Page Directory
(PGD)
+ DD0C0000 DAMR4 -L-SC-V page Cached insn TLB
Page Table lookup
+ DD100000 DAMR5 -L-SC-V page Cached data TLB
Page Table lookup
+ DD140000 DAMR6 -L-S--V page
kmap_atomic(KM_BOUNCE_READ)
+ DD180000 DAMR7 -L-S--V page
kmap_atomic(KM_SKB_SUNRPC_DATA)
+ DD1C0000 DAMR8 -L-S--V page
kmap_atomic(KM_SKB_DATA_SOFTIRQ)
+ DD200000 DAMR9 -L-S--V page
kmap_atomic(KM_USER0)
+ DD240000 DAMR10 -L-S--V page
kmap_atomic(KM_USER1)
+ E0000000-FFFFFFFF E0000000 DAMR11 -L-SC-V 512MB I/O region
+
+IAMPR1 and DAMPR1 are used as an extension to the TLB.
+
+
+====================
+KMAP AND KMAP_ATOMIC
+====================
+
+To access pages in the page cache (which may not be directly accessible if
highmem is available),
+the kernel calls kmap(), does the access and then calls kunmap(); or it calls
kmap_atomic(), does
+the access and then calls kunmap_atomic().
+
+kmap() creates an attachment between an arbitrary inaccessible page and a
range of virtual
+addresses by installing a PTE in a special page table. The kernel can then
access this page as it
+wills. When it's finished, the kernel calls kunmap() to clear the PTE.
+
+kmap_atomic() does something slightly different. In the interests of speed, it
chooses one of two
+strategies:
+
+ (1) If possible, kmap_atomic() attaches the requested page to one of DAMPR5
through DAMPR10
+ register pairs; and the matching kunmap_atomic() clears the DAMPR. This
makes high memory
+ support really fast as there's no need to flush the TLB or modify the
page tables. The DAMLR
+ registers being used for this are preset during boot and don't change
over the lifetime of the
+ process. There's a direct mapping between the first few kmap_atomic()
types, DAMR number and
+ virtual address slot.
+
+ However, there are more kmap_atomic() types defined than there are DAMR
registers available,
+ so we fall back to:
+
+ (2) kmap_atomic() uses a slot in the secondary frame (determined by the type
parameter), and then
+ locks an entry in the TLB to translate that slot to the specified page.
The number of slots is
+ obviously limited, and their positions are controlled such that each slot
is matched by a
+ different line in the TLB. kunmap() ejects the entry from the TLB.
+
+Note that the first three kmap atomic types are really just declared as
placeholders. The DAMPR
+registers involved are actually modified directly.
+
+Also note that kmap() itself may sleep, kmap_atomic() may never sleep and both
always succeed;
+furthermore, a driver using kmap() may sleep before calling kunmap(), but may
not sleep before
+calling kunmap_atomic() if it had previously called kmap_atomic().
+
+
+===============================
+USING MORE THAN 256MB OF MEMORY
+===============================
+
+The kernel cannot access more than 256MB of memory directly. The physical
layout, however, permits
+up to 3GB of SDRAM (possibly 3.25GB) to be made available. By using
CONFIG_HIGHMEM, the kernel can
+allow userspace (by way of page tables) and itself (by way of kmap) to deal
with the memory
+allocation.
+
+External devices can, of course, still DMA to and from all of the SDRAM, even
if the kernel can't
+see it directly. The kernel translates page references into real addresses for
communicating to the
+devices.
+
+
+===================
+PAGE TABLE TOPOLOGY
+===================
+
+The page tables are arranged in 2-layer format. There is a middle layer (PMD)
that would be used in
+3-layer format tables but that is folded into the top layer (PGD) and so
consumes no extra memory
+or processing power.
+
+ +------+ PGD PMD
+ | TTBR |--->+-------------------+
+ +------+ | | : STE |
+ | PGE0 | PME0 : STE |
+ | | : STE |
+ +-------------------+ Page Table
+ | | : STE -------------->+--------+ +0x0000
+ | PGE1 | PME0 : STE -----------+ | PTE0 |
+ | | : STE -------+ | +--------+
+ +-------------------+ | | | PTE63 |
+ | | : STE | | +-->+--------+ +0x0100
+ | PGE2 | PME0 : STE | | | PTE64 |
+ | | : STE | | +--------+
+ +-------------------+ | | PTE127 |
+ | | : STE | +------>+--------+ +0x0200
+ | PGE3 | PME0 : STE | | PTE128 |
+ | | : STE | +--------+
+ +-------------------+ | PTE191 |
+ +--------+ +0x0300
+
+Each Page Directory (PGD) is 16KB (page size) in size and is divided into 64
entries (PGEs). Each
+PGE contains one Page Mid Directory (PMD).
+
+Each PMD is 256 bytes in size and contains a single entry (PME). Each PME
holds 64 FR451 MMU
+segment table entries of 4 bytes apiece. Each PME "points to" a page table. In
practice, each STE
+points to a subset of the page table, the first to PT+0x0000, the second to
PT+0x0100, the third to
+PT+0x200, and so on.
+
+Each PGE and PME covers 64MB of the total virtual address space.
+
+Each Page Table (PTD) is 16KB (page size) in size, and is divided into 4096
entries (PTEs). Each
+entry can point to one 16KB page. In practice, each Linux page table is
subdivided into 64 FR451
+MMU page tables. But they are all grouped together to make management easier,
in particular rmap
+support is then trivial.
+
+Grouping page tables in this fashion makes PGE caching in SCR0/SCR1 more
efficient because the
+coverage of the cached item is greater.
+
+Page tables for the vmalloc area are allocated at boot time and shared between
all mm_structs.
+
+
+=================
+USER SPACE LAYOUT
+=================
+
+For MMU capable Linux, the regions userspace code are allowed to access are
kept entirely separate
+from those dedicated to the kernel:
+
+ VIRTUAL ADDRESS SIZE PURPOSE
+ ================= ===== ===================================
+ 00000000-00003fff 4KB NULL pointer access trap
+ 00004000-01ffffff ~32MB lower mmap space (grows up)
+ 02000000-021fffff 2MB Stack space (grows down from top)
+ 02200000-nnnnnnnn Executable mapping
+ nnnnnnnn- brk space (grows up)
+ -bfffffff upper mmap space (grows down)
+
+This is so arranged so as to make best use of the 16KB page tables and the way
in which PGEs/PMEs
+are cached by the TLB handler. The lower mmap space is filled first, and then
the upper mmap space
+is filled.
+
+
+===============================
+GDB-STUB MMU DEBUGGING SERVICES
+===============================
+
+The gdb-stub included in this kernel provides a number of services to aid in
the debugging of MMU
+related kernel services:
+
+ (*) Every time the kernel stops, certain state information is dumped into
__debug_mmu. This
+ variable is defined in arch/frv/kernel/gdb-stub.c. Note that the gdbinit
file in this
+ directory has some useful macros for dealing with this.
+
+ (*) __debug_mmu.tlb[]
+
+ This receives the current TLB contents. This can be viewed with the
_tlb GDB macro:
+
+ (gdb) _tlb
+ tlb[0x00]: 01000005 00718203 01000002 00718203
+ tlb[0x01]: 01004002 006d4201 01004005 006d4203
+ tlb[0x02]: 01008002 006d0201 01008006 00004200
+ tlb[0x03]: 0100c006 007f4202 0100c002 0064c202
+ tlb[0x04]: 01110005 00774201 01110002 00774201
+ tlb[0x05]: 01114005 00770201 01114002 00770201
+ tlb[0x06]: 01118002 0076c201 01118005 0076c201
+ ...
+ tlb[0x3d]: 010f4002 00790200 001f4002 0054ca02
+ tlb[0x3e]: 010f8005 0078c201 010f8002 0078c201
+ tlb[0x3f]: 001fc002 0056ca01 001fc005 00538a01
+
+ (*) __debug_mmu.iamr[]
+ (*) __debug_mmu.damr[]
+
+ These receive the current IAMR and DAMR contents. These can be viewed
with with the _amr
+ GDB macro:
+
+ (gdb) _amr
+ AMRx DAMR IAMR
+ ==== ===================== =====================
+ amr0 : L:c0000000 P:00000cb9 : L:c0000000 P:000004b9
+ amr1 : L:01070005 P:006f9203 : L:0102c005 P:006a1201
+ amr2 : L:d8d00000 P:00000000 : L:d8d00000 P:00000000
+ amr3 : L:d8d04000 P:00534c0d : L:00000000 P:00000000
+ amr4 : L:d8d08000 P:00554c0d : L:00000000 P:00000000
+ amr5 : L:d8d0c000 P:00554c0d : L:00000000 P:00000000
+ amr6 : L:d8d10000 P:00000000 : L:00000000 P:00000000
+ amr7 : L:d8d14000 P:00000000 : L:00000000 P:00000000
+ amr8 : L:d8d18000 P:00000000
+ amr9 : L:d8d1c000 P:00000000
+ amr10: L:d8d20000 P:00000000
+ amr11: L:e0000000 P:e0000ccd
+
+ (*) The current task's page directory is bound to DAMR3.
+
+ This can be viewed with the _pgd GDB macro:
+
+ (gdb) _pgd
+ $3 = {{pge = {{ste = {0x554001, 0x554101, 0x554201, 0x554301, 0x554401,
+ 0x554501, 0x554601, 0x554701, 0x554801, 0x554901, 0x554a01,
+ 0x554b01, 0x554c01, 0x554d01, 0x554e01, 0x554f01, 0x555001,
+ 0x555101, 0x555201, 0x555301, 0x555401, 0x555501, 0x555601,
+ 0x555701, 0x555801, 0x555901, 0x555a01, 0x555b01, 0x555c01,
+ 0x555d01, 0x555e01, 0x555f01, 0x556001, 0x556101, 0x556201,
+ 0x556301, 0x556401, 0x556501, 0x556601, 0x556701, 0x556801,
+ 0x556901, 0x556a01, 0x556b01, 0x556c01, 0x556d01, 0x556e01,
+ 0x556f01, 0x557001, 0x557101, 0x557201, 0x557301, 0x557401,
+ 0x557501, 0x557601, 0x557701, 0x557801, 0x557901, 0x557a01,
+ 0x557b01, 0x557c01, 0x557d01, 0x557e01, 0x557f01}}}}, {pge =
{{
+ ste = {0x0 <repeats 64 times>}}}} <repeats 51 times>, {pge =
{{ste = {
+ 0x248001, 0x248101, 0x248201, 0x248301, 0x248401, 0x248501,
+ 0x248601, 0x248701, 0x248801, 0x248901, 0x248a01, 0x248b01,
+ 0x248c01, 0x248d01, 0x248e01, 0x248f01, 0x249001, 0x249101,
+ 0x249201, 0x249301, 0x249401, 0x249501, 0x249601, 0x249701,
+ 0x249801, 0x249901, 0x249a01, 0x249b01, 0x249c01, 0x249d01,
+ 0x249e01, 0x249f01, 0x24a001, 0x24a101, 0x24a201, 0x24a301,
+ 0x24a401, 0x24a501, 0x24a601, 0x24a701, 0x24a801, 0x24a901,
+ 0x24aa01, 0x24ab01, 0x24ac01, 0x24ad01, 0x24ae01, 0x24af01,
+ 0x24b001, 0x24b101, 0x24b201, 0x24b301, 0x24b401, 0x24b501,
+ 0x24b601, 0x24b701, 0x24b801, 0x24b901, 0x24ba01, 0x24bb01,
+ 0x24bc01, 0x24bd01, 0x24be01, 0x24bf01}}}}, {pge = {{ste = {
+ 0x0 <repeats 64 times>}}}} <repeats 11 times>}
+
+ (*) The PTD last used by the instruction TLB miss handler is attached to
DAMR4.
+ (*) The PTD last used by the data TLB miss handler is attached to DAMR5.
+
+ These can be viewed with the _ptd_i and _ptd_d GDB macros:
+
+ (gdb) _ptd_d
+ $5 = {{pte = 0x0} <repeats 127 times>, {pte = 0x539b01}, {
+ pte = 0x0} <repeats 896 times>, {pte = 0x719303}, {pte = 0x6d5303},
{
+ pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {
+ pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte =
0x6a1303}, {
+ pte = 0x0} <repeats 12 times>, {pte = 0x709303}, {pte = 0x0}, {pte
= 0x0},
+ {pte = 0x6fd303}, {pte = 0x6f9303}, {pte = 0x6f5303}, {pte = 0x0}, {
+ pte = 0x6ed303}, {pte = 0x531b01}, {pte = 0x50db01}, {
+ pte = 0x0} <repeats 13 times>, {pte = 0x5303}, {pte = 0x7f5303}, {
+ pte = 0x509b01}, {pte = 0x505b01}, {pte = 0x7c9303}, {pte =
0x7b9303}, {
+ pte = 0x7b5303}, {pte = 0x7b1303}, {pte = 0x7ad303}, {pte = 0x0}, {
+ pte = 0x0}, {pte = 0x7a1303}, {pte = 0x0}, {pte = 0x795303}, {pte =
0x0}, {
+ pte = 0x78d303}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte =
0x0}, {
+ pte = 0x0}, {pte = 0x775303}, {pte = 0x771303}, {pte = 0x76d303}, {
+ pte = 0x0}, {pte = 0x765303}, {pte = 0x7c5303}, {pte = 0x501b01}, {
+ pte = 0x4f1b01}, {pte = 0x4edb01}, {pte = 0x0}, {pte = 0x4f9b01}, {
+ pte = 0x4fdb01}, {pte = 0x0} <repeats 2992 times>}
diff -urN linux/Documentation/i2c/i2c-stub linux/Documentation/i2c/i2c-stub
--- linux/Documentation/i2c/i2c-stub 2004/10/25 20:44:09 1.1
+++ linux/Documentation/i2c/i2c-stub 2005/01/13 14:05:15 1.2
@@ -2,14 +2,19 @@
DESCRIPTION:
-This module is a very simple fake I2C/SMBus driver. It implements three
-types of SMBus commands: write quick, (r/w) byte data, and (r/w) word data.
+This module is a very simple fake I2C/SMBus driver. It implements four
+types of SMBus commands: write quick, (r/w) byte, (r/w) byte data, and
+(r/w) word data.
No hardware is needed nor associated with this module. It will accept write
quick commands to all addresses; it will respond to the other commands (also
to all addresses) by reading from or writing to an array in memory. It will
also spam the kernel logs for every command it handles.
+A pointer register with auto-increment is implemented for all byte
+operations. This allows for continuous byte reads like those supported by
+EEPROMs, among others.
+
The typical use-case is like this:
1. load this module
2. use i2cset (from lm_sensors project) to pre-load some data
diff -urN linux/Documentation/i2c/i2c-old-porting
linux/Documentation/i2c/i2c-old-porting
--- linux/Documentation/i2c/Attic/i2c-old-porting Thu Jan 13 14:05:15
2005 1.2
+++ linux/Documentation/i2c/Attic/i2c-old-porting 1970/01/01 00:00:002002
@@ -1,626 +0,0 @@
-I2C Conversion Guide for I2C-old to the current I2C API
-July 2002
-For Linux Kernel v2.5.x
-Frank Davis <fdavis@si.rr.com>
--------------------------------------------------------
-
-There exists several kernel drivers that are using an old version of the I2C
-API. These drivers need to be converted to the current (kernel 2.5.x) version.
-The following document provides a guideline to make the appropriate changes to
-the affected drivers. There maybe slight modifications to this guide that are
-specific to the driver you are working on. If you see {driver_name}, replace
-that with the respective name of the driver, such as saa7110.c , {driver_name}
-= saa7110.
-
--------------------------------------------------------
-
-Step 1: Include the right header file
-
-Perform the following change within the driver
-
-#include <linux/i2c-old.h> --> #include <linux/i2c.h>
-
-Step 2: Add and set the i2c modes
-
-Add the following code near the top of the driver
-
-static unsigned short normal_i2c[] = {34>>1, I2C_CLIENT_END };
-static unsigned short normal_i2c_range[] = { I2C_CLIENT_END };
-static unsigned short probe[2] = { I2C_CLIENT_END , I2C_CLIENT_END };
-static unsigned short probe_range[2] = { I2C_CLIENT_END , I2C_CLIENT_END };
-static unsigned short ignore[2] = { I2C_CLIENT_END , I2C_CLIENT_END };
-static unsigned short ignore_range[2] = { I2C_CLIENT_END, I2C_CLIENT_END };
-static unsigned short force[2] = { I2C_CLIENT_END , I2C_CLIENT_END };
-
-static struct i2c_client_address_data addr_data = {
- normal_i2c , normal_i2c_range,
- probe , probe_range,
- ignore , ignore_range,
- force
-};
-
-static struct i2c_client client_template;
-
-Step 3: Modify the driver info struct
-
-Within the struct for the driver , such as struct {driver_name} , make the
-following change ,
-struct i2c_bus *bus --> struct i2c_client *client
-
-Make changes where this change affects references within the file.
-
-Add a semaphore to the driver struct (as above)
-
-struct semaphore lock
-
-Step 5: Remove specific read and write functions
-
-Remove the driver specific write and read functions, usually in the form:
-{driver_name}_write , {driver_name}_read , {driver_name}_write_block , etc.
-
-Step 6: Update the write and read functions for the current I2C API
-
-Replace all references of {driver_name}_write with i2c_smbus_write_byte_data
-Replace all references of {driver_name}_read with i2c_smbus_read_byte_data or
-i2c_smbus_read_byte , depending on args passed in.
-
-** Ensure that these functions pass in the i2c_client *client , NOT the
-decoder/encoder that was passed in the driver specific write and read
-functions.
-
-Step 7: Modify the driver's attach function
-
-Change the driver attach function prototype :
-{driver_name}_attach(struct i2c_device *device) -->
{driver_name}_attach(struct
-i2c_adapter *adap, int addr , unsigned short flags, int kind)
-
-Create a i2c_client client...
-Add the following (where "decoder" is a reference to a struct for the driver
-info:
-
-struct i2c_client *client;
-client = kmalloc(sizeof(*client), GFP_KERNEL);
-if(client == NULL)
- return -ENOMEM;
-client_template.adapter = adap;
-client_template.addr = addr;
-memcpy(client, &client_template, sizeof(*client));
-strcpy(client->name , "{driver_name}");
-decoder->client = client;
-client->data = decoder;
-decoder->addr = addr;
-
-Towards the end of the function, add:
-
-init_MUTEX(&decoder->lock);
-i2c_attach_client(client);
-
-
-Step 8: Modify the driver's detach function
-
-Change the driver detach function prototype :
-{driver_name}_detach(struct i2c_device *device) -->
{driver_name}_detach(struct
-i2c_client *client)
-
-In the beginning of the detach function, add:
-i2c_detach_client(client);
-
-Towards the end of the detach function, add:
-kfree(client->data);
-kfree(client);
-
-Step 9: Modify the driver's command function
-
-Change the driver command function prototype :
-
-Step 10: Add the probe function after the driver's attach function.
-
-Add the following code:
-
-static int {driver_name}_probe(struct i2c_adapter *adap)
-{
- return i2c_probe(adap, &addr_data, {driver_name}_attach);
-
-}
-
-Step 11: Modify the driver's i2c_driver
-
-Find the i2c_driver , such as
-static struct i2c_driver i2c_driver_saa7110
-It is usually located towards the end of the driver
-Replace the values from I2C_DRIVERID_{something} to {driver_name}_attach, and
-add the following
-I2C_DRIVERID_{driver_name} , // verify by looking in include/linux/i2c-id.h
-I2C_DF_NOTIFY,
-{driver_name}_probe,
-....
-
-Step 12: Adding the i2c_client
-
-Add the i2c_client to the driver. Add the following code:
-
-static struct i2c_client client_template = {
- "{driver_name}_client",
- -1,
- 0,
- 0,
- NULL,
- {i2c_driver reference}
-};
-
-Step 13: Registering and Unregistering
-
-Replace i2c_register_driver with i2c_add_driver
-Replace i2c_unregister_driver with i2c_del_driver
-
--------------------------------------------------------
-
-Example:
-
-The following patch provides the i2c coversion patch for the saa7110 driver
-based on the above guide (for clarity).
-
-
---- drivers/media/video/saa7110.c.old Fri Jun 28 10:22:52 2002
-+++ drivers/media/video/saa7110.c Thu Jul 4 16:51:08 2002
-@@ -26,7 +26,7 @@
- #include <asm/io.h>
- #include <asm/uaccess.h>
-
--#include <linux/i2c-old.h>
-+#include <linux/i2c.h>
- #include <linux/videodev.h>
- #include "linux/video_decoder.h"
-
-@@ -37,13 +37,31 @@
-
- #define I2C_SAA7110 0x9C /* or 0x9E */
-
-+#define IF_NAME "saa7110"
- #define I2C_DELAY 10 /* 10 us or 100khz */
-
-+static unsigned short normal_i2c[] = {34>>1, I2C_CLIENT_END };
-+static unsigned short normal_i2c_range[] = { I2C_CLIENT_END };
-+static unsigned short probe[2] = { I2C_CLIENT_END, I2C_CLIENT_END };
-+static unsigned short probe_range[2] = { I2C_CLIENT_END, I2C_CLIENT_END };
-+static unsigned short ignore[2] = { I2C_CLIENT_END, I2C_CLIENT_END };
-+static unsigned short ignore_range[2] = { I2C_CLIENT_END, I2C_CLIENT_END };
-+static unsigned short force[2] = { I2C_CLIENT_END, I2C_CLIENT_END };
-+
-+static struct i2c_client_address_data addr_data = {
-+ normal_i2c, normal_i2c_range,
-+ probe, probe_range,
-+ ignore, ignore_range,
-+ force
-+};
-+
-+static struct i2c_client client_template;
-+
- struct saa7110 {
-- struct i2c_bus *bus;
-+ struct i2c_client *client;
- int addr;
- unsigned char reg[36];
--
-+ struct semaphore lock;
- int norm;
- int input;
- int enable;
-@@ -54,67 +72,10 @@
- };
-
- /* ----------------------------------------------------------------------- */
--/* I2C support functions */
--/* ----------------------------------------------------------------------- */
--static
--int saa7110_write(struct saa7110 *decoder, unsigned char subaddr, unsigned
char data)
--{
-- int ack;
--
-- LOCK_I2C_BUS(decoder->bus);
-- i2c_start(decoder->bus);
-- i2c_sendbyte(decoder->bus, decoder->addr, I2C_DELAY);
-- i2c_sendbyte(decoder->bus, subaddr, I2C_DELAY);
-- ack = i2c_sendbyte(decoder->bus, data, I2C_DELAY);
-- i2c_stop(decoder->bus);
-- decoder->reg[subaddr] = data;
-- UNLOCK_I2C_BUS(decoder->bus);
-- return ack;
--}
--
--static
--int saa7110_write_block(struct saa7110* decoder, unsigned const char *data,
unsigned int len)
--{
-- unsigned subaddr = *data;
--
-- LOCK_I2C_BUS(decoder->bus);
-- i2c_start(decoder->bus);
-- i2c_sendbyte(decoder->bus,decoder->addr,I2C_DELAY);
-- while (len-- > 0) {
-- if (i2c_sendbyte(decoder->bus,*data,0)) {
-- i2c_stop(decoder->bus);
-- UNLOCK_I2C_BUS(decoder->bus);
-- return -EAGAIN;
-- }
-- decoder->reg[subaddr++] = *data++;
-- }
-- i2c_stop(decoder->bus);
-- UNLOCK_I2C_BUS(decoder->bus);
--
-- return 0;
--}
--
--static
--int saa7110_read(struct saa7110* decoder)
--{
-- int data;
--
-- LOCK_I2C_BUS(decoder->bus);
-- i2c_start(decoder->bus);
-- i2c_sendbyte(decoder->bus, decoder->addr, I2C_DELAY);
-- i2c_start(decoder->bus);
-- i2c_sendbyte(decoder->bus, decoder->addr | 1, I2C_DELAY);
-- data = i2c_readbyte(decoder->bus, 1);
-- i2c_stop(decoder->bus);
-- UNLOCK_I2C_BUS(decoder->bus);
-- return data;
--}
--
--/* ----------------------------------------------------------------------- */
- /* SAA7110 functions */
- /* ----------------------------------------------------------------------- */
- static
--int saa7110_selmux(struct i2c_device *device, int chan)
-+int saa7110_selmux(struct i2c_client *client, int chan)
- {
- static const unsigned char modes[9][8] = {
- /* mode 0 */ { 0x00, 0xD9, 0x17, 0x40, 0x03, 0x44, 0x75, 0x16 },
-@@ -126,61 +87,59 @@
- /* mode 6 */ { 0x80, 0x59, 0x17, 0x42, 0xA3, 0x44, 0x75, 0x12 },
- /* mode 7 */ { 0x80, 0x9A, 0x17, 0xB1, 0x13, 0x60, 0xB5, 0x14 },
- /* mode 8 */ { 0x80, 0x3C, 0x27, 0xC1, 0x23, 0x44, 0x75, 0x21 } };
-- struct saa7110* decoder = device->data;
- const unsigned char* ptr = modes[chan];
-
-- saa7110_write(decoder,0x06,ptr[0]); /* Luminance control */
-- saa7110_write(decoder,0x20,ptr[1]); /* Analog Control #1 */
-- saa7110_write(decoder,0x21,ptr[2]); /* Analog Control #2 */
-- saa7110_write(decoder,0x22,ptr[3]); /* Mixer Control #1 */
-- saa7110_write(decoder,0x2C,ptr[4]); /* Mixer Control #2 */
-- saa7110_write(decoder,0x30,ptr[5]); /* ADCs gain control */
-- saa7110_write(decoder,0x31,ptr[6]); /* Mixer Control #3 */
-- saa7110_write(decoder,0x21,ptr[7]); /* Analog Control #2 */
-+ i2c_smbus_write_byte_data(client,0x06,ptr[0]); /* Luminance control
*/
-+ i2c_smbus_write_byte_data(client,0x20,ptr[1]); /* Analog Control #1
*/
-+ i2c_smbus_write_byte_data(client,0x21,ptr[2]); /* Analog Control #2
*/
-+ i2c_smbus_write_byte_data(client,0x22,ptr[3]); /* Mixer Control #1
*/
-+ i2c_smbus_write_byte_data(client,0x2C,ptr[4]); /* Mixer Control #2
*/
-+ i2c_smbus_write_byte_data(client,0x30,ptr[5]); /* ADCs gain control
*/
-+ i2c_smbus_write_byte_data(client,0x31,ptr[6]); /* Mixer Control #3
*/
-+ i2c_smbus_write_byte_data(client,0x21,ptr[7]); /* Analog Control #2
*/
-
- return 0;
- }
-
- static
--int determine_norm(struct i2c_device* dev)
-+int determine_norm(struct i2c_client* client)
- {
-- struct saa7110* decoder = dev->data;
- int status;
-
- /* mode changed, start automatic detection */
-- status = saa7110_read(decoder);
-+ status = i2c_smbus_read_byte(client);
- if ((status & 3) == 0) {
-- saa7110_write(decoder,0x06,0x80);
-+ i2c_smbus_write_byte_data(client,0x06,0x80);
- if (status & 0x20) {
-- DEBUG(printk(KERN_INFO "%s: norm=bw60\n",dev->name));
-- saa7110_write(decoder,0x2E,0x81);
-+ DEBUG(printk(KERN_INFO "%s: norm=bw60\n",adp->name));
-+ i2c_smbus_write_byte_data(client,0x2E,0x81);
- return VIDEO_MODE_NTSC;
- }
-- DEBUG(printk(KERN_INFO "%s: norm=bw50\n",dev->name));
-- saa7110_write(decoder,0x2E,0x9A);
-+ DEBUG(printk(KERN_INFO "%s: norm=bw50\n",adp->name));
-+ i2c_smbus_write_byte_data(client,0x2E,0x9A);
- return VIDEO_MODE_PAL;
- }
-
-- saa7110_write(decoder,0x06,0x00);
-+ i2c_smbus_write_byte_data(client,0x06,0x00);
- if (status & 0x20) { /* 60Hz */
-- DEBUG(printk(KERN_INFO "%s: norm=ntsc\n",dev->name));
-- saa7110_write(decoder,0x0D,0x06);
-- saa7110_write(decoder,0x11,0x2C);
-- saa7110_write(decoder,0x2E,0x81);
-+ DEBUG(printk(KERN_INFO "%s: norm=ntsc\n",adp->name));
-+ i2c_smbus_write_byte_data(client,0x0D,0x06);
-+ i2c_smbus_write_byte_data(client,0x11,0x2C);
-+ i2c_smbus_write_byte_data(client,0x2E,0x81);
- return VIDEO_MODE_NTSC;
- }
-
- /* 50Hz -> PAL/SECAM */
-- saa7110_write(decoder,0x0D,0x06);
-- saa7110_write(decoder,0x11,0x59);
-- saa7110_write(decoder,0x2E,0x9A);
-+ i2c_smbus_write_byte_data(client,0x0D,0x06);
-+ i2c_smbus_write_byte_data(client,0x11,0x59);
-+ i2c_smbus_write_byte_data(client,0x2E,0x9A);
-
- mdelay(150); /* pause 150 ms */
-
-- status = saa7110_read(decoder);
-+ status = i2c_smbus_read_byte(client);
- if ((status & 0x03) == 0x01) {
- DEBUG(printk(KERN_INFO "%s: norm=secam\n",dev->name));
-- saa7110_write(decoder,0x0D,0x07);
-+ i2c_smbus_write_byte_data(client,0x0D,0x07);
- return VIDEO_MODE_SECAM;
- }
- DEBUG(printk(KERN_INFO "%s: norm=pal\n",dev->name));
-@@ -188,7 +147,7 @@
- }
-
- static
--int saa7110_attach(struct i2c_device *device)
-+int saa7110_attach(struct i2c_adapter *adap, int addr, unsigned short flags,
int kind)
- {
- static const unsigned char initseq[] = {
- 0, 0x4C, 0x3C, 0x0D, 0xEF, 0xBD, 0xF0, 0x00, 0x00,
-@@ -198,20 +157,28 @@
- 0xD9, 0x17, 0x40, 0x41, 0x80, 0x41, 0x80, 0x4F,
- 0xFE, 0x01, 0xCF, 0x0F, 0x03, 0x01, 0x81, 0x03,
- 0x40, 0x75, 0x01, 0x8C, 0x03};
-- struct saa7110* decoder;
-+ struct saa7110 *decoder;
-+ struct i2c_client *client;
- int rv;
--
-- device->data = decoder = kmalloc(sizeof(struct saa7110), GFP_KERNEL);
-- if (device->data == 0)
-+ client=kmalloc(sizeof(*client), GFP_KERNEL);
-+ if(client == NULL)
- return -ENOMEM;
--
-+ client_template.adapter = adap;
-+ client_template.addr = addr;
-+ memcpy(client, &client_template, sizeof(*client));
-+
-+ decoder = kmalloc(sizeof(*decoder), GFP_KERNEL);
-+ if (decoder == NULL) {
-+ kfree(client);
-+ return -ENOMEM;
-+ }
[%d lines skipped]
229diff -urN linux/Documentation/i2c/chips/smsc47b397.txt
linux/Documentation/i2c/chips/smsc47b397.txt
--- linux/Documentation/i2c/chips/smsc47b397.txt 1970/01/01 00:00:00
+++ linux/Documentation/i2c/chips/smsc47b397.txt Thu Jan 13 14:05:15
2005 1.1
@@ -0,0 +1,146 @@
+November 23, 2004
+
+The following specification describes the SMSC LPC47B397-NC sensor chip
+(for which there is no public datasheet available). This document was
+provided by Craig Kelly (In-Store Broadcast Network) and edited/corrected
+by Mark M. Hoffman <mhoffman@lightlink.com>.
+
+* * * * *
+
+Methods for detecting the HP SIO and reading the thermal data on a dc7100.
+
+The thermal information on the dc7100 is contained in the SIO Hardware Monitor
+(HWM). The information is accessed through an index/data pair. The index/data
+pair is located at the HWM Base Address + 0 and the HWM Base Address + 1. The
+HWM Base address can be obtained from Logical Device 8, registers 0x60 (MSB)
+and 0x61 (LSB). Currently we are using 0x480 for the HWM Base Address and
+0x480 and 0x481 for the index/data pair.
+
+Reading temperature information.
+The temperature information is located in the following registers:
+Temp1 0x25 (Currently, this reflects the CPU temp on all systems).
+Temp2 0x26
+Temp3 0x27
+Temp4 0x80
+
+Programming Example
+The following is an example of how to read the HWM temperature registers:
+MOV DX,480H
+MOV AX,25H
+OUT DX,AL
+MOV DX,481H
+IN AL,DX
+
+AL contains the data in hex, the temperature in Celsius is the decimal
+equivalent.
+
+Ex: If AL contains 0x2A, the temperature is 42 degrees C.
+
+Reading tach information.
+The fan speed information is located in the following registers:
+ LSB MSB
+Tach1 0x28 0x29 (Currently, this reflects the CPU
+ fan speed on all systems).
+Tach2 0x2A 0x2B
+Tach3 0x2C 0x2D
+Tach4 0x2E 0x2F
+
+Important!!!
+Reading the tach LSB locks the tach MSB.
+The LSB Must be read first.
+
+How to convert the tach reading to RPM.
+The tach reading (TCount) is given by: (Tach MSB * 256) + (Tach LSB)
+The SIO counts the number of 90kHz (11.111us) pulses per revolution.
+RPM = 60/(TCount * 11.111us)
+
+Example:
+Reg 0x28 = 0x9B
+Reg 0x29 = 0x08
+
+TCount = 0x89B = 2203
+
+RPM = 60 / (2203 * 11.11111 E-6) = 2451 RPM
+
+Obtaining the SIO version.
+
+CONFIGURATION SEQUENCE
+To program the configuration registers, the following sequence must be
followed:
+1. Enter Configuration Mode
+2. Configure the Configuration Registers
+3. Exit Configuration Mode.
+
+Enter Configuration Mode
+To place the chip into the Configuration State The config key (0x55) is written
+to the CONFIG PORT (0x2E).
+
+Configuration Mode
+In configuration mode, the INDEX PORT is located at the CONFIG PORT address and
+the DATA PORT is at INDEX PORT address + 1.
+
+The desired configuration registers are accessed in two steps:
+a. Write the index of the Logical Device Number Configuration Register
+ (i.e., 0x07) to the INDEX PORT and then write the number of the
+ desired logical device to the DATA PORT.
+
+b. Write the address of the desired configuration register within the
+ logical device to the INDEX PORT and then write or read the config-
+ uration register through the DATA PORT.
+
+Note: If accessing the Global Configuration Registers, step (a) is not
required.
+
+Exit Configuration Mode
+To exit the Configuration State the write 0xAA to the CONFIG PORT (0x2E).
+The chip returns to the RUN State. (This is important).
+
+Programming Example
+The following is an example of how to read the SIO Device ID located at 0x20
+
+; ENTER CONFIGURATION MODE
+MOV DX,02EH
+MOV AX,055H
+OUT DX,AL
+; GLOBAL CONFIGURATION REGISTER
+MOV DX,02EH
+MOV AL,20H
+OUT DX,AL
+; READ THE DATA
+MOV DX,02FH
+IN AL,DX
+; EXIT CONFIGURATION MODE
+MOV DX,02EH
+MOV AX,0AAH
+OUT DX,AL
+
+The registers of interest for identifying the SIO on the dc7100 are Device ID
+(0x20) and Device Rev (0x21).
+
+The Device ID will read 0X6F
+The Device Rev currently reads 0x01
+
+Obtaining the HWM Base Address.
+The following is an example of how to read the HWM Base Address located in
+Logical Device 8.
+
+; ENTER CONFIGURATION MODE
+MOV DX,02EH
+MOV AX,055H
+OUT DX,AL
+; CONFIGURE REGISTER CRE0,
+; LOGICAL DEVICE 8
+MOV DX,02EH
+MOV AL,07H
+OUT DX,AL ;Point to LD# Config Reg
+MOV DX,02FH
+MOV AL, 08H
+OUT DX,AL;Point to Logical Device 8
+;
+MOV DX,02EH
+MOV AL,60H
+OUT DX,AL ; Point to HWM Base Addr MSB
+MOV DX,02FH
+IN AL,DX ; Get MSB of HWM Base Addr
+; EXIT CONFIGURATION MODE
+MOV DX,02EH
+MOV AX,0AAH
+OUT DX,AL
diff -urN linux/Documentation/i386/boot.txt linux/Documentation/i386/boot.txt
--- linux/Documentation/i386/boot.txt 2004/08/06 00:33:21 1.6
+++ linux/Documentation/i386/boot.txt 2005/01/13 14:05:15 1.7
@@ -173,6 +173,9 @@
2 bootsect-loader
3 SYSLINUX
4 EtherBoot
+ 5 ELILO
+ 7 GRuB
+ 8 U-BOOT
Please contact <hpa@zytor.com> if you need a bootloader ID
value assigned.
diff -urN linux/Documentation/i386/zero-page.txt
linux/Documentation/i386/zero-page.txt
--- linux/Documentation/i386/zero-page.txt 2004/10/25 20:44:09 1.9
+++ linux/Documentation/i386/zero-page.txt 2005/01/13 14:05:15 1.10
@@ -74,6 +74,10 @@
0x21c unsigned long INITRD_SIZE, size in bytes of ramdisk image
0x220 4 bytes (setup.S)
0x224 unsigned short setup.S heap end pointer
+0x226 unsigned short zero_pad
+0x228 unsigned long cmd_line_ptr
+0x22c unsigned long ramdisk_max
+0x230 16 bytes trampoline
0x290 - 0x2cf EDD_MBR_SIG_BUFFER (edd.S)
0x2d0 - 0x600 E820MAP
0x600 - 0x7ff EDDBUF (edd.S) for disk signature read sector
diff -urN linux/Documentation/infiniband/ipoib.txt
linux/Documentation/infiniband/ipoib.txt
--- linux/Documentation/infiniband/ipoib.txt 1970/01/01 00:00:00
+++ linux/Documentation/infiniband/ipoib.txt Thu Jan 13 14:05:16 2005
1.1
@@ -0,0 +1,56 @@
+IP OVER INFINIBAND
+
+ The ib_ipoib driver is an implementation of the IP over InfiniBand
+ protocol as specified by the latest Internet-Drafts issued by the
+ IETF ipoib working group. It is a "native" implementation in the
+ sense of setting the interface type to ARPHRD_INFINIBAND and the
+ hardware address length to 20 (earlier proprietary implementations
+ masqueraded to the kernel as ethernet interfaces).
+
+Partitions and P_Keys
+
+ When the IPoIB driver is loaded, it creates one interface for each
+ port using the P_Key at index 0. To create an interface with a
+ different P_Key, write the desired P_Key into the main interface's
+ /sys/class/net/<intf name>/create_child file. For example:
+
+ echo 0x8001 > /sys/class/net/ib0/create_child
+
+ This will create an interface named ib0.8001 with P_Key 0x8001. To
+ remove a subinterface, use the "delete_child" file:
+
+ echo 0x8001 > /sys/class/net/ib0/delete_child
+
+ The P_Key for any interface is given by the "pkey" file, and the
+ main interface for a subinterface is in "parent."
+
+Debugging Information
+
+ By compiling the IPoIB driver with CONFIG_INFINIBAND_IPOIB_DEBUG set
+ to 'y', tracing messages are compiled into the driver. They are
+ turned on by setting the module parameters debug_level and
+ mcast_debug_level to 1. These parameters can be controlled at
+ runtime through files in /sys/module/ib_ipoib/.
+
+ CONFIG_INFINIBAND_IPOIB_DEBUG also enables the "ipoib_debugfs"
+ virtual filesystem. By mounting this filesystem, for example with
+
+ mkdir -p /ipoib_debugfs
+ mount -t ipoib_debugfs none /ipoib_debufs
+
+ it is possible to get statistics about multicast groups from the
+ files /ipoib_debugfs/ib0_mcg and so on.
+
+ The performance impact of this option is negligible, so it
+ is safe to enable this option with debug_level set to 0 for normal
+ operation.
+
+ CONFIG_INFINIBAND_IPOIB_DEBUG_DATA enables even more debug output in
+ the data path when data_debug_level is set to 1. However, even with
+ the output disabled, enabling this configuration option will affect
+ performance, because it adds tests to the fast path.
+
+References
+
+ IETF IP over InfiniBand (ipoib) Working Group
+ http://ietf.org/html.charters/ipoib-charter.html
diff -urN linux/Documentation/infiniband/sysfs.txt
linux/Documentation/infiniband/sysfs.txt
--- linux/Documentation/infiniband/sysfs.txt 1970/01/01 00:00:00
+++ linux/Documentation/infiniband/sysfs.txt Thu Jan 13 14:05:16 2005
1.1
@@ -0,0 +1,64 @@
+SYSFS FILES
+
+ For each InfiniBand device, the InfiniBand drivers create the
+ following files under /sys/class/infiniband/<device name>:
+
+ node_guid - Node GUID
+ sys_image_guid - System image GUID
+
+ In addition, there is a "ports" subdirectory, with one subdirectory
+ for each port. For example, if mthca0 is a 2-port HCA, there will
+ be two directories:
+
+ /sys/class/infiniband/mthca0/ports/1
+ /sys/class/infiniband/mthca0/ports/2
+
+ (A switch will only have a single "0" subdirectory for switch port
+ 0; no subdirectory is created for normal switch ports)
+
+ In each port subdirectory, the following files are created:
+
+ cap_mask - Port capability mask
+ lid - Port LID
+ lid_mask_count - Port LID mask count
+ rate - Port data rate (active width * active speed)
+ sm_lid - Subnet manager LID for port's subnet
+ sm_sl - Subnet manager SL for port's subnet
+ state - Port state (DOWN, INIT, ARMED, ACTIVE or ACTIVE_DEFER)
+
+ There is also a "counters" subdirectory, with files
+
+ VL15_dropped
+ excessive_buffer_overrun_errors
+ link_downed
+ link_error_recovery
+ local_link_integrity_errors
+ port_rcv_constraint_errors
+ port_rcv_data
+ port_rcv_errors
+ port_rcv_packets
+ port_rcv_remote_physical_errors
+ port_rcv_switch_relay_errors
+ port_xmit_constraint_errors
+ port_xmit_data
+ port_xmit_discards
+ port_xmit_packets
+ symbol_error
+
+ Each of these files contains the corresponding value from the port's
+ Performance Management PortCounters attribute, as described in
+ section 16.1.3.5 of the InfiniBand Architecture Specification.
+
+ The "pkeys" and "gids" subdirectories contain one file for each
+ entry in the port's P_Key or GID table respectively. For example,
+ ports/1/pkeys/10 contains the value at index 10 in port 1's P_Key
+ table.
+
+MTHCA
+
+ The Mellanox HCA driver also creates the files:
+
+ hw_rev - Hardware revision number
+ fw_ver - Firmware version
+ hca_type - HCA type: "MT23108", "MT25208 (MT23108 compat mode)",
+ or "MT25208"
diff -urN linux/Documentation/infiniband/user_mad.txt
linux/Documentation/infiniband/user_mad.txt
--- linux/Documentation/infiniband/user_mad.txt 1970/01/01 00:00:00
+++ linux/Documentation/infiniband/user_mad.txt Thu Jan 13 14:05:16 2005
1.1
@@ -0,0 +1,81 @@
+USERSPACE MAD ACCESS
+
+Device files
+
+ Each port of each InfiniBand device has a "umad" device attached.
+ For example, a two-port HCA will have two devices, while a switch
+ will have one device (for switch port 0).
+
+Creating MAD agents
+
+ A MAD agent can be created by filling in a struct ib_user_mad_reg_req
+ and then calling the IB_USER_MAD_REGISTER_AGENT ioctl on a file
+ descriptor for the appropriate device file. If the registration
+ request succeeds, a 32-bit id will be returned in the structure.
+ For example:
+
+ struct ib_user_mad_reg_req req = { /* ... */ };
+ ret = ioctl(fd, IB_USER_MAD_REGISTER_AGENT, (char *) &req);
+ if (!ret)
+ my_agent = req.id;
+ else
+ perror("agent register");
+
+ Agents can be unregistered with the IB_USER_MAD_UNREGISTER_AGENT
+ ioctl. Also, all agents registered through a file descriptor will
+ be unregistered when the descriptor is closed.
+
+Receiving MADs
+
+ MADs are received using read(). The buffer passed to read() must be
+ large enough to hold at least one struct ib_user_mad. For example:
+
+ struct ib_user_mad mad;
+ ret = read(fd, &mad, sizeof mad);
+ if (ret != sizeof mad)
+ perror("read");
+
+ In addition to the actual MAD contents, the other struct ib_user_mad
+ fields will be filled in with information on the received MAD. For
+ example, the remote LID will be in mad.lid.
+
+ If a send times out, a receive will be generated with mad.status set
+ to ETIMEDOUT. Otherwise when a MAD has been successfully received,
+ mad.status will be 0.
+
+ poll()/select() may be used to wait until a MAD can be read.
+
+Sending MADs
+
+ MADs are sent using write(). The agent ID for sending should be
+ filled into the id field of the MAD, the destination LID should be
+ filled into the lid field, and so on. For example:
+
+ struct ib_user_mad mad;
+
+ /* fill in mad.data */
+
+ mad.id = my_agent; /* req.id from agent registration */
+ mad.lid = my_dest; /* in network byte order... */
+ /* etc. */
+
+ ret = write(fd, &mad, sizeof mad);
+ if (ret != sizeof mad)
+ perror("write");
+
+/dev files
+
+ To create the appropriate character device files automatically with
+ udev, a rule like
+
+ KERNEL="umad*", NAME="infiniband/%k"
+
+ can be used. This will create a device node named
+
+ /dev/infiniband/umad0
+
+ for the first port, and so on. The InfiniBand device and port
+ associated with this device can be determined from the files
+
+ /sys/class/infiniband_mad/umad0/ibdev
+ /sys/class/infiniband_mad/umad0/port
diff -urN linux/Documentation/networking/e100.txt
linux/Documentation/networking/e100.txt
--- linux/Documentation/networking/e100.txt 2004/11/15 11:49:13 1.6
+++ linux/Documentation/networking/e100.txt 2005/01/13 14:05:16 1.7
@@ -1,7 +1,7 @@
Linux* Base Driver for the Intel(R) PRO/100 Family of Adapters
==============================================================
-September 13, 2004
+November 17, 2004
Contents
@@ -18,9 +18,7 @@
===============
This file describes the Linux* Base Driver for the Intel(R) PRO/100 Family of
-Adapters, version 3.2.x. This driver includes support for Itanium(TM)2 and
-EM64T systems.
-
+Adapters, version 3.3.x. This driver supports 2.4.x and 2.6.x kernels.
Identifying Your Adapter
========================
@@ -119,12 +117,6 @@
The latest release of ethtool can be found at:
http://sf.net/projects/gkernel.
- After ethtool is installed, ethtool-copy.h must be copied and renamed to
- ethtool.h in your kernel source tree at <linux_kernel_src>/include/linux.
- Backup the original ethtool.h as needed before copying. The driver then
- must be recompiled in order to take advantage of the latest ethtool
- features.
-
NOTE: This driver uses mii support from the kernel. As a result, when
there is no link, ethtool will report speed/duplex to be 10/half.
diff -urN linux/Documentation/networking/e1000.txt
linux/Documentation/networking/e1000.txt
--- linux/Documentation/networking/e1000.txt 2004/11/15 11:49:13 1.7
+++ linux/Documentation/networking/e1000.txt 2005/01/13 14:05:16 1.8
@@ -1,7 +1,7 @@
Linux* Base Driver for the Intel(R) PRO/1000 Family of Adapters
===============================================================
-September 13, 2004
+November 17, 2004
Contents
@@ -20,8 +20,7 @@
===============
This file describes the Linux* Base Driver for the Intel(R) PRO/1000 Family
-of Adapters, version 5.x.x. This driver includes support for Itanium(TM)2
-and EM64T systems.
+of Adapters, version 5.x.x.
For questions related to hardware requirements, refer to the documentation
supplied with your Intel PRO/1000 adapter. All hardware requirements listed
@@ -145,9 +144,11 @@
Default Value: 256
This value is the number of receive descriptors allocated by the driver.
Increasing this value allows the driver to buffer more incoming packets.
- Each descriptor is 16 bytes. A receive buffer is also allocated for each
- descriptor and can be either 2048, 4096, 8192, or 16384 bytes, depending
- on the MTU setting. The maximum MTU size is 16110.
+ Each descriptor is 16 bytes. A receive buffer is allocated for each
+ descriptor and can either be 2048 or 4096 bytes long, depending on the MTU
+
+ setting. An incoming packet can span one or more receive descriptors.
+ The maximum MTU size is 16110.
NOTE: MTU designates the frame size. It only needs to be set for Jumbo
Frames.
@@ -251,17 +252,16 @@
also be forced.
The AutoNeg parameter is used when more control is required over the auto-
-negotiation process. When this parameter is used, Speed and Duplex must not
-be specified. This parameter is a bitmap that specifies which speed and
-duplex settings are advertised to the link partner.
-
-Bit 7 6 5 4 3 2 1 0
-Speed (Mbps) N/A N/A 1000 N/A 100 100 10 10
-Duplex Full Full Half Full Half
-
-For example to limit the negotiated speed/duplex on the interface to 10 Mbps
-Half or Full duplex, set AutoNeg to 0x02:
- insmod e1000 AutoNeg=0x02
+negotiation process. When this parameter is used, Speed and Duplex parameters
+must not be specified. The following table describes supported values for the
+AutoNeg parameter:
+
+Speed (Mbps) 1000 100 100 10 10
+Duplex Full Full Half Full Half
+Value (in base 16) 0x20 0x08 0x04 0x02 0x01
+
+Example: insmod e1000 AutoNeg=0x03, loads e1000 and specifies (10 full duplex,
+10 half duplex) for negotiation with the peer.
Note that setting AutoNeg does not guarantee that the board will link at the
highest specified speed or duplex mode, but the board will link at the
@@ -333,11 +333,7 @@
version 1.6 or later is required for this functionality.
The latest release of ethtool can be found from
- http://sf.net/projects/gkernel. After ethtool is installed,
- ethtool-copy.h must be copied and renamed to ethtool.h in your kernel
- source tree at <linux_kernel_src>/include/linux. Backup the original
- ethtool.h as needed before copying. The driver then must be recompiled
- in order to take advantage of the latest ethtool features.
+ http://sf.net/projects/gkernel.
NOTE: Ethtool 1.6 only supports a limited set of ethtool options. Support
for a more complete ethtool feature set can be enabled by upgrading
diff -urN linux/Documentation/power/devices.txt
linux/Documentation/power/devices.txt
--- linux/Documentation/power/devices.txt 2003/08/26 00:28:49 1.1
+++ linux/Documentation/power/devices.txt 2005/01/13 14:05:16 1.2
@@ -118,6 +118,94 @@
There is currently no way to know what states a device or driver
supports a priori. This will change in the future.
+pm_message_t meaning
+
+pm_message_t has two fields. event ("major"), and flags. If driver
+does not know event code, it aborts the request, returning error. Some
+drivers may need to deal with special cases based on the actual type
+of suspend operation being done at the system level. This is why
+there are flags.
+
+Event codes are:
+
+ON -- no need to do anything except special cases like broken
+HW.
+
+# NOTIFICATION -- pretty much same as ON?
+
+FREEZE -- stop DMA and interrupts, and be prepared to reinit HW from
+scratch. That probably means stop accepting upstream requests, the
+actual policy of what to do with them beeing specific to a given
+driver. It's acceptable for a network driver to just drop packets
+while a block driver is expected to block the queue so no request is
+lost. (Use IDE as an example on how to do that). FREEZE requires no
+power state change, and it's expected for drivers to be able to
+quickly transition back to operating state.
+
+SUSPEND -- like FREEZE, but also put hardware into low-power state. If
+there's need to distinguish several levels of sleep, additional flag
+is probably best way to do that.
+
+Transitions are only from a resumed state to a suspended state, never
+between 2 suspended states. (ON -> FREEZE or ON -> SUSPEND can happen,
+FREEZE -> SUSPEND or SUSPEND -> FREEZE can not).
+
+All events are:
+
+[NOTE NOTE NOTE: If you are driver author, you should not care; you
+should only look at event, and ignore flags.]
+
+#Prepare for suspend -- userland is still running but we are going to
+#enter suspend state. This gives drivers chance to load firmware from
+#disk and store it in memory, or do other activities taht require
+#operating userland, ability to kmalloc GFP_KERNEL, etc... All of these
+#are forbiden once the suspend dance is started.. event = ON, flags =
+#PREPARE_TO_SUSPEND
+
+Apm standby -- prepare for APM event. Quiesce devices to make life
+easier for APM BIOS. event = FREEZE, flags = APM_STANDBY
+
+Apm suspend -- same as APM_STANDBY, but it we should probably avoid
+spinning down disks. event = FREEZE, flags = APM_SUSPEND
+
+System halt, reboot -- quiesce devices to make life easier for BIOS. event
+= FREEZE, flags = SYSTEM_HALT or SYSTEM_REBOOT
+
+System shutdown -- at least disks need to be spun down, or data may be
+lost. Quiesce devices, just to make life easier for BIOS. event =
+FREEZE, flags = SYSTEM_SHUTDOWN
+
+Kexec -- turn off DMAs and put hardware into some state where new
+kernel can take over. event = FREEZE, flags = KEXEC
+
+Powerdown at end of swsusp -- very similar to SYSTEM_SHUTDOWN, except wake
+may need to be enabled on some devices. This actually has at least 3
+subtypes, system can reboot, enter S4 and enter S5 at the end of
+swsusp. event = FREEZE, flags = SWSUSP and one of SYSTEM_REBOOT,
+SYSTEM_SHUTDOWN, SYSTEM_S4
+
+Suspend to ram -- put devices into low power state. event = SUSPEND,
+flags = SUSPEND_TO_RAM
+
+Freeze for swsusp snapshot -- stop DMA and interrupts. No need to put
+devices into low power mode, but you must be able to reinitialize
+device from scratch in resume method. This has two flavors, its done
+once on suspending kernel, once on resuming kernel. event = FREEZE,
+flags = DURING_SUSPEND or DURING_RESUME
+
+Device detach requested from /sys -- deinitialize device; proably same as
+SYSTEM_SHUTDOWN, I do not understand this one too much. probably event
+= FREEZE, flags = DEV_DETACH.
+
+#These are not really events sent:
+#
+#System fully on -- device is working normally; this is probably never
+#passed to suspend() method... event = ON, flags = 0
+#
+#Ready after resume -- userland is now running, again. Time to free any
+#memory you ate during prepare to suspend... event = ON, flags =
+#READY_AFTER_RESUME
+#
Driver Detach Power Management
diff -urN linux/Documentation/powerpc/cpu_features.txt
linux/Documentation/powerpc/cpu_features.txt
--- linux/Documentation/powerpc/cpu_features.txt 2003/01/11 17:53:08
1.1
+++ linux/Documentation/powerpc/cpu_features.txt 2005/01/13 14:05:16
1.2
@@ -0,0 +1,56 @@
+Hollis Blanchard <hollis@austin.ibm.com>
+5 Jun 2002
+
+This document describes the system (including self-modifying code) used in the
+PPC Linux kernel to support a variety of PowerPC CPUs without requiring
+compile-time selection.
+
+Early in the boot process the ppc32 kernel detects the current CPU type and
+chooses a set of features accordingly. Some examples include Altivec support,
+split instruction and data caches, and if the CPU supports the DOZE and NAP
+sleep modes.
+
+Detection of the feature set is simple. A list of processors can be found in
+arch/ppc/kernel/cputable.c. The PVR register is masked and compared with each
+value in the list. If a match is found, the cpu_features of cur_cpu_spec is
+assigned to the feature bitmask for this processor and a __setup_cpu function
+is called.
+
+C code may test 'cur_cpu_spec[smp_processor_id()]->cpu_features' for a
+particular feature bit. This is done in quite a few places, for example
+in ppc_setup_l2cr().
+
+Implementing cpufeatures in assembly is a little more involved. There are
+several paths that are performance-critical and would suffer if an array
+index, structure dereference, and conditional branch were added. To avoid the
+performance penalty but still allow for runtime (rather than compile-time) CPU
+selection, unused code is replaced by 'nop' instructions. This nop'ing is
+based on CPU 0's capabilities, so a multi-processor system with non-identical
+processors will not work (but such a system would likely have other problems
+anyways).
+
+After detecting the processor type, the kernel patches out sections of code
+that shouldn't be used by writing nop's over it. Using cpufeatures requires
+just 2 macros (found in include/asm-ppc/cputable.h), as seen in head.S
+transfer_to_handler:
+
+ #ifdef CONFIG_ALTIVEC
+ BEGIN_FTR_SECTION
+ mfspr r22,SPRN_VRSAVE /* if G4, save vrsave register
value */
+ stw r22,THREAD_VRSAVE(r23)
+ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
+ #endif /* CONFIG_ALTIVEC */
+
+If CPU 0 supports Altivec, the code is left untouched. If it doesn't, both
+instructions are replaced with nop's.
+
+The END_FTR_SECTION macro has two simpler variations: END_FTR_SECTION_IFSET
+and END_FTR_SECTION_IFCLR. These simply test if a flag is set (in
+cur_cpu_spec[0]->cpu_features) or is cleared, respectively. These two macros
+should be used in the majority of cases.
+
+The END_FTR_SECTION macros are implemented by storing information about this
+code in the '__ftr_fixup' ELF section. When do_cpu_ftr_fixups
+(arch/ppc/kernel/misc.S) is invoked, it will iterate over the records in
+__ftr_fixup, and if the required feature is not present it will loop writing
+nop's from each BEGIN_FTR_SECTION to END_FTR_SECTION.
diff -urN linux/Documentation/powerpc/00-INDEX
linux/Documentation/powerpc/00-INDEX
--- linux/Documentation/powerpc/00-INDEX 2000/06/19 22:45:38 1.6
+++ linux/Documentation/powerpc/00-INDEX 2005/01/13 14:05:16 1.7
@@ -5,6 +5,9 @@
00-INDEX
- this file
+cpu_features.txt
+ - info on how we support a variety of CPUs with minimal compile-time
+ options.
ppc_htab.txt
- info about the Linux/PPC /proc/ppc_htab entry
smp.txt
diff -urN linux/Documentation/scsi/ChangeLog.1992-1997
linux/Documentation/scsi/ChangeLog.1992-1997
--- linux/Documentation/scsi/ChangeLog.1992-1997 1970/01/01 00:00:00
+++ linux/Documentation/scsi/ChangeLog.1992-1997 Thu Jan 13 14:05:16
2005 1.1
@@ -0,0 +1,2023 @@
+Sat Jan 18 15:51:45 1997 Richard Henderson <rth@tamu.edu>
+
+ * Don't play with usage_count directly, instead hand around
+ the module header and use the module macros.
+
+Fri May 17 00:00:00 1996 Leonard N. Zubkoff <lnz@dandelion.com>
+
+ * BusLogic Driver Version 2.0.3 Released.
+
+Tue Apr 16 21:00:00 1996 Leonard N. Zubkoff <lnz@dandelion.com>
+
+ * BusLogic Driver Version 1.3.2 Released.
+
+Sun Dec 31 23:26:00 1995 Leonard N. Zubkoff <lnz@dandelion.com>
+
+ * BusLogic Driver Version 1.3.1 Released.
+
+Fri Nov 10 15:29:49 1995 Leonard N. Zubkoff <lnz@dandelion.com>
+
+ * Released new BusLogic driver.
+
+Wed Aug 9 22:37:04 1995 Andries Brouwer <aeb@cwi.nl>
+
+ As a preparation for new device code, separated the various
+ functions the request->dev field had into the device proper,
+ request->rq_dev and a status field request->rq_status.
+
+ The 2nd argument of bios_param is now a kdev_t.
+
+Wed Jul 19 10:43:15 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
+
+ * scsi.c (scsi_proc_info): /proc/scsi/scsi now also lists all
+ attached devices.
+
+ * scsi_proc.c (proc_print_scsidevice): Added. Used by scsi.c and
+ eata_dma_proc.c to produce some device info for /proc/scsi.
+
+ * eata_dma.c (eata_queue)(eata_int_handler)(eata_scsi_done):
+ Changed handling of internal SCSI commands send to the HBA.
+
+
+Wed Jul 19 10:09:17 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
+
+ * Linux 1.3.11 released.
+
+ * eata_dma.c (eata_queue)(eata_int_handler): Added code to do
+ command latency measurements if requested by root through
+ /proc/scsi interface.
+ Throughout Use HZ constant for time references.
+
+ * eata_pio.c: Use HZ constant for time references.
+
+ * aic7xxx.c, aic7xxx.h, aic7xxx_asm.c: Changed copyright from BSD
+ to GNU style.
+
+ * scsi.h: Added READ_12 command opcode constant
+
+Wed Jul 19 09:25:30 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
+
+ * Linux 1.3.10 released.
+
+ * scsi_proc.c (dispatch_scsi_info): Removed unused variable.
+
+Wed Jul 19 09:25:30 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
+
+ * Linux 1.3.9 released.
+
+ * scsi.c Blacklist concept expanded to 'support' more device
+ deficiencies. blacklist[] renamed to device_list[]
+ (scan_scsis): Code cleanup.
+
+ * scsi_debug.c (scsi_debug_proc_info): Added support to control
+ device lockup simulation via /proc/scsi interface.
+
+
+Wed Jul 19 09:22:34 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
+
+ * Linux 1.3.7 released.
+
+ * scsi_proc.c: Fixed a number of bugs in directory handling
+
+Wed Jul 19 09:18:28 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
+
+ * Linux 1.3.5 released.
+
+ * Native wide, multichannel and /proc/scsi support now in official
+ kernel distribution.
+
+ * scsi.c/h, hosts.c/h et al reindented to increase readability
+ (especially on 80 column wide terminals).
+
+ * scsi.c, scsi_proc.c, ../../fs/proc/inode.c: Added
+ /proc/scsi/scsi which allows root to scan for hotplugged devices.
+
+ * scsi.c (scsi_proc_info): Added, to support /proc/scsi/scsi.
+ (scan_scsis): Added some 'spaghetti' code to allow scanning for
+ single devices.
+
+
+Thu Jun 20 15:20:27 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
+
+ * proc.c: Renamed to scsi_proc.c
+
+Mon Jun 12 20:32:45 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
+
+ * Linux 1.3.0 released.
+
+Mon May 15 19:33:14 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
+
+ * scsi.c: Added native multichannel and wide scsi support.
+
+ * proc.c (dispatch_scsi_info) (build_proc_dir_hba_entries):
+ Updated /proc/scsi interface.
+
+Thu May 4 17:58:48 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
+
+ * sd.c (requeue_sd_request): Zero out the scatterlist only if
+ scsi_malloc returned memory for it.
+
+ * eata_dma.c (register_HBA) (eata_queue): Add support for
+ large scatter/gather tables and set use_clustering accordingly
+
+ * hosts.c: Make use_clustering changeable in the Scsi_Host structure.
+
+Wed Apr 12 15:25:52 1995 Eric Youngdale (eric@andante)
+
+ * Linux 1.2.5 released.
+
+ * buslogic.c: Update to version 1.15 (From Leonard N. Zubkoff).
+ Fixed interrupt routine to avoid races when handling multiple
+ complete commands per interrupt. Seems to come up with faster
+ cards.
+
+ * eata_dma.c: Update to 2.3.5r. Modularize. Improved error handling
+ throughout and fixed bug interrupt routine which resulted in shifted
+ status bytes. Added blink LED state checks for ISA and EISA HBAs.
+ Memory management bug seems to have disappeared ==> increasing
+ C_P_L_CURRENT_MAX to 16 for now. Decreasing C_P_L_DIV to 3 for
+ performance reasons.
+
+ * scsi.c: If we get a FMK, EOM, or ILI when attempting to scan
+ the bus, assume that it was just noise on the bus, and ignore
+ the device.
+
+ * scsi.h: Update and add a bunch of missing commands which we
+ were never using.
+
+ * sd.c: Use restore_flags in do_sd_request - this may result in
+ latency conditions, but it gets rid of races and crashes.
+ Do not save flags again when searching for a second command to
+ queue.
+
+ * st.c: Use bytes, not STP->buffer->buffer_size when reading
+ from tape.
+
+
+Tue Apr 4 09:42:08 1995 Eric Youngdale (eric@andante)
+
+ * Linux 1.2.4 released.
+
+ * st.c: Fix typo - restoring wrong flags.
+
+Wed Mar 29 06:55:12 1995 Eric Youngdale (eric@andante)
+
+ * Linux 1.2.3 released.
+
+ * st.c: Perform some waiting operations with interrupts off.
+ Is this correct???
+
+Wed Mar 22 10:34:26 1995 Eric Youngdale (eric@andante)
+
+ * Linux 1.2.2 released.
+
+ * aha152x.c: Modularize. Add support for PCMCIA.
+
+ * eata.c: Update to version 2.0. Fixed bug preventing media
+ detection. If scsi_register_host returns NULL, fail gracefully.
+
+ * scsi.c: Detect as NEC (for photo-cd purposes) for the 84
+ and 25 models as "NEC_OLDCDR".
+
+ * scsi.h: Add define for NEC_OLDCDR
+
+ * sr.c: Add handling for NEC_OLDCDR. Treat as unknown.
+
+ * u14-34f.c: Update to version 2.0. Fixed same bug as in
+ eata.c.
+
+
+Mon Mar 6 11:11:20 1995 Eric Youngdale (eric@andante)
+
+ * Linux 1.2.0 released. Yeah!!!
+
+ * Minor spelling/punctuation changes throughout. Nothing
+ substantive.
+
+Mon Feb 20 21:33:03 1995 Eric Youngdale (eric@andante)
+
+ * Linux 1.1.95 released.
+
+ * qlogic.c: Update to version 0.41.
+
+ * seagate.c: Change some message to be more descriptive about what
+ we detected.
+
+ * sr.c: spelling/whitespace changes.
+
+Mon Feb 20 21:33:03 1995 Eric Youngdale (eric@andante)
+
+ * Linux 1.1.94 released.
+
+Mon Feb 20 08:57:17 1995 Eric Youngdale (eric@andante)
+
+ * Linux 1.1.93 released.
+
+ * hosts.h: Change io_port to long int from short.
+
+ * 53c7,8xx.c: crash on AEN fixed, SCSI reset is no longer a NOP,
+ NULL pointer panic on odd UDCs fixed, two bugs in diagnostic output
+ fixed, should initialize correctly if left running, now loadable,
+ new memory allocation, extraneous diagnostic output suppressed,
+ splx() replaced with save/restore flags. [ Drew ]
+
+ * hosts.c, hosts.h, scsi_ioctl.c, sd.c, sd_ioctl.c, sg.c, sr.c,
+ sr_ioctl.c: Add special junk at end that Emacs will use for
+ formatting the file.
+
+ * qlogic.c: Update to v0.40a. Improve parity handling.
+
+ * scsi.c: Add Hitachi DK312C to blacklist. Change "};" to "}" in
+ many places. Use scsi_init_malloc to get command block - may
+ need this to be dma compatible for some host adapters.
+ Restore interrupts after unregistering a host.
+
+ * sd.c: Use sti instead of restore flags - causes latency problems.
+
+ * seagate.c: Use controller_type to determine string used when
+ registering irq.
+
+ * sr.c: More photo-cd hacks to make sure we get the xa stuff right.
+ * sr.h, sr.c: Change is_xa to xa_flags field.
+
+ * st.c: Disable retries for write operations.
+
+Wed Feb 15 10:52:56 1995 Eric Youngdale (eric@andante)
+
+ * Linux 1.1.92 released.
+
+ * eata.c: Update to 1.17.
+
+ * eata_dma.c: Update to 2.31a. Add more support for /proc/scsi.
+ Continuing modularization. Less crashes because of the bug in the
+ memory management ==> increase C_P_L_CURRENT_MAX to 10
+ and decrease C_P_L_DIV to 4.
+
+ * hosts.c: If we remove last host registered, reuse host number.
+ When freeing memory from host being deregistered, free extra_bytes
+ too.
+
+ * scsi.c (scan_scsis): memset(SDpnt, 0) and set SCmd.device to SDpnt.
+ Change memory allocation to work around bugs in __get_dma_pages.
+ Do not free host if usage count is not zero (for modules).
+
+ * sr_ioctl.c: Increase IOCTL_TIMEOUT to 3000.
+
+ * st.c: Allow for ST_EXTRA_DEVS in st data structures.
+
+ * u14-34f.c: Update to 1.17.
+
+Thu Feb 9 10:11:16 1995 Eric Youngdale (eric@andante)
+
+ * Linux 1.1.91 released.
+
+ * eata.c: Update to 1.16. Use wish_block instead of host->block.
+
+ * hosts.c: Initialize wish_block to 0.
+
+ * hosts.h: Add wish_block.
+
+ * scsi.c: Use wish_block as indicator that the host should be added
+ to block list.
+
+ * sg.c: Add SG_EXTRA_DEVS to number of slots.
+
+ * u14-34f.c: Use wish_block.
+
+Tue Feb 7 11:46:04 1995 Eric Youngdale (eric@andante)
+
+ * Linux 1.1.90 released.
+
+ * eata.c: Change naming from eata_* to eata2x_*. Now at vers 1.15.
+ Update interrupt handler to take pt_regs as arg. Allow blocking
+ even if loaded as module. Initialize target_time_out array.
+ Do not put sti(); in timing loop.
+
+ * hosts.c: Do not reuse host numbers.
+ Use scsi_make_blocked_list to generate blocking list.
+
+ * script_asm.pl: Beats me. Don't know perl. Something to do with
+ phase index.
+
+ * scsi.c (scsi_make_blocked_list): New function - code copied from
+ hosts.c.
+
+ * scsi.c: Update code to disable photo CD for Toshiba cdroms.
+ Use just manufacturer name, not model number.
+
+ * sr.c: Fix setting density for Toshiba drives.
+
+ * u14-34f.c: Clear target_time_out array during reset.
+
+Wed Feb 1 09:20:45 1995 Eric Youngdale (eric@andante)
+
+ * Linux 1.1.89 released.
+
+ * Makefile, u14-34f.c: Modularize.
+
+ * Makefile, eata.c: Modularize. Now version 1.14
+
+ * NCR5380.c: Update interrupt handler with new arglist. Minor
+ cleanups.
+
+ * eata_dma.c: Begin to modularize. Add hooks for /proc/scsi.
+ New version 2.3.0a. Add code in interrupt handler to allow
+ certain CDROM drivers to be detected which return a
+ CHECK_CONDITION during SCSI bus scan. Add opcode check to get
+ all DATA IN and DATA OUT phases right. Utilize HBA_interpret flag.
+ Improvements in HBA identification. Various other minor stuff.
+
+ * hosts.c: Initialize ->dma_channel and ->io_port when registering
+ a new host.
+
+ * qlogic.c: Modularize and add PCMCIA support.
+
+ * scsi.c: Add Hitachi to blacklist.
+
+ * scsi.c: Change default to no lun scan (too many problem devices).
+
+ * scsi.h: Define QUEUE_FULL condition.
+
+ * sd.c: Do not check for non-existent partition until after
+ new media check.
+
+ * sg.c: Undo previous change which was wrong.
+
+ * sr_ioctl.c: Increase IOCTL_TIMEOUT to 2000.
+
+ * st.c: Patches from Kai - improve filemark handling.
+
+Tue Jan 31 17:32:12 1995 Eric Youngdale (eric@andante)
+
+ * Linux 1.1.88 released.
+
+ * Throughout - spelling/grammar fixups.
+
+ * scsi.c: Make sure that all buffers are 16 byte aligned - some
+ drivers (buslogic) need this.
+
+ * scsi.c (scan_scsis): Remove message printed.
+
+ * scsi.c (scsi_init): Move message here.
+
+Mon Jan 30 06:40:25 1995 Eric Youngdale (eric@andante)
+
+ * Linux 1.1.87 released.
+
+ * sr.c: Photo-cd related changes. (Gerd Knorr??).
+
+ * st.c: Changes from Kai related to EOM detection.
+
+Mon Jan 23 23:53:10 1995 Eric Youngdale (eric@andante)
+
+ * Linux 1.1.86 released.
+
+ * 53c7,8xx.h: Change SG size to 127.
+
+ * eata_dma: Update to version 2.10i. Remove bug in the registration
+ of multiple HBAs and channels. Minor other improvements and stylistic
+ changes.
+
+ * scsi.c: Test for Toshiba XM-3401TA and exclude from detection
+ as toshiba drive - photo cd does not work with this drive.
+
+ * sr.c: Update photocd code.
+
+Mon Jan 23 23:53:10 1995 Eric Youngdale (eric@andante)
+
+ * Linux 1.1.85 released.
+
+ * st.c, st_ioctl.c, sg.c, sd_ioctl.c, scsi_ioctl.c, hosts.c:
+ include linux/mm.h
+
+ * qlogic.c, buslogic.c, aha1542.c: Include linux/module.h.
+
+Sun Jan 22 22:08:46 1995 Eric Youngdale (eric@andante)
+
+ * Linux 1.1.84 released.
[%d lines skipped]
1626diff -urN linux/Documentation/scsi/scsi_mid_low_api.txt
linux/Documentation/scsi/scsi_mid_low_api.txt
--- linux/Documentation/scsi/scsi_mid_low_api.txt 2004/10/25 20:44:09
1.13
+++ linux/Documentation/scsi/scsi_mid_low_api.txt 2005/01/13 14:05:16
1.14
@@ -363,8 +363,8 @@
Mid level supplied functions
============================
These functions are supplied by the SCSI mid level for use by LLDs.
-The names (i.e. entry points) of these functions are exported (mainly in
-scsi_syms.c) so an LLD that is a module can access them. The kernel will
+The names (i.e. entry points) of these functions are exported
+so an LLD that is a module can access them. The kernel will
arrange for the SCSI mid level to be loaded and initialized before any LLD
is initialized. The functions below are listed alphabetically and their
names all start with "scsi_".
diff -urN linux/Documentation/scsi/ChangeLog linux/Documentation/scsi/ChangeLog
--- linux/Documentation/scsi/Attic/ChangeLog Thu Jan 13 14:05:16 2005
1.1
+++ linux/Documentation/scsi/Attic/ChangeLog 1970/01/01 00:00:002002
@@ -1,2023 +0,0 @@
-Sat Jan 18 15:51:45 1997 Richard Henderson <rth@tamu.edu>
-
- * Don't play with usage_count directly, instead hand around
- the module header and use the module macros.
-
-Fri May 17 00:00:00 1996 Leonard N. Zubkoff <lnz@dandelion.com>
-
- * BusLogic Driver Version 2.0.3 Released.
-
-Tue Apr 16 21:00:00 1996 Leonard N. Zubkoff <lnz@dandelion.com>
-
- * BusLogic Driver Version 1.3.2 Released.
-
-Sun Dec 31 23:26:00 1995 Leonard N. Zubkoff <lnz@dandelion.com>
-
- * BusLogic Driver Version 1.3.1 Released.
-
-Fri Nov 10 15:29:49 1995 Leonard N. Zubkoff <lnz@dandelion.com>
-
- * Released new BusLogic driver.
-
-Wed Aug 9 22:37:04 1995 Andries Brouwer <aeb@cwi.nl>
-
- As a preparation for new device code, separated the various
- functions the request->dev field had into the device proper,
- request->rq_dev and a status field request->rq_status.
-
- The 2nd argument of bios_param is now a kdev_t.
-
-Wed Jul 19 10:43:15 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * scsi.c (scsi_proc_info): /proc/scsi/scsi now also lists all
- attached devices.
-
- * scsi_proc.c (proc_print_scsidevice): Added. Used by scsi.c and
- eata_dma_proc.c to produce some device info for /proc/scsi.
-
- * eata_dma.c (eata_queue)(eata_int_handler)(eata_scsi_done):
- Changed handling of internal SCSI commands send to the HBA.
-
-
-Wed Jul 19 10:09:17 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * Linux 1.3.11 released.
-
- * eata_dma.c (eata_queue)(eata_int_handler): Added code to do
- command latency measurements if requested by root through
- /proc/scsi interface.
- Throughout Use HZ constant for time references.
-
- * eata_pio.c: Use HZ constant for time references.
-
- * aic7xxx.c, aic7xxx.h, aic7xxx_asm.c: Changed copyright from BSD
- to GNU style.
-
- * scsi.h: Added READ_12 command opcode constant
-
-Wed Jul 19 09:25:30 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * Linux 1.3.10 released.
-
- * scsi_proc.c (dispatch_scsi_info): Removed unused variable.
-
-Wed Jul 19 09:25:30 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * Linux 1.3.9 released.
-
- * scsi.c Blacklist concept expanded to 'support' more device
- deficiencies. blacklist[] renamed to device_list[]
- (scan_scsis): Code cleanup.
-
- * scsi_debug.c (scsi_debug_proc_info): Added support to control
- device lockup simulation via /proc/scsi interface.
-
-
-Wed Jul 19 09:22:34 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * Linux 1.3.7 released.
-
- * scsi_proc.c: Fixed a number of bugs in directory handling
-
-Wed Jul 19 09:18:28 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * Linux 1.3.5 released.
-
- * Native wide, multichannel and /proc/scsi support now in official
- kernel distribution.
-
- * scsi.c/h, hosts.c/h et al reindented to increase readability
- (especially on 80 column wide terminals).
-
- * scsi.c, scsi_proc.c, ../../fs/proc/inode.c: Added
- /proc/scsi/scsi which allows root to scan for hotplugged devices.
-
- * scsi.c (scsi_proc_info): Added, to support /proc/scsi/scsi.
- (scan_scsis): Added some 'spaghetti' code to allow scanning for
- single devices.
-
-
-Thu Jun 20 15:20:27 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * proc.c: Renamed to scsi_proc.c
-
-Mon Jun 12 20:32:45 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * Linux 1.3.0 released.
-
-Mon May 15 19:33:14 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * scsi.c: Added native multichannel and wide scsi support.
-
- * proc.c (dispatch_scsi_info) (build_proc_dir_hba_entries):
- Updated /proc/scsi interface.
-
-Thu May 4 17:58:48 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * sd.c (requeue_sd_request): Zero out the scatterlist only if
- scsi_malloc returned memory for it.
-
- * eata_dma.c (register_HBA) (eata_queue): Add support for
- large scatter/gather tables and set use_clustering accordingly
-
- * hosts.c: Make use_clustering changeable in the Scsi_Host structure.
-
-Wed Apr 12 15:25:52 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.2.5 released.
-
- * buslogic.c: Update to version 1.15 (From Leonard N. Zubkoff).
- Fixed interrupt routine to avoid races when handling multiple
- complete commands per interrupt. Seems to come up with faster
- cards.
-
- * eata_dma.c: Update to 2.3.5r. Modularize. Improved error handling
- throughout and fixed bug interrupt routine which resulted in shifted
- status bytes. Added blink LED state checks for ISA and EISA HBAs.
- Memory management bug seems to have disappeared ==> increasing
- C_P_L_CURRENT_MAX to 16 for now. Decreasing C_P_L_DIV to 3 for
- performance reasons.
-
- * scsi.c: If we get a FMK, EOM, or ILI when attempting to scan
- the bus, assume that it was just noise on the bus, and ignore
- the device.
-
- * scsi.h: Update and add a bunch of missing commands which we
- were never using.
-
- * sd.c: Use restore_flags in do_sd_request - this may result in
- latency conditions, but it gets rid of races and crashes.
- Do not save flags again when searching for a second command to
- queue.
-
- * st.c: Use bytes, not STP->buffer->buffer_size when reading
- from tape.
-
-
-Tue Apr 4 09:42:08 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.2.4 released.
-
- * st.c: Fix typo - restoring wrong flags.
-
-Wed Mar 29 06:55:12 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.2.3 released.
-
- * st.c: Perform some waiting operations with interrupts off.
- Is this correct???
-
-Wed Mar 22 10:34:26 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.2.2 released.
-
- * aha152x.c: Modularize. Add support for PCMCIA.
-
- * eata.c: Update to version 2.0. Fixed bug preventing media
- detection. If scsi_register_host returns NULL, fail gracefully.
-
- * scsi.c: Detect as NEC (for photo-cd purposes) for the 84
- and 25 models as "NEC_OLDCDR".
-
- * scsi.h: Add define for NEC_OLDCDR
-
- * sr.c: Add handling for NEC_OLDCDR. Treat as unknown.
-
- * u14-34f.c: Update to version 2.0. Fixed same bug as in
- eata.c.
-
-
-Mon Mar 6 11:11:20 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.2.0 released. Yeah!!!
-
- * Minor spelling/punctuation changes throughout. Nothing
- substantive.
-
-Mon Feb 20 21:33:03 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.95 released.
-
- * qlogic.c: Update to version 0.41.
-
- * seagate.c: Change some message to be more descriptive about what
- we detected.
-
- * sr.c: spelling/whitespace changes.
-
-Mon Feb 20 21:33:03 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.94 released.
-
-Mon Feb 20 08:57:17 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.93 released.
-
- * hosts.h: Change io_port to long int from short.
-
- * 53c7,8xx.c: crash on AEN fixed, SCSI reset is no longer a NOP,
- NULL pointer panic on odd UDCs fixed, two bugs in diagnostic output
- fixed, should initialize correctly if left running, now loadable,
- new memory allocation, extraneous diagnostic output suppressed,
- splx() replaced with save/restore flags. [ Drew ]
-
- * hosts.c, hosts.h, scsi_ioctl.c, sd.c, sd_ioctl.c, sg.c, sr.c,
- sr_ioctl.c: Add special junk at end that Emacs will use for
- formatting the file.
-
- * qlogic.c: Update to v0.40a. Improve parity handling.
-
- * scsi.c: Add Hitachi DK312C to blacklist. Change "};" to "}" in
- many places. Use scsi_init_malloc to get command block - may
- need this to be dma compatible for some host adapters.
- Restore interrupts after unregistering a host.
-
- * sd.c: Use sti instead of restore flags - causes latency problems.
-
- * seagate.c: Use controller_type to determine string used when
- registering irq.
-
- * sr.c: More photo-cd hacks to make sure we get the xa stuff right.
- * sr.h, sr.c: Change is_xa to xa_flags field.
-
- * st.c: Disable retries for write operations.
-
-Wed Feb 15 10:52:56 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.92 released.
-
- * eata.c: Update to 1.17.
-
- * eata_dma.c: Update to 2.31a. Add more support for /proc/scsi.
- Continuing modularization. Less crashes because of the bug in the
- memory management ==> increase C_P_L_CURRENT_MAX to 10
- and decrease C_P_L_DIV to 4.
-
- * hosts.c: If we remove last host registered, reuse host number.
- When freeing memory from host being deregistered, free extra_bytes
- too.
-
- * scsi.c (scan_scsis): memset(SDpnt, 0) and set SCmd.device to SDpnt.
- Change memory allocation to work around bugs in __get_dma_pages.
- Do not free host if usage count is not zero (for modules).
-
- * sr_ioctl.c: Increase IOCTL_TIMEOUT to 3000.
-
- * st.c: Allow for ST_EXTRA_DEVS in st data structures.
-
- * u14-34f.c: Update to 1.17.
-
-Thu Feb 9 10:11:16 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.91 released.
-
- * eata.c: Update to 1.16. Use wish_block instead of host->block.
-
- * hosts.c: Initialize wish_block to 0.
-
- * hosts.h: Add wish_block.
-
- * scsi.c: Use wish_block as indicator that the host should be added
- to block list.
-
- * sg.c: Add SG_EXTRA_DEVS to number of slots.
-
- * u14-34f.c: Use wish_block.
-
-Tue Feb 7 11:46:04 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.90 released.
-
- * eata.c: Change naming from eata_* to eata2x_*. Now at vers 1.15.
- Update interrupt handler to take pt_regs as arg. Allow blocking
- even if loaded as module. Initialize target_time_out array.
- Do not put sti(); in timing loop.
-
- * hosts.c: Do not reuse host numbers.
- Use scsi_make_blocked_list to generate blocking list.
-
- * script_asm.pl: Beats me. Don't know perl. Something to do with
- phase index.
-
- * scsi.c (scsi_make_blocked_list): New function - code copied from
- hosts.c.
-
- * scsi.c: Update code to disable photo CD for Toshiba cdroms.
- Use just manufacturer name, not model number.
-
- * sr.c: Fix setting density for Toshiba drives.
-
- * u14-34f.c: Clear target_time_out array during reset.
-
-Wed Feb 1 09:20:45 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.89 released.
-
- * Makefile, u14-34f.c: Modularize.
-
- * Makefile, eata.c: Modularize. Now version 1.14
-
- * NCR5380.c: Update interrupt handler with new arglist. Minor
- cleanups.
-
- * eata_dma.c: Begin to modularize. Add hooks for /proc/scsi.
- New version 2.3.0a. Add code in interrupt handler to allow
- certain CDROM drivers to be detected which return a
- CHECK_CONDITION during SCSI bus scan. Add opcode check to get
- all DATA IN and DATA OUT phases right. Utilize HBA_interpret flag.
- Improvements in HBA identification. Various other minor stuff.
-
- * hosts.c: Initialize ->dma_channel and ->io_port when registering
- a new host.
-
- * qlogic.c: Modularize and add PCMCIA support.
-
- * scsi.c: Add Hitachi to blacklist.
-
- * scsi.c: Change default to no lun scan (too many problem devices).
-
- * scsi.h: Define QUEUE_FULL condition.
-
- * sd.c: Do not check for non-existent partition until after
- new media check.
-
- * sg.c: Undo previous change which was wrong.
-
- * sr_ioctl.c: Increase IOCTL_TIMEOUT to 2000.
-
- * st.c: Patches from Kai - improve filemark handling.
-
-Tue Jan 31 17:32:12 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.88 released.
-
- * Throughout - spelling/grammar fixups.
-
- * scsi.c: Make sure that all buffers are 16 byte aligned - some
- drivers (buslogic) need this.
-
- * scsi.c (scan_scsis): Remove message printed.
-
- * scsi.c (scsi_init): Move message here.
-
-Mon Jan 30 06:40:25 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.87 released.
-
- * sr.c: Photo-cd related changes. (Gerd Knorr??).
-
- * st.c: Changes from Kai related to EOM detection.
-
-Mon Jan 23 23:53:10 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.86 released.
-
- * 53c7,8xx.h: Change SG size to 127.
-
- * eata_dma: Update to version 2.10i. Remove bug in the registration
- of multiple HBAs and channels. Minor other improvements and stylistic
- changes.
-
- * scsi.c: Test for Toshiba XM-3401TA and exclude from detection
- as toshiba drive - photo cd does not work with this drive.
-
- * sr.c: Update photocd code.
-
-Mon Jan 23 23:53:10 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.85 released.
-
- * st.c, st_ioctl.c, sg.c, sd_ioctl.c, scsi_ioctl.c, hosts.c:
- include linux/mm.h
-
- * qlogic.c, buslogic.c, aha1542.c: Include linux/module.h.
-
-Sun Jan 22 22:08:46 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.84 released.
[%d lines skipped]
1626diff -urN linux/Documentation/sound/alsa/Bt87x.txt
linux/Documentation/sound/alsa/Bt87x.txt
--- linux/Documentation/sound/alsa/Bt87x.txt 1970/01/01 00:00:00
+++ linux/Documentation/sound/alsa/Bt87x.txt Thu Jan 13 14:05:16 2005
1.1
@@ -0,0 +1,78 @@
+Intro
+=====
+
+You might have noticed that the bt878 grabber cards have actually
+_two_ PCI functions:
+
+$ lspci
+[ ... ]
+00:0a.0 Multimedia video controller: Brooktree Corporation Bt878 (rev 02)
+00:0a.1 Multimedia controller: Brooktree Corporation Bt878 (rev 02)
+[ ... ]
+
+The first does video, it is backward compatible to the bt848. The second
+does audio. snd-bt87x is a driver for the second function. It's a sound
+driver which can be used for recording sound (and _only_ recording, no
+playback). As most TV cards come with a short cable which can be plugged
+into your sound card's line-in you probably don't need this driver if all
+you want to do is just watching TV...
+
+Some cards do not bother to connect anything to the audio input pins of
+the chip, and some other cards use the audio function to transport MPEG
+video data, so it's quite possible that audio recording may not work
+with your card.
+
+
+Driver Status
+=============
+
+The driver is now stable. However, it doesn't know about many TV cards,
+and it refuses to load for cards it doesn't know.
+
+If the driver complains ("Unknown TV card found, the audio driver will
+not load"), you can specify the load_all=1 option to force the driver to
+try to use the audio capture function of your card. If the frequency of
+recorded data is not right, try to specify the digital_rate option with
+other values than the default 32000 (often it's 44100 or 64000).
+
+If you have an unknown card, please mail the ID and board name to
+<alsa-devel@lists.sf.net>, regardless of whether audio capture works or
+not, so that future versions of this driver know about your card.
+
+
+Audio modes
+===========
+
+The chip knows two different modes (digital/analog). snd-bt87x
+registers two PCM devices, one for each mode. They cannot be used at
+the same time.
+
+
+Digital audio mode
+==================
+
+The first device (hw:X,0) gives you 16 bit stereo sound. The sample
+rate depends on the external source which feeds the Bt87x with digital
+sound via I2S interface.
+
+
+Analog audio mode (A/D)
+=======================
+
+The second device (hw:X,1) gives you 8 or 16 bit mono sound. Supported
+sample rates are between 119466 and 448000 Hz (yes, these numbers are
+that high). If you've set the CONFIG_SND_BT87X_OVERCLOCK option, the
+maximum sample rate is 1792000 Hz, but audio data becomes unusable
+beyond 896000 Hz on my card.
+
+The chip has three analog inputs. Consequently you'll get a mixer
+device to control these.
+
+
+Have fun,
+
+ Clemens
+
+
+Written by Clemens Ladisch <clemens@ladisch.de>
+big parts copied from btaudio.txt by Gerd Knorr <kraxel@bytesex.org>
diff -urN linux/Documentation/sound/alsa/ALSA-Configuration.txt
linux/Documentation/sound/alsa/ALSA-Configuration.txt
--- linux/Documentation/sound/alsa/ALSA-Configuration.txt 2004/11/15
11:49:13 1.14
+++ linux/Documentation/sound/alsa/ALSA-Configuration.txt 2005/01/13
14:05:16 1.15
@@ -252,9 +252,18 @@
Module for video cards based on Bt87x chips.
digital_rate - Override the default digital rate (Hz)
+ load_all - Load the driver even if the card model isn't known
Module supports up to 8 cards.
+ Module snd-ca0106
+ -----------------
+
+ Module for Creative Audigy LS and SB Live 24bit
+
+ Module supports up to 8 cards.
+
+
Module snd-cmi8330
------------------
@@ -426,6 +435,13 @@
* Creative Card 5.1 (c) 2003 [0x3fc3/0x7cff]
* Creative Card all ins and outs [0x3fff/0x7fff]
+ Module snd-emu10k1x
+ -------------------
+
+ Module for Creative Emu10k1X (SB Live Dell OEM version)
+
+ Module supports up to 8 cards.
+
Module snd-ens1370
------------------
@@ -595,8 +611,11 @@
Module supports up to 8 cards.
- Note: you need to load the firmware via hdsploader utility included
- in alsa-tools and alsa-firmware packages.
+ Note: The firmware data can be automatically loaded via hotplug
+ when CONFIG_FW_LOADER is set. Otherwise, you need to load
+ the firmware via hdsploader utility included in alsa-tools
+ package.
+ The firmware data is found in alsa-firmware package.
Note: snd-page-alloc module does the job which snd-hammerfall-mem
module did formerly. It will allocate the buffers in advance
@@ -774,6 +793,12 @@
Note: One miXart8 board will be represented as 4 alsa cards.
See MIXART.txt for details.
+ When the driver is compiled as a module and the hotplug firmware
+ is supported, the firmware data is loaded via hotplug automatically.
+ Install the necessary firmware files in alsa-firmware package.
+ When no hotplug fw loader is available, you need to load the
+ firmware via mixartloader utility in alsa-tools package.
+
Module snd-mpu401
-----------------
@@ -1182,6 +1207,15 @@
Note: for the MPU401 on VIA823x, use snd-mpu401 driver
additonally. The mpu_port option is for VIA686 chips only.
+ Module snd-via82xx-modem
+ ------------------------
+
+ Module for VIA82xx AC97 modem
+
+ ac97_clock - AC'97 codec clock base (default 48000Hz)
+
+ Module supports up to 8 cards.
+
Module snd-virmidi
------------------
@@ -1203,9 +1237,12 @@
Module supports up to 8 cards.
- For loading the firmware, use vxloader utility in alsa-tools
- and alsa-firmware packages. You can load the firmware automatically
- by adding the following to /etc/modprobe.conf
+ When the driver is compiled as a module and the hotplug firmware
+ is supported, the firmware data is loaded via hotplug automatically.
+ Install the necessary firmware files in alsa-firmware package.
+ When no hotplug fw loader is available, you need to load the
+ firmware via vxloader utility in alsa-tools package. To invoke
+ vxloader automatically, add the following to /etc/modprobe.conf
install snd-vx222 /sbin/modprobe --first-time -i snd-vx222 &&
/usr/bin/vxloader
@@ -1234,8 +1271,11 @@
To activate the driver via the card manager, you'll need to set
up /etc/pcmcia/vxpocket.conf. See the sound/pcmcia/vx/vxpocket.c.
- For loading the firmware, use vxloader utility in alsa-tools
- and alsa-firmware packages.
+ When the driver is compiled as a module and the hotplug firmware
+ is supported, the firmware data is loaded via hotplug automatically.
+ Install the necessary firmware files in alsa-firmware package.
+ When no hotplug fw loader is available, you need to load the
+ firmware via vxloader utility in alsa-tools package.
The irq_mask and irq_list are provided to avoid allocation of
specific IRQs. Usually you don't need to specify them.
@@ -1260,8 +1300,11 @@
To activate the driver via the card manager, you'll need to set
up /etc/pcmcia/vxp440.conf. See the sound/pcmcia/vx/vxp440.c.
- For loading the firmware, use vxloader utility in alsa-tools
- and alsa-firmware packages.
+ When the driver is compiled as a module and the hotplug firmware
+ is supported, the firmware data is loaded via hotplug automatically.
+ Install the necessary firmware files in alsa-firmware package.
+ When no hotplug fw loader is available, you need to load the
+ firmware via vxloader utility in alsa-tools package.
The irq_mask and irq_list are provided to avoid allocation of
specific IRQs. Usually you don't need to specify them.
diff -urN linux/Documentation/sound/alsa/MIXART.txt
linux/Documentation/sound/alsa/MIXART.txt
--- linux/Documentation/sound/alsa/MIXART.txt 2004/04/12 20:23:21 1.1
+++ linux/Documentation/sound/alsa/MIXART.txt 2005/01/13 14:05:16 1.2
@@ -72,6 +72,10 @@
FIRMWARE
========
+[As of 2.6.11, the firmware can be loaded automatically with hotplug
+ when CONFIG_FW_LOADER is set. The mixartloader is necessary only
+ for older versions or when you build the driver into kernel.]
+
For loading the firmware automatically after the module is loaded, use
the post-install command. For example, add the following entry to
/etc/modprobe.conf for miXart driver:
diff -urN linux/Documentation/sound/alsa/OSS-Emulation.txt
linux/Documentation/sound/alsa/OSS-Emulation.txt
--- linux/Documentation/sound/alsa/OSS-Emulation.txt 2004/02/19 03:06:21
1.4
+++ linux/Documentation/sound/alsa/OSS-Emulation.txt 2005/01/13 14:05:16
1.5
@@ -164,16 +164,15 @@
The block and non-block options are used to change the behavior of
opening the device file.
-As default, ALSA behaves as defined in POSIX, i.e. blocks the file
-when it's busy until the device becomes free (unless O_NONBLOCK is
-specified). Some applications assume the non-block open behavior,
-which are actually implemented in some real OSS drivers.
+
+As default, ALSA behaves as original OSS drivers, i.e. does not block
+the file when it's busy. The -EBUSY error is returned in this case.
This blocking behavior can be changed globally via nonblock_open
-module option of snd-pcm-oss. For using the non-block mode as default
+module option of snd-pcm-oss. For using the blocking mode as default
for OSS devices, define like the following:
- options snd-pcm-oss nonblock_open=1
+ options snd-pcm-oss nonblock_open=0
The partial-frag and no-silence commands have been added recently.
Both commands are for optimization use only. The former command
diff -urN linux/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl
linux/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl
--- linux/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl
2004/11/15 11:49:13 1.16
+++ linux/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl
2005/01/13 14:05:16 1.17
@@ -397,12 +397,12 @@
#include <sound/core.h>
#include <sound/initval.h>
- // module parameters (see "Module Parameters")
+ /* module parameters (see "Module Parameters") */
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
- // definition of the chip-specific record
+ /* definition of the chip-specific record */
typedef struct snd_mychip mychip_t;
struct snd_mychip {
snd_card_t *card;
@@ -410,23 +410,26 @@
// "PCI Resource Managements"
};
- // chip-specific destructor
- // (see "PCI Resource Managements")
+ /* chip-specific destructor
+ * (see "PCI Resource Managements")
+ */
static int snd_mychip_free(mychip_t *chip)
{
- // will be implemented later...
+ .... // will be implemented later...
}
- // component-destructor
- // (see "Management of Cards and Components")
+ /* component-destructor
+ * (see "Management of Cards and Components")
+ */
static int snd_mychip_dev_free(snd_device_t *device)
{
mychip_t *chip = device->device_data;
return snd_mychip_free(chip);
}
- // chip-specific constructor
- // (see "Management of Cards and Components")
+ /* chip-specific constructor
+ * (see "Management of Cards and Components")
+ */
static int __devinit snd_mychip_create(snd_card_t *card,
struct pci_dev *pci,
mychip_t **rchip)
@@ -441,8 +444,9 @@
// check PCI availability here
// (see "PCI Resource Managements")
+ ....
- // allocate a chip-specific data with zero filled
+ /* allocate a chip-specific data with zero filled */
chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
if (chip == NULL)
return -ENOMEM;
@@ -451,17 +455,21 @@
// rest of initialization here; will be implemented
// later, see "PCI Resource Managements"
+ ....
if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
chip, &ops)) < 0) {
snd_mychip_free(chip);
return err;
}
+
+ snd_card_set_dev(card, &pci->dev);
+
*rchip = chip;
return 0;
}
- // constructor -- see "Constructor" sub-section
+ /* constructor -- see "Constructor" sub-section */
static int __devinit snd_mychip_probe(struct pci_dev *pci,
const struct pci_device_id *pci_id)
{
@@ -470,7 +478,7 @@
mychip_t *chip;
int err;
- // (1)
+ /* (1) */
if (dev >= SNDRV_CARDS)
return -ENODEV;
if (!enable[dev]) {
@@ -478,39 +486,39 @@
return -ENOENT;
}
- // (2)
+ /* (2) */
card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
if (card == NULL)
return -ENOMEM;
- // (3)
+ /* (3) */
if ((err = snd_mychip_create(card, pci, &chip)) < 0) {
snd_card_free(card);
return err;
}
- // (4)
+ /* (4) */
strcpy(card->driver, "My Chip");
strcpy(card->shortname, "My Own Chip 123");
sprintf(card->longname, "%s at 0x%lx irq %i",
card->shortname, chip->ioport, chip->irq);
- // (5)
- // implemented later
+ /* (5) */
+ .... // implemented later
- // (6)
+ /* (6) */
if ((err = snd_card_register(card)) < 0) {
snd_card_free(card);
return err;
}
- // (7)
+ /* (7) */
pci_set_drvdata(pci, card);
dev++;
return 0;
}
- // destructor -- see "Destructor" sub-section
+ /* destructor -- see "Destructor" sub-section */
static void __devexit snd_mychip_remove(struct pci_dev *pci)
{
snd_card_free(pci_get_drvdata(pci));
@@ -743,7 +751,7 @@
</programlisting>
</informalexample>
- where the last twos are necessary only when module options are
+ where the last one is necessary only when module options are
defined in the source file. If the codes are split to several
files, the file without module options don't need them.
</para>
@@ -1089,20 +1097,22 @@
static int snd_mychip_free(mychip_t *chip)
{
- // disable hardware here if any
- // (not implemented in this document)
+ /* disable hardware here if any */
+ .... // (not implemented in this document)
- // release the irq
+ /* release the irq */
if (chip->irq >= 0)
free_irq(chip->irq, (void *)chip);
- // release the i/o ports
+ /* release the i/o ports */
pci_release_regions(chip->pci);
- // release the data
+ /* disable the PCI entry */
+ pci_disable_device(chip->pci);
+ /* release the data */
kfree(chip);
return 0;
}
- // chip-specific constructor
+ /* chip-specific constructor */
static int __devinit snd_mychip_create(snd_card_t *card,
struct pci_dev *pci,
mychip_t **rchip)
@@ -1115,27 +1125,32 @@
*rchip = NULL;
- // check PCI availability (28bit DMA)
+ /* initialize the PCI entry */
if ((err = pci_enable_device(pci)) < 0)
return err;
+ /* check PCI availability (28bit DMA) */
if (pci_set_dma_mask(pci, 0x0fffffff) < 0 ||
pci_set_consistent_dma_mask(pci, 0x0fffffff) < 0) {
printk(KERN_ERR "error to set 28bit mask DMA\n");
+ pci_disable_device(pci);
return -ENXIO;
}
chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
- if (chip == NULL)
+ if (chip == NULL) {
+ pci_disable_device(pci);
return -ENOMEM;
+ }
- // initialize the stuff
+ /* initialize the stuff */
chip->card = card;
chip->pci = pci;
chip->irq = -1;
- // (1) PCI resource allocation
+ /* (1) PCI resource allocation */
if ((err = pci_request_regions(pci, "My Chip")) < 0) {
kfree(chip);
+ pci_disable_device(pci);
return err;
}
chip->port = pci_resource_start(pci, 0);
@@ -1148,19 +1163,22 @@
}
chip->irq = pci->irq;
- // (2) initialization of the chip hardware
- // (not implemented in this document)
+ /* (2) initialization of the chip hardware */
+ .... // (not implemented in this document)
if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
chip, &ops)) < 0) {
snd_mychip_free(chip);
return err;
}
+
+ snd_card_set_dev(card, &pci->dev);
+
*rchip = chip;
return 0;
}
- // PCI IDs
+ /* PCI IDs */
static struct pci_device_id snd_mychip_ids[] = {
{ PCI_VENDOR_ID_FOO, PCI_DEVICE_ID_BAR,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
@@ -1169,7 +1187,7 @@
};
MODULE_DEVICE_TABLE(pci, snd_mychip_ids);
- // pci_driver definition
+ /* pci_driver definition */
static struct pci_driver driver = {
.name = "My Own Chip",
.id_table = snd_mychip_ids,
@@ -1177,13 +1195,13 @@
.remove = __devexit_p(snd_mychip_remove),
};
- // initialization of the module
+ /* initialization of the module */
static int __init alsa_card_mychip_init(void)
{
return pci_module_init(&driver);
}
- // clean up the module
+ /* clean up the module */
static void __exit alsa_card_mychip_exit(void)
{
pci_unregister_driver(&driver);
@@ -1228,6 +1246,7 @@
if (pci_set_dma_mask(pci, 0x0fffffff) < 0 ||
pci_set_consistent_dma_mask(pci, 0x0fffffff) < 0) {
printk(KERN_ERR "error to set 28bit mask DMA\n");
+ pci_disable_device(pci);
return -ENXIO;
}
@@ -1285,6 +1304,7 @@
<![CDATA[
if ((err = pci_request_regions(pci, "My Chip")) < 0) {
kfree(chip);
+ pci_disable_device(pci);
return err;
}
chip->port = pci_resource_start(pci, 0);
@@ -1434,6 +1454,11 @@
</para>
<para>
+ Don't forget to call <function>pci_disable_device()</function>
+ before all finished.
+ </para>
+
+ <para>
And finally, release the chip-specific record.
<informalexample>
@@ -1462,7 +1487,7 @@
When the chip-data is assigned to the card using
<function>snd_device_new()</function> with
<constant>SNDRV_DEV_LOWLELVEL</constant> , its destructor is
- called at the last. that is, it is assured that all other
+ called at the last. That is, it is assured that all other
components like PCMs and controls have been already released.
You don't have to call stopping PCMs, etc. explicitly, but just
stop the hardware in the low-level.
@@ -1485,7 +1510,7 @@
</programlisting>
</informalexample>
- and the allocation would be (assuming its size is 512 bytes):
+ and the allocation would be like below:
<informalexample>
<programlisting>
@@ -1522,6 +1547,30 @@
</section>
+ <section id="pci-resource-device-struct">
+ <title>Registration of Device Struct</title>
+ <para>
+ At some point, typically after calling
<function>snd_device_new()</function>,
+ you need to register the <structname>struct device</structname> of the
chip
+ you're handling for udev and co. ALSA provides a macro for
compatibility with
+ older kernels. Simply call like the following:
+ <informalexample>
+ <programlisting>
+<![CDATA[
+ snd_card_set_dev(card, &pci->dev);
+]]>
+ </programlisting>
+ </informalexample>
+ so that it stores the PCI's device pointer to the card. This will be
+ referred by ALSA core functions later when the devices are registered.
+ </para>
+ <para>
+ In the case of non-PCI, pass the proper device struct pointer of the BUS
+ instead. (In the case of legacy ISA without PnP, you don't have to do
+ anything.)
+ </para>
+ </section>
+
<section id="pci-resource-entries">
<title>PCI Entries</title>
<para>
@@ -1801,8 +1850,9 @@
mychip_t *chip = snd_pcm_substream_chip(substream);
snd_pcm_runtime_t *runtime = substream->runtime;
- // set up the hardware with the current configuration
- // for example...
+ /* set up the hardware with the current configuration
+ * for example...
+ */
mychip_set_sample_format(chip, runtime->format);
mychip_set_sample_rate(chip, runtime->rate);
mychip_set_channels(chip, runtime->channels);
@@ -1835,7 +1885,7 @@
mychip_t *chip = snd_pcm_substream_chip(substream);
unsigned int current_ptr;
- // get the current hardware pointer
+ /* get the current hardware pointer */
current_ptr = mychip_get_hw_pointer(chip);
return current_ptr;
}
@@ -2068,18 +2118,19 @@
static void mychip_pcm_free(snd_pcm_t *pcm)
{
mychip_t *chip = snd_pcm_chip(pcm);
- // free your own data
+ /* free your own data */
kfree(chip->my_private_pcm_data);
- // do what you like else...
+ // do what you like else
+ ....
}
static int __devinit snd_mychip_new_pcm(mychip_t *chip)
{
snd_pcm_t *pcm;
....
- // allocate your own data
+ /* allocate your own data */
chip->my_private_pcm_data = kmalloc(...);
- // set the destructor
+ /* set the destructor */
pcm->private_data = chip;
pcm->private_free = mychip_pcm_free;
....
@@ -2231,7 +2282,7 @@
<![CDATA[
snd_pcm_runtime_t *runtime = substream->runtime;
...
- runtime->hw = snd_mychip_playback_hw; // common definition
+ runtime->hw = snd_mychip_playback_hw; /* common definition */
if (chip->model == VERY_OLD_ONE)
runtime->hw.channels_max = 1;
]]>
@@ -3030,7 +3081,7 @@
[%d lines skipped]
154diff -urN linux/Documentation/usb/sn9c102.txt
linux/Documentation/usb/sn9c102.txt
--- linux/Documentation/usb/sn9c102.txt 2004/11/15 11:49:13 1.5
+++ linux/Documentation/usb/sn9c102.txt 2005/01/13 14:05:16 1.6
@@ -11,16 +11,17 @@
1. Copyright
2. Disclaimer
3. License
-4. Overview
-5. Driver installation
+4. Overview and features
+5. Module dependencies
6. Module loading
7. Module parameters
8. Optional device control through "sysfs"
9. Supported devices
-10. How to add support for new image sensors
+10. How to add plug-in's for new image sensors
11. Notes for V4L2 application developers
-12. Contact information
-13. Credits
+12. Video frame formats
+13. Contact information
+14. Credits
1. Copyright
@@ -51,16 +52,18 @@
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-4. Overview
-===========
+4. Overview and features
+========================
This driver attempts to support the video and audio streaming capabilities of
-the devices mounting the SONiX SN9C101, SN9C102 and SN9C103 (or SUI-102) PC
-Camera Controllers.
+the devices mounting the SONiX SN9C101, SN9C102 and SN9C103 PC Camera
+Controllers.
It's worth to note that SONiX has never collaborated with the author during the
development of this project, despite several requests for enough detailed
specifications of the register tables, compression engine and video data format
-of the above chips.
+of the above chips. Nevertheless, these informations are no longer necessary,
+becouse all the aspects related to these chips are known and have been
+described in detail in this documentation.
The driver relies on the Video4Linux2 and USB core modules. It has been
designed to run properly on SMP systems as well.
@@ -79,15 +82,16 @@
pixel area of image sensor;
- image downscaling with arbitrary scaling factors from 1, 2 and 4 in both
directions (see "Notes for V4L2 application developers" paragraph);
-- two different video formats for uncompressed or compressed data (see also
- "Notes for V4L2 application developers" paragraph);
+- two different video formats for uncompressed or compressed data in low or
+ high compression quality (see also "Notes for V4L2 application developers"
+ and "Video frame formats" paragraphs);
- full support for the capabilities of many of the possible image sensors that
can be connected to the SN9C10x bridges, including, for istance, red, green,
blue and global gain adjustments and exposure (see "Supported devices"
paragraph for details);
- use of default color settings for sunlight conditions;
-- dynamic I/O interface for both SN9C10x and image sensor control (see
- "Optional device control through 'sysfs'" paragraph);
+- dynamic I/O interface for both SN9C10x and image sensor control and
+ monitoring (see "Optional device control through 'sysfs'" paragraph);
- dynamic driver control thanks to various module parameters (see "Module
parameters" paragraph);
- up to 64 cameras can be handled at the same time; they can be connected and
@@ -177,7 +181,7 @@
-------------------------------------------------------------------------------
-8. Optional device control through "sysfs"
+8. Optional device control through "sysfs" [1]
==========================================
It is possible to read and write both the SN9C10x and the image sensor
registers by using the "sysfs" filesystem interface.
@@ -195,9 +199,9 @@
SN9C10x bridge, while the other two control the sensor chip. "reg" and
"i2c_reg" hold the values of the current register index where the following
reading/writing operations are addressed at through "val" and "i2c_val". Their
-use is not intended for end-users, unless you know what you are doing. Note
-that "i2c_reg" and "i2c_val" won't be created if the sensor does not actually
-support the standard I2C protocol. Also, remember that you must be logged in as
+use is not intended for end-users. Note that "i2c_reg" and "i2c_val" won't be
+created if the sensor does not actually support the standard I2C protocol or
+its registers are not 8-bit long. Also, remember that you must be logged in as
root before writing to them.
As an example, suppose we were to want to read the value contained in the
@@ -216,7 +220,48 @@
[root@localhost #] echo 2 > val
Note that the SN9C10x always returns 0 when some of its registers are read.
-To avoid race conditions, all the I/O accesses to the files are serialized.
+To avoid race conditions, all the I/O accesses to the above files are
+serialized.
+
+The sysfs interface also provides the "frame_header" entry, which exports the
+frame header of the most recent requested and captured video frame. The header
+is 12-bytes long and is appended to every video frame by the SN9C10x
+controllers. As an example, this additional information can be used by the user
+application for implementing auto-exposure features via software.
+
+The following table describes the frame header:
+
+Byte # Value Description
+------ ----- -----------
+0x00 0xFF Frame synchronisation pattern.
+0x01 0xFF Frame synchronisation pattern.
+0x02 0x00 Frame synchronisation pattern.
+0x03 0xC4 Frame synchronisation pattern.
+0x04 0xC4 Frame synchronisation pattern.
+0x05 0x96 Frame synchronisation pattern.
+0x06 0x00 or 0x01 Unknown meaning. The exact value depends on the chip.
+0x07 0xXX Variable value, whose bits are ff00uzzc, where ff is a
+ frame counter, u is unknown, zz is a size indicator
+ (00 = VGA, 01 = SIF, 10 = QSIF) and c stands for
+ "compression enabled" (1 = yes, 0 = no).
+0x08 0xXX Brightness sum inside Auto-Exposure area (low-byte).
+0x09 0xXX Brightness sum inside Auto-Exposure area (high-byte).
+ For a pure white image, this number will be equal to 500
+ times the area of the specified AE area. For images
+ that are not pure white, the value scales down according
+ to relative whiteness.
+0x0A 0xXX Brightness sum outside Auto-Exposure area (low-byte).
+0x0B 0xXX Brightness sum outside Auto-Exposure area (high-byte).
+ For a pure white image, this number will be equal to 125
+ times the area outside of the specified AE area. For
+ images that are not pure white, the value scales down
+ according to relative whiteness.
+
+The AE area (sx, sy, ex, ey) in the active window can be set by programming the
+registers 0x1c, 0x1d, 0x1e and 0x1f of the SN9C10x controllers, where one unit
+corresponds to 32 pixels.
+
+[1] The frame header has been documented by Bertrik Sikken.
9. Supported devices
@@ -275,8 +320,10 @@
Model Manufacturer
----- ------------
-PAS106B PixArt Imaging Inc.
-PAS202BCB PixArt Imaging Inc.
+HV7131D Hynix Semiconductor, Inc.
+MI-0343 Micron Technology, Inc.
+PAS106B PixArt Imaging, Inc.
+PAS202BCB PixArt Imaging, Inc.
TAS5110C1B Taiwan Advanced Sensor Corporation
TAS5130D1B Taiwan Advanced Sensor Corporation
@@ -295,15 +342,15 @@
driver.
-10. How to add support for new image sensors
-============================================
-It should be easy to write code for new sensors by using the small API that I
-have created for this purpose, which is present in "sn9c102_sensor.h"
+10. How to add plug-in's for new image sensors
+==============================================
+It should be easy to write plug-in's for new sensors by using the small API
+that has been created for this purpose, which is present in "sn9c102_sensor.h"
(documentation is included there). As an example, have a look at the code in
"sn9c102_pas106b.c", which uses the mentioned interface.
-At the moment, possible unsupported image sensors are: HV7131x series (VGA),
-MI03x series (VGA), OV7620 (VGA), OV7630 (VGA), CIS-VF10 (VGA).
+At the moment, possible unsupported image sensors are: CIS-VF10 (VGA),
+OV7620 (VGA), OV7630 (VGA).
11. Notes for V4L2 application developers
@@ -332,29 +379,98 @@
This driver supports two different video formats: the first one is the "8-bit
Sequential Bayer" format and can be used to obtain uncompressed video data
from the device through the current I/O method, while the second one provides
-"raw" compressed video data (without the initial and final frame headers). The
-compression quality may vary from 0 to 1 and can be selected or queried thanks
-to the VIDIOC_S_JPEGCOMP and VIDIOC_G_JPEGCOMP V4L2 ioctl's. For maximum
-flexibility, the default active video format depends on how the image sensor
-being used is initialized (as described in the documentation of the API for the
-image sensors supplied by this driver).
+"raw" compressed video data (without frame headers not related to the
+compressed data). The compression quality may vary from 0 to 1 and can be
+selected or queried thanks to the VIDIOC_S_JPEGCOMP and VIDIOC_G_JPEGCOMP V4L2
+ioctl's. For maximum flexibility, both the default active video format and the
+default compression quality depend on how the image sensor being used is
+initialized (as described in the documentation of the API for the image sensors
+supplied by this driver).
-12. Contact information
+12. Video frame formats [1]
=======================
-I may be contacted by e-mail at <luca.risolia@studio.unibo.it>.
+The SN9C10x PC Camera Controllers can send images in two possible video
+formats over the USB: either native "Sequential RGB Bayer" or Huffman
+compressed. The latter is used to achieve high frame rates. The current video
+format may be selected or queried from the user application by calling the
+VIDIOC_S_FMT or VIDIOC_G_FMT ioctl's, as described in the V4L2 API
+specifications.
+
+The name "Sequential Bayer" indicates the organization of the red, green and
+blue pixels in one video frame. Each pixel is associated with a 8-bit long
+value and is disposed in memory according to the pattern shown below:
+
+B[0] G[1] B[2] G[3] ... B[m-2] G[m-1]
+G[m] R[m+1] G[m+2] R[m+2] ... G[2m-2] R[2m-1]
+...
+... B[(n-1)(m-2)] G[(n-1)(m-1)]
+... G[n(m-2)] R[n(m-1)]
+
+The above matrix also represents the sequential or progressive read-out mode of
+the (n, m) Bayer color filter array used in many CCD/CMOS image sensors.
+
+One compressed video frame consists of a bitstream that encodes for every R, G,
+or B pixel the difference between the value of the pixel itself and some
+reference pixel value. Pixels are organised in the Bayer pattern and the Bayer
+sub-pixels are tracked individually and alternatingly. For example, in the
+first line values for the B and G1 pixels are alternatingly encoded, while in
+the second line values for the G2 and R pixels are alternatingly encoded.
+
+The pixel reference value is calculated as follows:
+- the 4 top left pixels are encoded in raw uncompressed 8-bit format;
+- the value in the top two rows is the value of the pixel left of the current
+ pixel;
+- the value in the left column is the value of the pixel above the current
+ pixel;
+- for all other pixels, the reference value is the average of the value of the
+ pixel on the left and the value of the pixel above the current pixel;
+- there is one code in the bitstream that specifies the value of a pixel
+ directly (in 4-bit resolution);
+- pixel values need to be clamped inside the range [0..255] for proper
+ decoding.
+
+The algorithm purely describes the conversion from compressed Bayer code used
+in the SN9C10x chips to uncompressed Bayer. Additional steps are required to
+convert this to a color image (i.e. a color interpolation algorithm).
+
+The following Huffman codes have been found:
+0: +0 (relative to reference pixel value)
+100: +4
+101: -4?
+1110xxxx: set absolute value to xxxx.0000
+1101: +11
+1111: -11
+11001: +20
+110000: -20
+110001: ??? - these codes are apparently not used
-I can accept GPG/PGP encrypted e-mail. My GPG key ID is 'FCE635A4'.
-My public 1024-bit key should be available at any keyserver; the fingerprint
-is: '88E8 F32F 7244 68BA 3958 5D40 99DA 5D2A FCE6 35A4'.
+[1] The Huffman compression algorithm has been reverse-engineered and
+ documented by Bertrik Sikken.
+
+
+13. Contact information
+=======================
+The author may be contacted by e-mail at <luca.risolia@studio.unibo.it>.
+GPG/PGP encrypted e-mail's are accepted. The GPG key ID of the author is
+'FCE635A4'; the public 1024-bit key should be available at any keyserver;
+the fingerprint is: '88E8 F32F 7244 68BA 3958 5D40 99DA 5D2A FCE6 35A4'.
-13. Credits
+
+14. Credits
===========
-I would thank the following persons:
+Many thanks to following persons for their contribute (listed in alphabetical
+order):
-- Stefano Mozzi, who donated 45 EU;
- Luca Capello for the donation of a webcam;
-- Mizuno Takafumi for the donation of a webcam;
+- Joao Rodrigo Fuzaro, Joao Limirio, Claudio Filho and Caio Begotti for the
+ donation of a webcam;
- Carlos Eduardo Medaglia Dyonisio, who added the support for the PAS202BCB
- image sensor.
+ image sensor;
+- Stefano Mozzi, who donated 45 EU;
+- Bertrik Sikken, who reverse-engineered and documented the Huffman compression
+ algorithm used in the SN9C10x controllers and implemented the first decoder;
+- Mizuno Takafumi for the donation of a webcam;
+- An "anonymous" donator (who didn't want his name to be revealed) for the
+ donation of a webcam.
diff -urN linux/Documentation/vm/hugetlbpage.txt
linux/Documentation/vm/hugetlbpage.txt
--- linux/Documentation/vm/hugetlbpage.txt 2004/06/06 02:12:33 1.9
+++ linux/Documentation/vm/hugetlbpage.txt 2005/01/13 14:05:16 1.10
@@ -1,14 +1,14 @@
The intent of this file is to give a brief summary of hugetlbpage support in
the Linux kernel. This support is built on top of multiple page size support
-that is provided by most of modern architectures. For example, IA-32
+that is provided by most modern architectures. For example, IA-32
architecture supports 4K and 4M (2M in PAE mode) page sizes, IA-64
architecture supports multiple page sizes 4K, 8K, 64K, 256K, 1M, 4M, 16M,
-256M. A TLB is a cache of virtual-to-physical translations. Typically this
-is a very scarce resource on processor. Operating systems try to make best
-use of limited number of TLB resources. This optimization is more critical
-now as bigger and bigger physical memories (several GBs) are more readily
-available.
+256M and ppc64 supports 4K and 16M. A TLB is a cache of virtual-to-physical
+translations. Typically this is a very scarce resource on processor.
+Operating systems try to make best use of limited number of TLB resources.
+This optimization is more critical now as bigger and bigger physical memories
+(several GBs) are more readily available.
Users can use the huge page support in Linux kernel by either using the mmap
system call or standard SYSv shared memory system calls (shmget, shmat).
@@ -98,125 +98,187 @@
applications to use any combination of mmaps and shm* calls. Though the
mount of filesystem will be required for using mmaps.
-/* Example of using hugepage in user application using Sys V shared memory
- * system calls. In this example, app is requesting memory of size 256MB that
- * is backed by huge pages. Application uses the flag SHM_HUGETLB in shmget
- * system call to informt the kernel that it is requesting hugepages. For
- * IA-64 architecture, Linux kernel reserves Region number 4 for hugepages.
- * That means the addresses starting with 0x800000....will need to be
- * specified.
+*******************************************************************
+
+/*
+ * Example of using hugepage memory in a user application using Sys V shared
+ * memory system calls. In this example the app is requesting 256MB of
+ * memory that is backed by huge pages. The application uses the flag
+ * SHM_HUGETLB in the shmget system call to inform the kernel that it is
+ * requesting hugepages.
+ *
+ * For the IA-64 architecture, the Linux kernel reserves Region number 4 for
+ * hugepages. That means the addresses starting with 0x800000... will need
+ * to be specified. Specifying a fixed address is not required on ppc64,
+ * i386 or amd64.
+ *
+ * Note: The default shared memory limit is quite low on many kernels,
+ * you may need to increase it via:
+ *
+ * echo 268435456 > /proc/sys/kernel/shmmax
+ *
+ * This will increase the maximum size per shared memory segment to 256MB.
+ * The other limit that you will hit eventually is shmall which is the
+ * total amount of shared memory in pages. To set it to 16GB on a system
+ * with a 4kB pagesize do:
+ *
+ * echo 4194304 > /proc/sys/kernel/shmall
*/
+#include <stdlib.h>
+#include <stdio.h>
#include <sys/types.h>
+#include <sys/ipc.h>
#include <sys/shm.h>
-#include <sys/types.h>
#include <sys/mman.h>
-#include <errno.h>
-extern int errno;
+#ifndef SHM_HUGETLB
#define SHM_HUGETLB 04000
-#define LPAGE_SIZE (256UL*1024UL*1024UL)
-#define dprintf(x) printf(x)
-#define ADDR (0x8000000000000000UL)
-main()
+#endif
+
+#define LENGTH (256UL*1024*1024)
+
+#define dprintf(x) printf(x)
+
+/* Only IA64 requires this */
+#ifdef IA64
+#define ADDR (void *)(0x8000000000000000UL)
+#define SHMAT_FLAGS (SHM_RND)
+#else
+#define ADDR (void *)(0x0UL)
+#define SHMAT_FLAGS (0)
+#endif
+
+int main(void)
{
- int shmid;
- int i, j, k;
- volatile char *shmaddr;
-
- if ((shmid =shmget(2, LPAGE_SIZE, SHM_HUGETLB|IPC_CREAT|SHM_R|SHM_W ))
-< 0) {
- perror("Failure:");
- exit(1);
- }
- printf("shmid: 0x%x\n", shmid);
- shmaddr = shmat(shmid, (void *)ADDR, SHM_RND) ;
- if (errno != 0) {
- perror("Shared Memory Attach Failure:");
- exit(2);
- }
- printf("shmaddr: %p\n", shmaddr);
-
- dprintf("Starting the writes:\n");
- for (i=0;i<LPAGE_SIZE;i++) {
- shmaddr[i] = (char) (i);
- if (!(i%(1024*1024))) dprintf(".");
- }
- dprintf("\n");
- dprintf("Starting the Check...");
- for (i=0; i<LPAGE_SIZE;i++)
- if (shmaddr[i] != (char)i)
- printf("\nIndex %d mismatched.");
- dprintf("Done.\n");
- if (shmdt((const void *)shmaddr) != 0) {
- perror("Detached Failure:");
- exit (3);
- }
+ int shmid;
+ unsigned long i;
+ char *shmaddr;
+
+ if ((shmid = shmget(2, LENGTH,
+ SHM_HUGETLB | IPC_CREAT | SHM_R | SHM_W)) < 0) {
+ perror("shmget");
+ exit(1);
+ }
+ printf("shmid: 0x%x\n", shmid);
+
+ shmaddr = shmat(shmid, ADDR, SHMAT_FLAGS);
+ if (shmaddr == (char *)-1) {
+ perror("Shared memory attach failure");
+ shmctl(shmid, IPC_RMID, NULL);
+ exit(2);
+ }
+ printf("shmaddr: %p\n", shmaddr);
+
+ dprintf("Starting the writes:\n");
+ for (i = 0; i < LENGTH; i++) {
+ shmaddr[i] = (char)(i);
+ if (!(i % (1024 * 1024)))
+ dprintf(".");
+ }
+ dprintf("\n");
+
+ dprintf("Starting the Check...");
+ for (i = 0; i < LENGTH; i++)
+ if (shmaddr[i] != (char)i)
+ printf("\nIndex %lu mismatched\n", i);
+ dprintf("Done.\n");
+
+ if (shmdt((const void *)shmaddr) != 0) {
+ perror("Detach failure");
+ shmctl(shmid, IPC_RMID, NULL);
+ exit(3);
+ }
+
+ shmctl(shmid, IPC_RMID, NULL);
+
+ return 0;
}
-*******************************************************************
-*******************************************************************
+*******************************************************************
-/* Example of using hugepage in user application using mmap
- * system call. Before running this application, make sure that
- * administrator has mounted the hugetlbfs (on some directory like /mnt) using
- * the command mount -t hugetlbfs nodev /mnt
- * In this example, app is requesting memory of size 256MB that
- * is backed by huge pages. Application uses the flag SHM_HUGETLB in shmget
- * system call to informt the kernel that it is requesting hugepages. For
- * IA-64 architecture, Linux kernel reserves Region number 4 for hugepages.
- * That means the addresses starting with 0x800000....will need to be
- * specified.
+/*
+ * Example of using hugepage memory in a user application using the mmap
+ * system call. Before running this application, make sure that the
+ * administrator has mounted the hugetlbfs filesystem (on some directory
+ * like /mnt) using the command mount -t hugetlbfs nodev /mnt. In this
+ * example, the app is requesting memory of size 256MB that is backed by
+ * huge pages.
+ *
+ * For IA-64 architecture, Linux kernel reserves Region number 4 for hugepages.
+ * That means the addresses starting with 0x800000... will need to be
+ * specified. Specifying a fixed address is not required on ppc64, i386
+ * or amd64.
*/
-#include <unistd.h>
+#include <stdlib.h>
#include <stdio.h>
+#include <unistd.h>
#include <sys/mman.h>
#include <fcntl.h>
-#include <errno.h>
#define FILE_NAME "/mnt/hugepagefile"
-#define LENGTH (256*1024*1024)
+#define LENGTH (256UL*1024*1024)
#define PROTECTION (PROT_READ | PROT_WRITE)
-#define FLAGS MAP_SHARED |MAP_FIXED
-#define ADDRESS (char *)(0x60000000UL + 0x8000000000000000UL)
-extern errno;
+/* Only IA64 requires this */
+#ifdef IA64
+#define ADDR (void *)(0x8000000000000000UL)
+#define FLAGS (MAP_SHARED | MAP_FIXED)
+#else
+#define ADDR (void *)(0x0UL)
+#define FLAGS (MAP_SHARED)
+#endif
-check_bytes(char *addr)
+void check_bytes(char *addr)
{
- printf("First hex is %x\n", *((unsigned int *)addr));
+ printf("First hex is %x\n", *((unsigned int *)addr));
}
-write_bytes(char *addr)
+void write_bytes(char *addr)
{
- int i;
- for (i=0;i<LENGTH;i++)
- *(addr+i)=(char)i;
+ unsigned long i;
+
+ for (i = 0; i < LENGTH; i++)
+ *(addr + i) = (char)i;
}
-read_bytes(char *addr)
+
+void read_bytes(char *addr)
{
- int i;
- check_bytes(addr);
- for (i=0;i<LENGTH;i++)
- if (*(addr+i)!=(char)i) {
- printf("Mismatch at %d\n", i);
- break;
- }
+ unsigned long i;
+
+ check_bytes(addr);
+ for (i = 0; i < LENGTH; i++)
+ if (*(addr + i) != (char)i) {
+ printf("Mismatch at %lu\n", i);
+ break;
+ }
}
-main()
+
+int main(void)
{
- unsigned long addr = 0;
- int fd ;
+ void *addr;
+ int fd;
+
+ fd = open(FILE_NAME, O_CREAT | O_RDWR, 0755);
+ if (fd < 0) {
+ perror("Open failed");
+ exit(1);
+ }
+
+ addr = mmap(ADDR, LENGTH, PROTECTION, FLAGS, fd, 0);
+ if (addr == MAP_FAILED) {
+ perror("mmap");
+ unlink(FILE_NAME);
+ exit(1);
+ }
+
+ printf("Returned address is %p\n", addr);
+ check_bytes(addr);
+ write_bytes(addr);
+ read_bytes(addr);
+
+ munmap(addr, LENGTH);
+ close(fd);
+ unlink(FILE_NAME);
- fd = open(FILE_NAME, O_CREAT|O_RDWR, 0755);
- if (fd < 0) {
- perror("Open failed");
- exit(errno);
- }
- addr = (unsigned long)mmap(ADDRESS, LENGTH, PROTECTION, FLAGS, fd, 0);
- if (errno != 0)
- perror("mmap failed");
- printf("Returned address is %p\n", addr);
- check_bytes((char*)addr);
- write_bytes((char*)addr);
- read_bytes((char *)addr);
+ return 0;
}
diff -urN linux/Documentation/vm/numa linux/Documentation/vm/numa
--- linux/Documentation/vm/numa 2000/08/08 18:28:31 1.3
+++ linux/Documentation/vm/numa 2005/01/13 14:05:16 1.4
@@ -29,7 +29,7 @@
into a pg_data_t. The bootmem_data_t is just one part of this. To
make the code look uniform between NUMA and regular UMA platforms,
UMA platforms have a statically allocated pg_data_t too (contig_page_data).
-For the sake of uniformity, the variable "numnodes" is also defined
+For the sake of uniformity, the function num_online_nodes() is also defined
for all platforms. As we run benchmarks, we might decide to NUMAize
more variables like low_on_memory, nr_free_pages etc into the pg_data_t.
diff -urN linux/Documentation/w1/w1.generic linux/Documentation/w1/w1.generic
--- linux/Documentation/w1/w1.generic 1970/01/01 00:00:00
+++ linux/Documentation/w1/w1.generic Thu Jan 13 14:05:16 2005 1.1
@@ -0,0 +1,19 @@
+Any w1 device must be connected to w1 bus master device - for example
+ds9490 usb device or w1-over-GPIO or RS232 converter.
+Driver for w1 bus master must provide several functions(you can find
+them in struct w1_bus_master definition in w1.h) which then will be
+called by w1 core to send various commands over w1 bus(by default it is
+reset and search commands). When some device is found on the bus, w1 core
+checks if driver for it's family is loaded.
+If driver is loaded w1 core creates new w1_slave object and registers it
+in the system(creates some generic sysfs files(struct w1_family_ops in
+w1_family.h), notifies any registered listener and so on...).
+It is device driver's business to provide any communication method
+upstream.
+For example w1_therm driver(ds18?20 thermal sensor family driver)
+provides temperature reading function which is bound to ->rbin() method
+of the above w1_family_ops structure.
+w1_smem - driver for simple 64bit memory cell provides ID reading
+method.
+
+You can call above methods by reading appropriate sysfs files.
diff -urN linux/Documentation/x86_64/boot-options.txt
linux/Documentation/x86_64/boot-options.txt
--- linux/Documentation/x86_64/boot-options.txt 2004/10/25 20:44:09 1.7
+++ linux/Documentation/x86_64/boot-options.txt 2005/01/13 14:05:16 1.8
@@ -14,8 +14,6 @@
APICs
apic Use IO-APIC. Default
- Unless you have an NVidia or VIA/Uniprocessor board.
- Then it defaults to off.
noapic Don't use the IO-APIC.
@@ -25,6 +23,8 @@
pirq=... See Documentation/i386/IO-APIC.txt
+ noapictimer Don't set up the APIC timer
+
Early Console
syntax: earlyprintk=vga
@@ -61,6 +61,9 @@
This is useful when you use a panic=... timeout and need the box
quickly up again.
+ nohpet
+ Don't use the HPET timer.
+
Idle loop
idle=poll
@@ -74,7 +77,7 @@
reboot=b[ios] | t[riple] | k[bd] [, [w]arm | [c]old]
bios Use the CPU reboto vector for warm reset
warm Don't set the cold reboot flag
- cold Set the cold reboto flag
+ cold Set the cold reboot flag
triple Force a triple fault (init)
kbd Use the keyboard controller. cold reset (default)
@@ -83,6 +86,11 @@
Disadvantage is that not all hardware will be completely reinitialized
on reboot so there may be boot problems on some systems.
+ reboot=force
+
+ Don't stop other CPUs on reboot. This can make reboot more reliable
+ in some cases.
+
Non Executable Mappings
noexec=on|off
@@ -102,6 +110,9 @@
numa=off Only set up a single NUMA node spanning all memory.
+ numa=noacpi Don't parse the SRAT table for NUMA setup
+
+ numa=fake=X Fake X nodes and ignore NUMA setup of the actual machine.
ACPI
@@ -110,6 +121,12 @@
interpreter
acpi=force Force ACPI on (currently not needed)
+ acpi=strict Disable out of spec ACPI workarounds.
+
+ acpi_sci={edge,level,high,low} Set up ACPI SCI interrupt.
+
+ acpi=noirq Don't route interrupts
+
PCI
pci=off Don't use PCI
@@ -119,6 +136,7 @@
pci=assign-busses Assign busses
pci=irqmask=MASK Set PCI interrupt mask to MASK
pci=lastbus=NUMBER Scan upto NUMBER busses, no matter what the
mptable says.
+ pci=noacpi Don't use ACPI to set up PCI interrupt routing.
IOMMU
@@ -144,3 +162,19 @@
pages Prereserve that many 128K pages for the software IO bounce buffering.
force Force all IO through the software TLB.
+
+Debugging
+
+ oops=panic Always panic on oopses. Default is to just kill the process,
+ but there is a small probability of deadlocking the machine.
+ This will also cause panics on machine check exceptions.
+ Useful together with panic=30 to trigger a reboot.
+
+ kstack=N Print that many words from the kernel stack in oops dumps.
+
+Misc
+
+ noreplacement Don't replace instructions with more appropiate ones
+ for the CPU. This may be useful on asymmetric
MP systems
+ where some CPU have less capabilities than the
others.
+
diff -urN linux/Documentation/x86_64/mm.txt linux/Documentation/x86_64/mm.txt
--- linux/Documentation/x86_64/mm.txt 2002/07/22 07:23:35 1.1
+++ linux/Documentation/x86_64/mm.txt 2005/01/13 14:05:16 1.2
@@ -1,148 +1,24 @@
-The paging design used on the x86-64 linux kernel port in 2.4.x provides:
-o per process virtual address space limit of 512 Gigabytes
-o top of userspace stack located at address 0x0000007fffffffff
-o PAGE_OFFSET = 0xffff800000000000
-o start of the kernel = 0xffffffff800000000
-o global RAM per system 2^64-PAGE_OFFSET-sizeof(kernel) = 128 Terabytes -
2 Gigabytes
-o no need of any common code change
-o no need to use highmem to handle the 128 Terabytes of RAM
-
-Description:
-
- Userspace is able to modify and it sees only the 3rd/2nd/1st level
- pagetables (pgd_offset() implicitly walks the 1st slot of the 4th
- level pagetable and it returns an entry into the 3rd level pagetable).
- This is where the per-process 512 Gigabytes limit cames from.
-
- The common code pgd is the PDPE, the pmd is the PDE, the
- pte is the PTE. The PML4E remains invisible to the common
- code.
-
- The kernel uses all the first 47 bits of the negative half
- of the virtual address space to build the direct mapping using
- 2 Mbytes page size. The kernel virtual addresses have bit number
- 47 always set to 1 (and in turn also bits 48-63 are set to 1 too,
- due the sign extension). This is where the 128 Terabytes - 2 Gigabytes
global
- limit of RAM cames from.
-
- Since the per-process limit is 512 Gigabytes (due to kernel common
- code 3 level pagetable limitation), the higher virtual address mapped
- into userspace is 0x7fffffffff and it makes sense to use it
- as the top of the userspace stack to allow the stack to grow as
- much as possible.
-
- Setting the PAGE_OFFSET to 2^39 (after the last userspace
- virtual address) wouldn't make much difference compared to
- setting PAGE_OFFSET to 0xffff800000000000 because we have an
- hole into the virtual address space. The last byte mapped by the
- 255th slot in the 4th level pagetable is at virtual address
- 0x00007fffffffffff and the first byte mapped by the 256th slot in the
- 4th level pagetable is at address 0xffff800000000000. Due to this
- hole we can't trivially build a direct mapping across all the
- 512 slots of the 4th level pagetable, so we simply use only the
- second (negative) half of the 4th level pagetable for that purpose
- (that provides us 128 Terabytes of contigous virtual addresses).
- Strictly speaking we could build a direct mapping also across the hole
- using some DISCONTIGMEM trick, but we don't need such a large
- direct mapping right now.
-
-Future:
-
- During 2.5.x we can break the 512 Gigabytes per-process limit
- possibly by removing from the common code any knowledge about the
- architectural dependent physical layout of the virtual to physical
- mapping.
-
- Once the 512 Gigabytes limit will be removed the kernel stack will
- be moved (most probably to virtual address 0x00007fffffffffff).
- Nothing will break in userspace due that move, as nothing breaks
- in IA32 compiling the kernel with CONFIG_2G.
-
-Linus agreed on not breaking common code and to live with the 512 Gigabytes
-per-process limitation for the 2.4.x timeframe and he has given me and Andi
-some very useful hints... (thanks! :)
-
-Thanks also to H. Peter Anvin for his interesting and useful suggestions on
-the x86-64-discuss lists!
-
-Other memory management related issues follows:
-
-PAGE_SIZE:
-
- If somebody is wondering why these days we still have a so small
- 4k pagesize (16 or 32 kbytes would be much better for performance
- of course), the PAGE_SIZE have to remain 4k for 32bit apps to
- provide 100% backwards compatible IA32 API (we can't allow silent
- fs corruption or as best a loss of coherency with the page cache
- by allocating MAP_SHARED areas in MAP_ANONYMOUS memory with a
- do_mmap_fake). I think it could be possible to have a dynamic page
- size between 32bit and 64bit apps but it would need extremely
- intrusive changes in the common code as first for page cache and
- we sure don't want to depend on them right now even if the
- hardware would support that.
-
-PAGETABLE SIZE:
-
- In turn we can't afford to have pagetables larger than 4k because
- we could not be able to allocate them due physical memory
- fragmentation, and failing to allocate the kernel stack is a minor
- issue compared to failing the allocation of a pagetable. If we
- fail the allocation of a pagetable the only thing we can do is to
- sched_yield polling the freelist (deadlock prone) or to segfault
- the task (not even the sighandler would be sure to run).
-
-KERNEL STACK:
-
- 1st stage:
-
- The kernel stack will be at first allocated with an order 2 allocation
- (16k) (the utilization of the stack for a 64bit platform really
- isn't exactly the double of a 32bit platform because the local
- variables may not be all 64bit wide, but not much less). This will
- make things even worse than they are right now on IA32 with
- respect of failing fork/clone due memory fragmentation.
-
- 2nd stage:
-
- We'll benchmark if reserving one register as task_struct
- pointer will improve performance of the kernel (instead of
- recalculating the task_struct pointer starting from the stack
- pointer each time). My guess is that recalculating will be faster
- but it worth a try.
-
- If reserving one register for the task_struct pointer
- will be faster we can as well split task_struct and kernel
- stack. task_struct can be a slab allocation or a
- PAGE_SIZEd allocation, and the kernel stack can then be
- allocated in a order 1 allocation. Really this is risky,
- since 8k on a 64bit platform is going to be less than 7k
- on a 32bit platform but we could try it out. This would
- reduce the fragmentation problem of an order of magnitude
- making it equal to the current IA32.
-
- We must also consider the x86-64 seems to provide in hardware a
- per-irq stack that could allow us to remove the irq handler
- footprint from the regular per-process-stack, so it could allow
- us to live with a smaller kernel stack compared to the other
- linux architectures.
-
- 3rd stage:
-
- Before going into production if we still have the order 2
- allocation we can add a sysctl that allows the kernel stack to be
- allocated with vmalloc during memory fragmentation. This have to
- remain turned off during benchmarks :) but it should be ok in real
- life.
-
-Order of PAGE_CACHE_SIZE and other allocations:
-
- On the long run we can increase the PAGE_CACHE_SIZE to be
- an order 2 allocations and also the slab/buffercache etc.ec..
- could be all done with order 2 allocations. To make the above
- to work we should change lots of common code thus it can be done
- only once the basic port will be in a production state. Having
- a working PAGE_CACHE_SIZE would be a benefit also for
- IA32 and other architectures of course.
+<previous description obsolete, deleted>
-Andrea <andrea@suse.de> SuSE
+Virtual memory map with 4 level page tables:
+
+0000000000000000 - 00007fffffffffff (=47bits) user space, different per mm
+hole caused by [48:63] sign extension
+ffff800000000000 - ffff80ffffffffff (=40bits) guard hole
+ffff810000000000 - ffffc0ffffffffff (=46bits) direct mapping of phys. memory
+ffffc10000000000 - ffffc1ffffffffff (=40bits) hole
+ffffc20000000000 - ffffe1ffffffffff (=45bits) vmalloc/ioremap space
+... unused hole ...
+ffffffff80000000 - ffffffff82800000 (=40MB) kernel text mapping, from phys 0
+... unused hole ...
+ffffffff88000000 - fffffffffff00000 (=1919MB) module mapping space
+
+vmalloc space is lazily synchronized into the different PML4 pages of
+the processes using the page fault handler, with init_level4_pgt as
+reference.
+
+Current X86-64 implementations only support 40 bit of address space,
+but we support upto 46bits. This expands into MBZ space in the page tables.
+
+-Andi Kleen, Jul 2004
diff -urN linux/arch/alpha/Kconfig linux/arch/alpha/Kconfig
--- linux/arch/alpha/Kconfig 2004/10/12 01:45:39 1.29
+++ linux/arch/alpha/Kconfig 2005/01/13 14:05:17 1.30
@@ -28,6 +28,10 @@
bool
default y
+config GENERIC_CALIBRATE_DELAY
+ bool
+ default y
+
config GENERIC_ISA_DMA
bool
default y
@@ -485,7 +489,7 @@
singleprocessor machines. On a singleprocessor machine, the kernel
will run faster if you say N here.
- See also the <file:Documentation/smp.tex>, and the SMP-HOWTO
+ See also the <file:Documentation/smp.txt>, and the SMP-HOWTO
available at <http://www.tldp.org/docs.html#howto>.
If you don't know what to do here, say N.
diff -urN linux/arch/alpha/defconfig linux/arch/alpha/defconfig
--- linux/arch/alpha/defconfig 2004/10/12 01:45:39 1.45
+++ linux/arch/alpha/defconfig 2005/01/13 14:05:17 1.46
@@ -411,7 +411,6 @@
# CONFIG_IP_NF_TARGET_REDIRECT is not set
# CONFIG_IP_NF_TARGET_NETMAP is not set
# CONFIG_IP_NF_TARGET_SAME is not set
-# CONFIG_IP_NF_NAT_LOCAL is not set
# CONFIG_IP_NF_NAT_SNMP_BASIC is not set
CONFIG_IP_NF_NAT_IRC=m
CONFIG_IP_NF_NAT_FTP=m
diff -urN linux/arch/alpha/kernel/core_marvel.c
linux/arch/alpha/kernel/core_marvel.c
--- linux/arch/alpha/kernel/core_marvel.c 2004/10/12 01:45:39 1.14
+++ linux/arch/alpha/kernel/core_marvel.c 2005/01/13 14:05:17 1.15
@@ -118,7 +118,7 @@
io7 = alloc_bootmem(sizeof(*io7));
io7->pe = pe;
- io7->irq_lock = SPIN_LOCK_UNLOCKED;
+ spin_lock_init(&io7->irq_lock);
for (h = 0; h < 4; h++) {
io7->ports[h].io7 = io7;
diff -urN linux/arch/alpha/kernel/proto.h linux/arch/alpha/kernel/proto.h
--- linux/arch/alpha/kernel/proto.h 2004/03/11 16:46:40 1.27
+++ linux/arch/alpha/kernel/proto.h 2005/01/13 14:05:17 1.28
@@ -167,9 +167,6 @@
extern void entUna(void);
extern void entDbg(void);
-/* process.c */
-extern void cpu_idle(void) __attribute__((noreturn));
-
/* ptrace.c */
extern int ptrace_set_bpt (struct task_struct *child);
extern int ptrace_cancel_bpt (struct task_struct *child);
diff -urN linux/arch/alpha/kernel/srmcons.c linux/arch/alpha/kernel/srmcons.c
--- linux/arch/alpha/kernel/srmcons.c 2004/10/25 20:44:09 1.7
+++ linux/arch/alpha/kernel/srmcons.c 2005/01/13 14:05:17 1.8
@@ -179,7 +179,7 @@
}
srmconsp->tty = NULL;
- srmconsp->lock = SPIN_LOCK_UNLOCKED;
+ spin_lock_init(&srmconsp->lock);
init_timer(&srmconsp->timer);
*ps = srmconsp;
diff -urN linux/arch/alpha/mm/init.c linux/arch/alpha/mm/init.c
--- linux/arch/alpha/mm/init.c 2004/06/26 15:15:07 1.38
+++ linux/arch/alpha/mm/init.c 2005/01/13 14:05:17 1.39
@@ -42,10 +42,9 @@
{
pgd_t *ret, *init;
- ret = (pgd_t *)__get_free_page(GFP_KERNEL);
+ ret = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
init = pgd_offset(&init_mm, 0UL);
if (ret) {
- clear_page(ret);
#ifdef CONFIG_ALPHA_LARGE_VMALLOC
memcpy (ret + USER_PTRS_PER_PGD, init + USER_PTRS_PER_PGD,
(PTRS_PER_PGD - USER_PTRS_PER_PGD - 1)*sizeof(pgd_t));
@@ -63,9 +62,7 @@
pte_t *
pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
{
- pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT);
- if (pte)
- clear_page(pte);
+ pte_t *pte = (pte_t
*)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
return pte;
}
diff -urN linux/arch/alpha/mm/numa.c linux/arch/alpha/mm/numa.c
--- linux/arch/alpha/mm/numa.c 2004/09/19 12:30:01 1.17
+++ linux/arch/alpha/mm/numa.c 2005/01/13 14:05:17 1.18
@@ -246,7 +246,7 @@
reserve_bootmem_node(NODE_DATA(nid), PFN_PHYS(bootmap_start),
bootmap_size);
printk(" reserving pages %ld:%ld\n", bootmap_start,
bootmap_start+PFN_UP(bootmap_size));
- numnodes++;
+ node_set_online(nid);
}
void __init
@@ -256,7 +256,7 @@
show_mem_layout();
- numnodes = 0;
+ nodes_clear(node_online_map);
min_low_pfn = ~0UL;
max_low_pfn = 0UL;
@@ -303,7 +303,7 @@
*/
dma_local_pfn = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT;
- for (nid = 0; nid < numnodes; nid++) {
+ for_each_online_node(nid) {
unsigned long start_pfn = node_bdata[nid].node_boot_start >>
PAGE_SHIFT;
unsigned long end_pfn = node_bdata[nid].node_low_pfn;
@@ -332,7 +332,7 @@
high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
reservedpages = 0;
- for (nid = 0; nid < numnodes; nid++) {
+ for_each_online_node(nid) {
/*
* This will free up the bootmem, ie, slot 0 memory
*/
@@ -372,7 +372,7 @@
printk("\nMem-info:\n");
show_free_areas();
printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10));
- for (nid = 0; nid < numnodes; nid++) {
+ for_each_online_node(nid) {
struct page * lmem_map = node_mem_map(nid);
i = node_spanned_pages(nid);
while (i-- > 0) {
diff -urN linux/arch/alpha/oprofile/common.c linux/arch/alpha/oprofile/common.c
--- linux/arch/alpha/oprofile/common.c 2004/02/19 03:06:21 1.5
+++ linux/arch/alpha/oprofile/common.c 2005/01/13 14:05:17 1.6
@@ -138,17 +138,8 @@
return 0;
}
-static struct oprofile_operations oprof_axp_ops = {
- .create_files = op_axp_create_files,
- .setup = op_axp_setup,
- .shutdown = op_axp_shutdown,
- .start = op_axp_start,
- .stop = op_axp_stop,
- .cpu_type = NULL /* To be filled in below. */
-};
-
-int __init
-oprofile_arch_init(struct oprofile_operations **ops)
+void __init
+oprofile_arch_init(struct oprofile_operations *ops)
{
struct op_axp_model *lmodel = NULL;
@@ -175,16 +166,18 @@
}
if (!lmodel)
- return -ENODEV;
+ return;
model = lmodel;
- oprof_axp_ops.cpu_type = lmodel->cpu_type;
- *ops = &oprof_axp_ops;
+ ops->create_files = op_axp_create_files;
+ ops->setup = op_axp_setup;
+ ops->shutdown = op_axp_shutdown;
+ ops->start = op_axp_start;
+ ops->stop = op_axp_stop;
+ ops->cpu_type = lmodel->cpu_type;
printk(KERN_INFO "oprofile: using %s performance monitoring.\n",
lmodel->cpu_type);
-
- return 0;
}
diff -urN linux/arch/alpha/oprofile/op_model_ev4.c
linux/arch/alpha/oprofile/op_model_ev4.c
--- linux/arch/alpha/oprofile/op_model_ev4.c 2003/06/05 00:04:29 1.2
+++ linux/arch/alpha/oprofile/op_model_ev4.c 2005/01/13 14:05:17 1.3
@@ -101,8 +101,7 @@
return;
/* Record the sample. */
- oprofile_add_sample(regs->pc, !user_mode(regs),
- which, smp_processor_id());
+ oprofile_add_sample(regs, which);
}
diff -urN linux/arch/alpha/oprofile/op_model_ev5.c
linux/arch/alpha/oprofile/op_model_ev5.c
--- linux/arch/alpha/oprofile/op_model_ev5.c 2003/06/04 16:08:01 1.1
+++ linux/arch/alpha/oprofile/op_model_ev5.c 2005/01/13 14:05:17 1.2
@@ -186,8 +186,7 @@
struct op_counter_config *ctr)
{
/* Record the sample. */
- oprofile_add_sample(regs->pc, !user_mode(regs),
- which, smp_processor_id());
+ oprofile_add_sample(regs, which);
}
diff -urN linux/arch/alpha/oprofile/op_model_ev6.c
linux/arch/alpha/oprofile/op_model_ev6.c
--- linux/arch/alpha/oprofile/op_model_ev6.c 2003/06/04 16:08:01 1.1
+++ linux/arch/alpha/oprofile/op_model_ev6.c 2005/01/13 14:05:17 1.2
@@ -88,8 +88,7 @@
struct op_counter_config *ctr)
{
/* Record the sample. */
- oprofile_add_sample(regs->pc, !user_mode(regs),
- which, smp_processor_id());
+ oprofile_add_sample(regs, which);
}
diff -urN linux/arch/alpha/oprofile/op_model_ev67.c
linux/arch/alpha/oprofile/op_model_ev67.c
--- linux/arch/alpha/oprofile/op_model_ev67.c 2003/06/04 16:08:01 1.1
+++ linux/arch/alpha/oprofile/op_model_ev67.c 2005/01/13 14:05:17 1.2
@@ -138,8 +138,7 @@
if (counter == 1)
fake_counter += PM_NUM_COUNTERS;
if (ctr[fake_counter].enabled)
- oprofile_add_sample(pc, kern, fake_counter,
- smp_processor_id());
+ oprofile_add_pc(pc, kern, fake_counter);
}
static void
@@ -197,8 +196,7 @@
to PALcode. Recognize ITB miss by PALcode
offset address, and get actual PC from
EXC_ADDR. */
- oprofile_add_sample(regs->pc, kern, which,
- smp_processor_id());
+ oprofile_add_pc(regs->pc, kern, which);
if ((pmpc & ((1 << 15) - 1)) == 581)
op_add_pm(regs->pc, kern, which,
ctr, PM_ITB_MISS);
@@ -241,7 +239,7 @@
}
}
- oprofile_add_sample(pmpc, kern, which, smp_processor_id());
+ oprofile_add_pc(pmpc, kern, which);
pctr_ctl = wrperfmon(5, 0);
if (pctr_ctl & (1UL << 27))
diff -urN linux/arch/arm/Kconfig linux/arch/arm/Kconfig
--- linux/arch/arm/Kconfig 2004/12/27 02:15:47 1.42
+++ linux/arch/arm/Kconfig 2005/01/13 14:05:17 1.43
@@ -57,6 +57,10 @@
config RWSEM_XCHGADD_ALGORITHM
bool
+config GENERIC_CALIBRATE_DELAY
+ bool
+ default y
+
config GENERIC_BUST_SPINLOCK
bool
@@ -230,6 +234,11 @@
depends on SA1100_COLLIE
default y
+config SHARP_SCOOP
+ bool
+ depends on PXA_SHARPSL
+ default y
+
config FORCE_MAX_ZONEORDER
int
depends on SA1111
@@ -253,6 +262,33 @@
menu "General setup"
# Select various configuration options depending on the machine type
+
+config SMP
+ bool "Symmetric Multi-Processing (EXPERIMENTAL)"
+ depends on EXPERIMENTAL && n
+ help
+ This enables support for systems with more than one CPU. If you have
+ a system with only one CPU, like most personal computers, say N. If
+ you have a system with more than one CPU, say Y.
+
+ If you say N here, the kernel will run on single and multiprocessor
+ machines, but will use only one CPU of a multiprocessor machine. If
+ you say Y here, the kernel will run on many, but not all, single
+ processor machines. On a single processor machine, the kernel will
+ run faster if you say N here.
+
+ See also the <file:Documentation/smp.tex>,
+ <file:Documentation/smp.txt>, <file:Documentation/i386/IO-APIC.txt>,
+ <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
+ <http://www.linuxdoc.org/docs.html#howto>.
+
+ If you don't know what to do here, say N.
+
+config NR_CPUS
+ int "Maximum number of CPUs (2-32)"
+ depends on SMP
+ default "4"
+
config DISCONTIGMEM
bool
depends on ARCH_EDB7211 || ARCH_SA1100 || (ARCH_LH7A40X &&
!LH7A40X_CONTIGMEM)
@@ -609,7 +645,7 @@
system, but the driver will do nothing.
config LEDS_TIMER
- bool "Timer LED" if LEDS && (ARCH_NETWINDER || ARCH_EBSA285 ||
ARCH_SHARK || MACH_MAINSTONE || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK ||
ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_P720T || ARCH_VERSATILE || ARCH_IMX)
+ bool "Timer LED" if LEDS && (ARCH_NETWINDER || ARCH_EBSA285 ||
ARCH_SHARK || MACH_MAINSTONE || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK ||
ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_P720T || ARCH_VERSATILE || ARCH_IMX ||
MACH_OMAP_H2 || MACH_OMAP_PERSEUS2)
depends on ARCH_NETWINDER || ARCH_EBSA110 || ARCH_EBSA285 || ARCH_SHARK
|| ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_PXA_IDP
|| ARCH_INTEGRATOR || ARCH_CDB89712 || ARCH_P720T || ARCH_OMAP ||
ARCH_VERSATILE || ARCH_IMX
default y if ARCH_EBSA110
help
@@ -625,7 +661,7 @@
config LEDS_CPU
bool "CPU usage LED"
- depends on LEDS && (ARCH_NETWINDER || ARCH_EBSA285 || ARCH_SHARK ||
ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_PXA_IDP ||
ARCH_INTEGRATOR || ARCH_P720T || ARCH_VERSATILE || ARCH_IMX)
+ depends on LEDS && (ARCH_NETWINDER || ARCH_EBSA285 || ARCH_SHARK ||
ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_PXA_IDP ||
ARCH_INTEGRATOR || ARCH_P720T || ARCH_VERSATILE || ARCH_IMX || MACH_OMAP_H2 ||
MACH_OMAP_PERSEUS2)
help
If you say Y here, the red LED will be used to give a good real
time indication of CPU usage, by lighting whenever the idle task
diff -urN linux/arch/arm/boot/compressed/head-sharpsl.S
linux/arch/arm/boot/compressed/head-sharpsl.S
--- linux/arch/arm/boot/compressed/head-sharpsl.S 1970/01/01 00:00:00
+++ linux/arch/arm/boot/compressed/head-sharpsl.S Thu Jan 13 14:05:17
2005 1.1
@@ -0,0 +1,92 @@
+/*
+ * linux/arch/arm/boot/compressed/head-sharpsl.S
+ *
+ * Copyright (C) 2004-2005 Richard Purdie <rpurdie@rpsys.net>
+ *
+ * Sharp's bootloader doesn't pass any kind of machine ID
+ * so we have to figure out the machine for ourselves...
+ *
+ * Support for Poodle, Corgi (SL-C700), Shepherd (SL-C750)
+ * and Husky (SL-C760).
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/linkage.h>
+#include <asm/mach-types.h>
+
+#ifndef CONFIG_PXA_SHARPSL
+#error What am I doing here...
+#endif
+
+ .section ".start", "ax"
+
+__SharpSL_start:
+
+ ldr r1, .W100ADDR @ Base address of w100 chip + regs
offset
+
+ mov r6, #0x31 @ Load Magic Init value
+ str r6, [r1, #0x280] @ to SCRATCH_UMSK
+ mov r5, #0x3000
+.W100LOOP:
+ subs r5, r5, #1
+ bne .W100LOOP
+ mov r6, #0x30 @ Load 2nd Magic Init value
+ str r6, [r1, #0x280] @ to SCRATCH_UMSK
+
+ ldr r6, [r1, #0] @ Load Chip ID
+ ldr r3, .W100ID
+ ldr r7, .POODLEID
+ cmp r6, r3
+ bne .SHARPEND @ We have no w100 - Poodle
+
+ mrc p15, 0, r6, c0, c0 @ Get Processor ID
+ and r6, r6, #0xffffff00
+ ldr r7, .CORGIID
+ ldr r3, .PXA255ID
+ cmp r6, r3
+ blo .SHARPEND @ We have a PXA250 - Corgi
+
+ mov r1, #0x0c000000 @ Base address of NAND chip
+ ldrb r3, [r1, #24] @ Load FLASHCTL
+ bic r3, r3, #0x11 @ SET NCE
+ orr r3, r3, #0x0a @ SET CLR + FLWP
+ strb r3, [r1, #24] @ Save to FLASHCTL
+ mov r2, #0x90 @ Command "readid"
+ strb r2, [r1, #20] @ Save to FLASHIO
+ bic r3, r3, #2 @ CLR CLE
+ orr r3, r3, #4 @ SET ALE
+ strb r3, [r1, #24] @ Save to FLASHCTL
+ mov r2, #0 @ Address 0x00
+ strb r2, [r1, #20] @ Save to FLASHIO
+ bic r3, r3, #4 @ CLR ALE
+ strb r3, [r1, #24] @ Save to FLASHCTL
+.SHARP1:
+ ldrb r3, [r1, #24] @ Load FLASHCTL
+ tst r3, #32 @ Is chip ready?
+ beq .SHARP1
+ ldrb r2, [r1, #20] @ NAND Manufacturer ID
+ ldrb r3, [r1, #20] @ NAND Chip ID
+ ldr r7, .SHEPHERDID
+ cmp r3, #0x76 @ 64MiB flash
+ beq .SHARPEND @ We have Shepherd
+ ldr r7, .HUSKYID @ Must be Husky
+ b .SHARPEND
+
+.PXA255ID:
+ .word 0x69052d00 @ PXA255 Processor ID
+.W100ID:
+ .word 0x57411002 @ w100 Chip ID
+.W100ADDR:
+ .word 0x08010000 @ w100 Chip ID Reg Address
+.POODLEID:
+ .word MACH_TYPE_POODLE
+.CORGIID:
+ .word MACH_TYPE_CORGI
+.SHEPHERDID:
+ .word MACH_TYPE_SHEPHERD
+.HUSKYID:
+ .word MACH_TYPE_HUSKY
+.SHARPEND:
+
+
diff -urN linux/arch/arm/boot/compressed/Makefile
linux/arch/arm/boot/compressed/Makefile
--- linux/arch/arm/boot/compressed/Makefile 2004/11/15 11:49:13 1.38
+++ linux/arch/arm/boot/compressed/Makefile 2005/01/13 14:05:17 1.39
@@ -46,6 +46,10 @@
OBJS += head-xscale.o
endif
+ifeq ($(CONFIG_PXA_SHARPSL),y)
+OBJS += head-sharpsl.o
+endif
+
ifeq ($(CONFIG_DEBUG_ICEDCC),y)
OBJS += ice-dcc.o
endif
diff -urN linux/arch/arm/boot/compressed/head-xscale.S
linux/arch/arm/boot/compressed/head-xscale.S
--- linux/arch/arm/boot/compressed/head-xscale.S 2004/10/12 01:45:40
1.8
+++ linux/arch/arm/boot/compressed/head-xscale.S 2005/01/13 14:05:17
1.9
@@ -34,20 +34,6 @@
bic r0, r0, #0x1000 @ clear Icache
mcr p15, 0, r0, c1, c0, 0
-#ifdef CONFIG_ARCH_IQ80321
- mov r7, #MACH_TYPE_IQ80321
-#endif
-
-#ifdef CONFIG_ARCH_IQ31244
- mov r7, #(MACH_TYPE_IQ31244 & 0xff)
- orr r7, r7, #(MACH_TYPE_IQ31244 & 0xff00)
-#endif
-
-#ifdef CONFIG_ARCH_IQ80331
- mov r7, #(MACH_TYPE_IQ80331 & 0xff)
- orr r7, r7, #(MACH_TYPE_IQ80331 & 0xff00)
-#endif
-
#ifdef CONFIG_ARCH_LUBBOCK
mov r7, #MACH_TYPE_LUBBOCK
#endif
diff -urN linux/arch/arm/common/scoop.c linux/arch/arm/common/scoop.c
--- linux/arch/arm/common/scoop.c 1970/01/01 00:00:00
+++ linux/arch/arm/common/scoop.c Thu Jan 13 14:05:17 2005 1.1
@@ -0,0 +1,132 @@
+/*
+ * Support code for the SCOOP interface found on various Sharp PDAs
+ *
+ * Copyright (c) 2004 Richard Purdie
+ *
+ * Based on code written by Sharp/Lineo for 2.4 kernels
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/device.h>
+#include <asm/io.h>
+#include <asm/hardware/scoop.h>
+
+static void __iomem *scoop_io_base;
+
+#define SCOOP_REG(adr) (*(volatile unsigned short*)(scoop_io_base+(adr)))
+
+void reset_scoop(void)
+{
+ SCOOP_REG(SCOOP_MCR) = 0x0100; // 00
+ SCOOP_REG(SCOOP_CDR) = 0x0000; // 04
+ SCOOP_REG(SCOOP_CPR) = 0x0000; // 0C
+ SCOOP_REG(SCOOP_CCR) = 0x0000; // 10
+ SCOOP_REG(SCOOP_IMR) = 0x0000; // 18
+ SCOOP_REG(SCOOP_IRM) = 0x00FF; // 14
+ SCOOP_REG(SCOOP_ISR) = 0x0000; // 1C
+ SCOOP_REG(SCOOP_IRM) = 0x0000;
+}
+
+static spinlock_t scoop_lock = SPIN_LOCK_UNLOCKED;
+static u32 scoop_gpwr;
+
+unsigned short set_scoop_gpio(unsigned short bit)
+{
+ unsigned short gpio_bit;
+ unsigned long flag;
+
+ spin_lock_irqsave(&scoop_lock, flag);
+ gpio_bit = SCOOP_REG(SCOOP_GPWR) | bit;
+ SCOOP_REG(SCOOP_GPWR) = gpio_bit;
+ spin_unlock_irqrestore(&scoop_lock, flag);
+
+ return gpio_bit;
+}
+
+unsigned short reset_scoop_gpio(unsigned short bit)
+{
+ unsigned short gpio_bit;
+ unsigned long flag;
+
+ spin_lock_irqsave(&scoop_lock, flag);
+ gpio_bit = SCOOP_REG(SCOOP_GPWR) & ~bit;
+ SCOOP_REG(SCOOP_GPWR) = gpio_bit;
+ spin_unlock_irqrestore(&scoop_lock, flag);
+
+ return gpio_bit;
+}
+
+EXPORT_SYMBOL(set_scoop_gpio);
+EXPORT_SYMBOL(reset_scoop_gpio);
+
+unsigned short read_scoop_reg(unsigned short reg)
+{
+ return SCOOP_REG(reg);
+}
+
+void write_scoop_reg(unsigned short reg, unsigned short data)
+{
+ SCOOP_REG(reg)=data;
+}
+
+EXPORT_SYMBOL(reset_scoop);
+EXPORT_SYMBOL(read_scoop_reg);
+EXPORT_SYMBOL(write_scoop_reg);
+
+static int scoop_suspend(struct device *dev, uint32_t state, uint32_t level)
+{
+ if (level == SUSPEND_POWER_DOWN) {
+ scoop_gpwr = SCOOP_REG(SCOOP_GPWR);
+ SCOOP_REG(SCOOP_GPWR) = 0;
+ }
+ return 0;
+}
+
+static int scoop_resume(struct device *dev, uint32_t level)
+{
+ if (level == RESUME_POWER_ON) {
+ SCOOP_REG(SCOOP_GPWR) = scoop_gpwr;
+ }
+ return 0;
+}
+
+int __init scoop_probe(struct device *dev)
+{
+ struct scoop_config *inf;
+ struct platform_device *pdev = to_platform_device(dev);
+ struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+
+ if (!mem) return -EINVAL;
+
+ inf = dev->platform_data;
+ scoop_io_base = ioremap(mem->start, 0x1000);
+ if (!scoop_io_base) return -ENOMEM;
+
+ SCOOP_REG(SCOOP_MCR) = 0x0140;
+
+ reset_scoop();
+
+ SCOOP_REG(SCOOP_GPCR) = inf->io_dir & 0xffff;
+ SCOOP_REG(SCOOP_GPWR) = inf->io_out & 0xffff;
+
+ return 0;
+}
+
+static struct device_driver scoop_driver = {
+ .name = "sharp-scoop",
+ .bus = &platform_bus_type,
+ .probe = scoop_probe,
+ .suspend = scoop_suspend,
+ .resume = scoop_resume,
+};
+
+int __init scoop_init(void)
+{
+ return driver_register(&scoop_driver);
+}
+
+subsys_initcall(scoop_init);
diff -urN linux/arch/arm/common/Makefile linux/arch/arm/common/Makefile
--- linux/arch/arm/common/Makefile 2004/11/15 11:49:13 1.9
+++ linux/arch/arm/common/Makefile 2005/01/13 14:05:17 1.10
@@ -11,3 +11,4 @@
obj-$(CONFIG_DMABOUNCE) += dmabounce.o
obj-$(CONFIG_TIMER_ACORN) += time-acorn.o
obj-$(CONFIG_SHARP_LOCOMO) += locomo.o
+obj-$(CONFIG_SHARP_SCOOP) += scoop.o
diff -urN linux/arch/arm/common/amba.c linux/arch/arm/common/amba.c
--- linux/arch/arm/common/amba.c 2004/11/15 11:49:13 1.7
+++ linux/arch/arm/common/amba.c 2005/01/13 14:05:17 1.8
@@ -59,7 +59,7 @@
#define amba_hotplug NULL
#endif
-static int amba_suspend(struct device *dev, u32 state)
+static int amba_suspend(struct device *dev, pm_message_t state)
{
struct amba_driver *drv = to_amba_driver(dev->driver);
int ret = 0;
diff -urN linux/arch/arm/common/locomo.c linux/arch/arm/common/locomo.c
--- linux/arch/arm/common/locomo.c 2004/11/15 11:49:13 1.2
+++ linux/arch/arm/common/locomo.c 2005/01/13 14:05:17 1.3
@@ -668,7 +668,7 @@
return dev->devid == drv->devid;
}
-static int locomo_bus_suspend(struct device *dev, u32 state)
+static int locomo_bus_suspend(struct device *dev, pm_message_t state)
{
struct locomo_dev *ldev = LOCOMO_DEV(dev);
struct locomo_driver *drv = LOCOMO_DRV(dev->driver);
diff -urN linux/arch/arm/common/sa1111.c linux/arch/arm/common/sa1111.c
--- linux/arch/arm/common/sa1111.c 2004/12/04 18:15:57 1.22
+++ linux/arch/arm/common/sa1111.c 2005/01/13 14:05:17 1.23
@@ -797,7 +797,7 @@
unsigned int wakeen1;
};
-#ifdef CONFIG_PM
+#ifdef CONFIG_PM
static int sa1111_suspend(struct device *dev, u32 state, u32 level)
{
@@ -922,11 +922,10 @@
return 0;
}
-#else /* !CONFIG_PM */
-#define sa1111_resume NULL
-#define sa1111_suspend NULL
-#endif /* !CONFIG_PM */
-
+#else
+#define sa1111_suspend NULL
+#define sa1111_resume NULL
+#endif
static int sa1111_probe(struct device *dev)
{
@@ -1194,7 +1193,7 @@
return dev->devid == drv->devid;
}
-static int sa1111_bus_suspend(struct device *dev, u32 state)
+static int sa1111_bus_suspend(struct device *dev, pm_message_t state)
{
struct sa1111_dev *sadev = SA1111_DEV(dev);
struct sa1111_driver *drv = SA1111_DRV(dev->driver);
diff -urN linux/arch/arm/configs/iq80332_defconfig
linux/arch/arm/configs/iq80332_defconfig
--- linux/arch/arm/configs/iq80332_defconfig 1970/01/01 00:00:00
+++ linux/arch/arm/configs/iq80332_defconfig Thu Jan 13 14:05:17 2005
1.1
@@ -0,0 +1,864 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10
+# Thu Jan 6 10:51:02 2005
+#
+CONFIG_ARM=y
+CONFIG_MMU=y
+CONFIG_UID16=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_IOMAP=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
+# CONFIG_IKCONFIG is not set
+# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_CAMELOT is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+CONFIG_ARCH_IOP3XX=y
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_H720X is not set
+
+#
+# IOP3xx Implementation Options
+#
+
+#
+# IOP3xx Platform Types
+#
+# CONFIG_ARCH_IQ80321 is not set
+# CONFIG_ARCH_IQ31244 is not set
+# CONFIG_ARCH_IQ80331 is not set
+CONFIG_MACH_IQ80332=y
+# CONFIG_ARCH_EP80219 is not set
+CONFIG_ARCH_IOP331=y
+
+#
+# IOP3xx Chipset Features
+#
+# CONFIG_IOP331_STEPD is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_MINICACHE=y
+
+#
+# Processor Features
+#
+# CONFIG_ARM_THUMB is not set
+CONFIG_XSCALE_PMU=y
+
+#
+# General setup
+#
+CONFIG_PCI=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_PCI_LEGACY_PROC is not set
+CONFIG_PCI_NAMES=y
+
+#
+# At least one math emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_AOUT=y
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_PM is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_ARTHUR is not set
+CONFIG_CMDLINE="ip=boot root=nfs console=ttyS0,115200"
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
+CONFIG_MTD_REDBOOT_PARTS_READONLY=y
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_GEOMETRY is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0xc0000000
+CONFIG_MTD_PHYSMAP_LEN=0x00800000
+CONFIG_MTD_PHYSMAP_BANKWIDTH=1
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_EDB7312 is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CDROM_PKTCDVD is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+
+#
+# Multi-device support (RAID and LVM)
+#
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=y
+CONFIG_MD_LINEAR=y
+CONFIG_MD_RAID0=y
+CONFIG_MD_RAID1=y
+# CONFIG_MD_RAID10 is not set
+CONFIG_MD_RAID5=y
+# CONFIG_MD_RAID6 is not set
+# CONFIG_MD_MULTIPATH is not set
+# CONFIG_MD_FAULTY is not set
+CONFIG_BLK_DEV_DM=y
+# CONFIG_DM_CRYPT is not set
+# CONFIG_DM_SNAPSHOT is not set
+# CONFIG_DM_MIRROR is not set
+# CONFIG_DM_ZERO is not set
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+# CONFIG_NETLINK_DEV is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETFILTER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+# CONFIG_NET_CLS_ROUTE is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+# CONFIG_NET_ETHERNET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+CONFIG_E1000=y
+CONFIG_E1000_NAPI=y
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
[%d lines skipped]
467diff -urN linux/arch/arm/configs/ebsa110_defconfig
linux/arch/arm/configs/ebsa110_defconfig
--- linux/arch/arm/configs/ebsa110_defconfig 2004/10/12 01:45:40 1.5
+++ linux/arch/arm/configs/ebsa110_defconfig 2005/01/13 14:05:17 1.6
@@ -239,7 +239,6 @@
CONFIG_IP_NF_TARGET_REDIRECT=y
CONFIG_IP_NF_TARGET_NETMAP=y
CONFIG_IP_NF_TARGET_SAME=y
-# CONFIG_IP_NF_NAT_LOCAL is not set
# CONFIG_IP_NF_NAT_SNMP_BASIC is not set
CONFIG_IP_NF_NAT_IRC=y
CONFIG_IP_NF_NAT_FTP=y
diff -urN linux/arch/arm/configs/ep80219_defconfig
linux/arch/arm/configs/ep80219_defconfig
--- linux/arch/arm/configs/ep80219_defconfig 2004/12/27 02:15:48 1.2
+++ linux/arch/arm/configs/ep80219_defconfig 2005/01/13 14:05:17 1.3
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.10-rc3
-# Wed Dec 15 17:03:41 2004
+# Linux kernel version: 2.6.10
+# Thu Jan 6 10:54:33 2005
#
CONFIG_ARM=y
CONFIG_MMU=y
@@ -90,6 +90,7 @@
# CONFIG_ARCH_IQ80321 is not set
CONFIG_ARCH_IQ31244=y
# CONFIG_ARCH_IQ80331 is not set
+# CONFIG_MACH_IQ80332 is not set
CONFIG_ARCH_EP80219=y
CONFIG_ARCH_IOP321=y
# CONFIG_ARCH_IOP331 is not set
@@ -119,7 +120,6 @@
# General setup
#
CONFIG_PCI=y
-# CONFIG_ZBOOT_ROM is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
# CONFIG_XIP_KERNEL is not set
@@ -144,7 +144,7 @@
# CONFIG_PM is not set
# CONFIG_PREEMPT is not set
# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="ip=boot root=nfs console=ttyS0,115200 mem=128M@0xa0000000"
+CONFIG_CMDLINE="ip=boot root=nfs console=ttyS0,115200"
CONFIG_ALIGNMENT_TRAP=y
#
@@ -398,7 +398,8 @@
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
+CONFIG_E1000=y
+CONFIG_E1000_NAPI=y
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
@@ -537,7 +538,7 @@
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
diff -urN linux/arch/arm/configs/iq31244_defconfig
linux/arch/arm/configs/iq31244_defconfig
--- linux/arch/arm/configs/iq31244_defconfig 2004/12/27 02:15:48 1.2
+++ linux/arch/arm/configs/iq31244_defconfig 2005/01/13 14:05:17 1.3
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.10-rc3
-# Wed Dec 15 16:58:36 2004
+# Linux kernel version: 2.6.10
+# Thu Jan 6 10:53:05 2005
#
CONFIG_ARM=y
CONFIG_MMU=y
@@ -30,7 +30,8 @@
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
CONFIG_KOBJECT_UEVENT=y
-# CONFIG_IKCONFIG is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
# CONFIG_EMBEDDED is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -90,6 +91,7 @@
# CONFIG_ARCH_IQ80321 is not set
CONFIG_ARCH_IQ31244=y
# CONFIG_ARCH_IQ80331 is not set
+# CONFIG_MACH_IQ80332 is not set
# CONFIG_ARCH_EP80219 is not set
CONFIG_ARCH_IOP321=y
# CONFIG_ARCH_IOP331 is not set
@@ -119,7 +121,6 @@
# General setup
#
CONFIG_PCI=y
-# CONFIG_ZBOOT_ROM is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
# CONFIG_XIP_KERNEL is not set
@@ -144,7 +145,7 @@
# CONFIG_PM is not set
# CONFIG_PREEMPT is not set
# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="ip=boot root=nfs console=ttyS0,115200 mem=256M@0xa0000000"
+CONFIG_CMDLINE="ip=boot root=nfs console=ttyS0,115200"
CONFIG_ALIGNMENT_TRAP=y
#
@@ -506,7 +507,7 @@
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
diff -urN linux/arch/arm/configs/iq80321_defconfig
linux/arch/arm/configs/iq80321_defconfig
--- linux/arch/arm/configs/iq80321_defconfig 2004/12/27 02:15:48 1.7
+++ linux/arch/arm/configs/iq80321_defconfig 2005/01/13 14:05:17 1.8
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.10-rc3
-# Wed Dec 15 16:48:43 2004
+# Linux kernel version: 2.6.10
+# Thu Jan 6 10:52:05 2005
#
CONFIG_ARM=y
CONFIG_MMU=y
@@ -90,6 +90,7 @@
CONFIG_ARCH_IQ80321=y
# CONFIG_ARCH_IQ31244 is not set
# CONFIG_ARCH_IQ80331 is not set
+# CONFIG_MACH_IQ80332 is not set
# CONFIG_ARCH_EP80219 is not set
CONFIG_ARCH_IOP321=y
# CONFIG_ARCH_IOP331 is not set
@@ -119,7 +120,6 @@
# General setup
#
CONFIG_PCI=y
-# CONFIG_ZBOOT_ROM is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
# CONFIG_XIP_KERNEL is not set
@@ -144,7 +144,7 @@
# CONFIG_PM is not set
# CONFIG_PREEMPT is not set
# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="ip=boot root=nfs console=ttyS0,115200 mem=128M@0xa0000000"
+CONFIG_CMDLINE="ip=boot root=nfs console=ttyS0,115200"
CONFIG_ALIGNMENT_TRAP=y
#
@@ -427,7 +427,7 @@
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
@@ -500,7 +500,84 @@
#
# I2C support
#
-# CONFIG_I2C is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+CONFIG_I2C_IOP3XX=y
+# CONFIG_I2C_ISA is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_SCx200_ACB is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_ISA is not set
+
+#
+# Hardware Sensors Chip support
+#
+# CONFIG_I2C_SENSOR is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83627HF is not set
+
+#
+# Other I2C Chip support
+#
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_RTC8564 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
#
# Multimedia devices
@@ -689,7 +766,7 @@
# CONFIG_DEBUG_KERNEL is not set
# CONFIG_DEBUG_INFO is not set
CONFIG_FRAME_POINTER=y
-# CONFIG_DEBUG_USER is not set
+CONFIG_DEBUG_USER=y
#
# Security options
diff -urN linux/arch/arm/configs/iq80331_defconfig
linux/arch/arm/configs/iq80331_defconfig
--- linux/arch/arm/configs/iq80331_defconfig 2004/12/27 02:15:48 1.2
+++ linux/arch/arm/configs/iq80331_defconfig 2005/01/13 14:05:17 1.3
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.10-rc3
-# Wed Dec 15 16:43:39 2004
+# Linux kernel version: 2.6.10
+# Thu Jan 6 10:44:16 2005
#
CONFIG_ARM=y
CONFIG_MMU=y
@@ -33,7 +33,6 @@
# CONFIG_IKCONFIG is not set
# CONFIG_EMBEDDED is not set
CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
@@ -91,12 +90,14 @@
# CONFIG_ARCH_IQ80321 is not set
# CONFIG_ARCH_IQ31244 is not set
CONFIG_ARCH_IQ80331=y
+# CONFIG_MACH_IQ80332 is not set
# CONFIG_ARCH_EP80219 is not set
CONFIG_ARCH_IOP331=y
#
# IOP3xx Chipset Features
#
+CONFIG_IOP331_STEPD=y
#
# Processor Type
@@ -119,7 +120,6 @@
# General setup
#
CONFIG_PCI=y
-# CONFIG_ZBOOT_ROM is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
# CONFIG_XIP_KERNEL is not set
@@ -141,11 +141,10 @@
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_DEBUG_DRIVER is not set
# CONFIG_PM is not set
# CONFIG_PREEMPT is not set
# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="ip=boot root=nfs console=ttyS0,115200 mem=128M@0x00000000"
+CONFIG_CMDLINE="ip=boot root=nfs console=ttyS0,115200"
CONFIG_ALIGNMENT_TRAP=y
#
@@ -511,7 +510,7 @@
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
@@ -584,7 +583,84 @@
#
# I2C support
#
-# CONFIG_I2C is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+CONFIG_I2C_IOP3XX=y
+# CONFIG_I2C_ISA is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_SCx200_ACB is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_ISA is not set
+
+#
+# Hardware Sensors Chip support
+#
+# CONFIG_I2C_SENSOR is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83627HF is not set
+
+#
+# Other I2C Chip support
+#
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_RTC8564 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
#
# Multimedia devices
@@ -764,19 +840,10 @@
#
# Kernel hacking
#
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_SCHEDSTATS is not set
-# CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_KOBJECT is not set
-CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_KERNEL is not set
# CONFIG_DEBUG_INFO is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
-CONFIG_DEBUG_ERRORS=y
-# CONFIG_DEBUG_LL is not set
#
# Security options
@@ -793,5 +860,5 @@
# Library routines
#
# CONFIG_CRC_CCITT is not set
-CONFIG_CRC32=y
+# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
diff -urN linux/arch/arm/configs/ixp4xx_defconfig
linux/arch/arm/configs/ixp4xx_defconfig
--- linux/arch/arm/configs/ixp4xx_defconfig 2004/10/12 01:45:40 1.3
+++ linux/arch/arm/configs/ixp4xx_defconfig 2005/01/13 14:05:17 1.4
@@ -399,7 +399,6 @@
CONFIG_IP_NF_TARGET_REDIRECT=m
# CONFIG_IP_NF_TARGET_NETMAP is not set
# CONFIG_IP_NF_TARGET_SAME is not set
-CONFIG_IP_NF_NAT_LOCAL=y
CONFIG_IP_NF_NAT_SNMP_BASIC=m
CONFIG_IP_NF_NAT_IRC=m
CONFIG_IP_NF_NAT_FTP=m
diff -urN linux/arch/arm/kernel/smp.c linux/arch/arm/kernel/smp.c
--- linux/arch/arm/kernel/smp.c 1970/01/01 00:00:00
+++ linux/arch/arm/kernel/smp.c Thu Jan 13 14:05:18 2005 1.1
@@ -0,0 +1,406 @@
+/*
+ * linux/arch/arm/kernel/smp.c
+ *
+ * Copyright (C) 2002 ARM Limited, All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/config.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/spinlock.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/cache.h>
+#include <linux/profile.h>
+#include <linux/errno.h>
+#include <linux/mm.h>
+#include <linux/seq_file.h>
+
+#include <asm/atomic.h>
+#include <asm/cpu.h>
+#include <asm/processor.h>
+#include <asm/smp.h>
+#include <asm/ptrace.h>
+
+#include <asm/cacheflush.h>
+#include <asm/tlbflush.h>
+
+/*
+ * bitmask of present and online CPUs.
+ * The present bitmask indicates that the CPU is physically present.
+ * The online bitmask indicates that the CPU is up and running.
+ */
+cpumask_t cpu_present_mask;
+cpumask_t cpu_online_map;
+
+/*
+ * structures for inter-processor calls
+ * - A collection of single bit ipi messages.
+ */
+struct ipi_data {
+ spinlock_t lock;
+ unsigned long bits;
+};
+
+static DEFINE_PER_CPU(struct ipi_data, ipi_data) = {
+ .lock = SPIN_LOCK_UNLOCKED,
+};
+
+enum ipi_msg_type {
+ IPI_TIMER,
+ IPI_RESCHEDULE,
+ IPI_CALL_FUNC,
+ IPI_CPU_STOP,
+};
+
+struct smp_call_struct {
+ void (*func)(void *info);
+ void *info;
+ int wait;
+ cpumask_t pending;
+ cpumask_t unfinished;
+};
+
+static struct smp_call_struct * volatile smp_call_function_data;
+static spinlock_t smp_call_function_lock = SPIN_LOCK_UNLOCKED;
+
+int __init __cpu_up(unsigned int cpu)
+{
+ struct task_struct *idle;
+ int ret;
+
+ /*
+ * Spawn a new process manually. Grab a pointer to
+ * its task struct so we can mess with it
+ */
+ idle = fork_idle(cpu);
+ if (IS_ERR(idle)) {
+ printk(KERN_ERR "CPU%u: fork() failed\n", cpu);
+ return PTR_ERR(idle);
+ }
+
+ /*
+ * Now bring the CPU into our world.
+ */
+ ret = boot_secondary(cpu, idle);
+ if (ret) {
+ printk(KERN_CRIT "cpu_up: processor %d failed to boot\n", cpu);
+ /*
+ * FIXME: We need to clean up the new idle thread. --rmk
+ */
+ }
+
+ return ret;
+}
+
+/*
+ * Called by both boot and secondaries to move global data into
+ * per-processor storage.
+ */
+void __init smp_store_cpu_info(unsigned int cpuid)
+{
+ struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
+
+ cpu_info->loops_per_jiffy = loops_per_jiffy;
+}
+
+void __init smp_cpus_done(unsigned int max_cpus)
+{
+ int cpu;
+ unsigned long bogosum = 0;
+
+ for_each_online_cpu(cpu)
+ bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
+
+ printk(KERN_INFO "SMP: Total of %d processors activated "
+ "(%lu.%02lu BogoMIPS).\n",
+ num_online_cpus(),
+ bogosum / (500000/HZ),
+ (bogosum / (5000/HZ)) % 100);
+}
+
+void __init smp_prepare_boot_cpu(void)
+{
+ unsigned int cpu = smp_processor_id();
+
+ cpu_set(cpu, cpu_present_mask);
+ cpu_set(cpu, cpu_online_map);
+}
+
+static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg)
+{
+ unsigned long flags;
+ unsigned int cpu;
+
+ local_irq_save(flags);
+
+ for_each_cpu_mask(cpu, callmap) {
+ struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
+
+ spin_lock(&ipi->lock);
+ ipi->bits |= 1 << msg;
+ spin_unlock(&ipi->lock);
+ }
+
+ /*
+ * Call the platform specific cross-CPU call function.
+ */
+ smp_cross_call(callmap);
+
+ local_irq_restore(flags);
+}
+
+/*
+ * You must not call this function with disabled interrupts, from a
+ * hardware interrupt handler, nor from a bottom half handler.
+ */
+int smp_call_function_on_cpu(void (*func)(void *info), void *info, int retry,
+ int wait, cpumask_t callmap)
+{
+ struct smp_call_struct data;
+ unsigned long timeout;
+ int ret = 0;
+
+ data.func = func;
+ data.info = info;
+ data.wait = wait;
+
+ cpu_clear(smp_processor_id(), callmap);
+ if (cpus_empty(callmap))
+ goto out;
+
+ data.pending = callmap;
+ if (wait)
+ data.unfinished = callmap;
+
+ /*
+ * try to get the mutex on smp_call_function_data
+ */
+ spin_lock(&smp_call_function_lock);
+ smp_call_function_data = &data;
+
+ send_ipi_message(callmap, IPI_CALL_FUNC);
+
+ timeout = jiffies + HZ;
+ while (!cpus_empty(data.pending) && time_before(jiffies, timeout))
+ barrier();
+
+ /*
+ * did we time out?
+ */
+ if (!cpus_empty(data.pending)) {
+ /*
+ * this may be causing our panic - report it
+ */
+ printk(KERN_CRIT
+ "CPU%u: smp_call_function timeout for %p(%p)\n"
+ " callmap %lx pending %lx, %swait\n",
+ smp_processor_id(), func, info, callmap, data.pending,
+ wait ? "" : "no ");
+
+ /*
+ * TRACE
+ */
+ timeout = jiffies + (5 * HZ);
+ while (!cpus_empty(data.pending) && time_before(jiffies,
timeout))
+ barrier();
+
+ if (cpus_empty(data.pending))
+ printk(KERN_CRIT " RESOLVED\n");
+ else
+ printk(KERN_CRIT " STILL STUCK\n");
+ }
+
+ /*
+ * whatever happened, we're done with the data, so release it
+ */
+ smp_call_function_data = NULL;
+ spin_unlock(&smp_call_function_lock);
+
+ if (!cpus_empty(data.pending)) {
+ ret = -ETIMEDOUT;
+ goto out;
+ }
+
+ if (wait)
+ while (!cpus_empty(data.unfinished))
+ barrier();
+ out:
+
+ return 0;
+}
+
+int smp_call_function(void (*func)(void *info), void *info, int retry,
+ int wait)
+{
+ return smp_call_function_on_cpu(func, info, retry, wait,
+ cpu_online_map);
+}
+
+void show_ipi_list(struct seq_file *p)
+{
+ int cpu;
+
+ seq_printf(p, "IPI: ");
+
+ for_each_online_cpu(cpu)
+ seq_printf(p, "%10lu ", per_cpu(cpu_data, cpu).ipi_count);
+
+ seq_putc(p, '\n');
+}
+
+static void ipi_timer(struct pt_regs *regs)
+{
+ int user = user_mode(regs);
+
+ irq_enter();
+ profile_tick(CPU_PROFILING, regs);
+ update_process_times(user);
+ irq_exit();
+}
+
+/*
+ * ipi_call_function - handle IPI from smp_call_function()
+ *
+ * Note that we copy data out of the cross-call structure and then
+ * let the caller know that we're here and have done with their data
+ */
+static void ipi_call_function(unsigned int cpu)
+{
+ struct smp_call_struct *data = smp_call_function_data;
+ void (*func)(void *info) = data->func;
+ void *info = data->info;
+ int wait = data->wait;
+
+ cpu_clear(cpu, data->pending);
+
+ func(info);
+
+ if (wait)
+ cpu_clear(cpu, data->unfinished);
+}
+
+static spinlock_t stop_lock = SPIN_LOCK_UNLOCKED;
+
+/*
+ * ipi_cpu_stop - handle IPI from smp_send_stop()
+ */
+static void ipi_cpu_stop(unsigned int cpu)
+{
+ spin_lock(&stop_lock);
+ printk(KERN_CRIT "CPU%u: stopping\n", cpu);
+ dump_stack();
+ spin_unlock(&stop_lock);
+
+ cpu_clear(cpu, cpu_online_map);
+
+ local_fiq_disable();
+ local_irq_disable();
+
+ while (1)
+ cpu_relax();
+}
+
+/*
+ * Main handler for inter-processor interrupts
+ *
+ * For ARM, the ipimask now only identifies a single
+ * category of IPI (Bit 1 IPIs have been replaced by a
+ * different mechanism):
+ *
+ * Bit 0 - Inter-processor function call
+ */
+void do_IPI(unsigned int ipimask, struct pt_regs *regs)
+{
+ unsigned int cpu = smp_processor_id();
+
+ per_cpu(cpu_data, cpu).ipi_count++;
+
+ if (ipimask & (1 << 0)) {
+ struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
+
+ for (;;) {
+ unsigned long msgs;
+
+ spin_lock(&ipi->lock);
+ msgs = ipi->bits;
+ ipi->bits = 0;
+ spin_unlock(&ipi->lock);
+
+ if (!msgs)
+ break;
+
+ do {
+ unsigned nextmsg;
+
+ nextmsg = msgs & -msgs;
+ msgs &= ~nextmsg;
+ nextmsg = ffz(~nextmsg);
+
+ switch (nextmsg) {
+ case IPI_TIMER:
+ ipi_timer(regs);
+ break;
+
+ case IPI_RESCHEDULE:
+ /*
+ * nothing more to do - eveything is
+ * done on the interrupt return path
+ */
+ break;
+
+ case IPI_CALL_FUNC:
+ ipi_call_function(cpu);
+ break;
+
+ case IPI_CPU_STOP:
+ ipi_cpu_stop(cpu);
+ break;
+
+ default:
+ printk(KERN_CRIT "CPU%u: Unknown IPI
message 0x%x\n",
+ cpu, nextmsg);
+ break;
+ }
+ } while (msgs);
+ }
+
+ ipimask &= ~0x01;
+ }
+
+ if (ipimask) {
+ printk(KERN_CRIT "CPU %d: Unknown IPI signal %x!\n",
+ cpu, ipimask);
+ BUG();
+ }
+}
+
+void smp_send_reschedule(int cpu)
+{
+ send_ipi_message(cpumask_of_cpu(cpu), IPI_RESCHEDULE);
+}
+
+void smp_send_timer(void)
+{
+ cpumask_t mask = cpu_online_map;
+ cpu_clear(smp_processor_id(), mask);
+ send_ipi_message(mask, IPI_TIMER);
+}
+
+void smp_send_stop(void)
+{
+ cpumask_t mask = cpu_online_map;
+ cpu_clear(smp_processor_id(), mask);
+ send_ipi_message(mask, IPI_CPU_STOP);
[%d lines skipped]
9diff -urN linux/arch/arm/kernel/Makefile linux/arch/arm/kernel/Makefile
--- linux/arch/arm/kernel/Makefile 2004/11/15 11:49:14 1.40
+++ linux/arch/arm/kernel/Makefile 2005/01/13 14:05:18 1.41
@@ -18,6 +18,7 @@
obj-$(CONFIG_ARTHUR) += arthur.o
obj-$(CONFIG_ISA_DMA) += dma-isa.o
obj-$(CONFIG_PCI) += bios32.o
+obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_IWMMXT) += iwmmxt.o
AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
diff -urN linux/arch/arm/kernel/asm-offsets.c
linux/arch/arm/kernel/asm-offsets.c
--- linux/arch/arm/kernel/asm-offsets.c 2004/11/15 11:49:14 1.10
+++ linux/arch/arm/kernel/asm-offsets.c 2005/01/13 14:05:18 1.11
@@ -73,7 +73,7 @@
DEFINE(VM_EXEC, VM_EXEC);
BLANK();
DEFINE(PAGE_SZ, PAGE_SIZE);
- DEFINE(VIRT_OFFSET, PAGE_OFFSET);
+ DEFINE(VIRT_OFFSET, PAGE_OFFSET);
BLANK();
DEFINE(SYS_ERROR0, 0x9f0000);
BLANK();
diff -urN linux/arch/arm/kernel/entry-armv.S linux/arch/arm/kernel/entry-armv.S
--- linux/arch/arm/kernel/entry-armv.S 2004/12/27 02:15:48 1.61
+++ linux/arch/arm/kernel/entry-armv.S 2005/01/13 14:05:18 1.62
@@ -23,1000 +23,6 @@
#include "entry-header.S"
-#ifdef IOC_BASE
-/* IOC / IOMD based hardware */
-#include <asm/hardware/iomd.h>
-
- .equ ioc_base_high, IOC_BASE & 0xff000000
- .equ ioc_base_low, IOC_BASE & 0x00ff0000
- .macro disable_fiq
- mov r12, #ioc_base_high
- .if ioc_base_low
- orr r12, r12, #ioc_base_low
- .endif
- strb r12, [r12, #0x38] @ Disable FIQ register
- .endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- mov r4, #ioc_base_high @ point at IOC
- .if ioc_base_low
- orr r4, r4, #ioc_base_low
- .endif
- ldrb \irqstat, [r4, #IOMD_IRQREQB] @ get high priority
first
- ldr \base, =irq_prio_h
- teq \irqstat, #0
-#ifdef IOMD_BASE
- ldreqb \irqstat, [r4, #IOMD_DMAREQ] @ get dma
- addeq \base, \base, #256 @ irq_prio_h table size
- teqeq \irqstat, #0
- bne 2406f
-#endif
- ldreqb \irqstat, [r4, #IOMD_IRQREQA] @ get low priority
- addeq \base, \base, #256 @ irq_prio_d table size
- teqeq \irqstat, #0
-#ifdef IOMD_IRQREQC
- ldreqb \irqstat, [r4, #IOMD_IRQREQC]
- addeq \base, \base, #256 @ irq_prio_l table size
- teqeq \irqstat, #0
-#endif
-#ifdef IOMD_IRQREQD
- ldreqb \irqstat, [r4, #IOMD_IRQREQD]
- addeq \base, \base, #256 @ irq_prio_lc table size
- teqeq \irqstat, #0
-#endif
-2406: ldrneb \irqnr, [\base, \irqstat] @ get IRQ number
- .endm
-
-/*
- * Interrupt table (incorporates priority). Please note that we
- * rely on the order of these tables (see above code).
- */
- .macro irq_prio_table
-irq_prio_h: .byte 0, 8, 9, 8,10,10,10,10,11,11,11,11,10,10,10,10
- .byte 12, 8, 9, 8,10,10,10,10,11,11,11,11,10,10,10,10
- .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
- .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
- .byte 14,14,14,14,10,10,10,10,11,11,11,11,10,10,10,10
- .byte 14,14,14,14,10,10,10,10,11,11,11,11,10,10,10,10
- .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
- .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
- .byte 15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10
- .byte 15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10
- .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
- .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
- .byte 15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10
- .byte 15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10
- .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
- .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
-#ifdef IOMD_BASE
-irq_prio_d: .byte 0,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
- .byte 20,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
- .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
- .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
- .byte 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
- .byte 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
- .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
- .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
- .byte 23,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
- .byte 23,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
- .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
- .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
- .byte 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
- .byte 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
- .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
- .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
-#endif
-irq_prio_l: .byte 0, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3
- .byte 4, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3
- .byte 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5
- .byte 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5
- .byte 6, 6, 6, 6, 6, 6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 3
- .byte 6, 6, 6, 6, 6, 6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 3
- .byte 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5
- .byte 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5
- .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
- .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
- .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
- .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
- .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
- .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
- .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
- .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
-#ifdef IOMD_IRQREQC
-irq_prio_lc: .byte 24,24,25,24,26,26,26,26,27,27,27,27,27,27,27,27
- .byte 28,24,25,24,26,26,26,26,27,27,27,27,27,27,27,27
- .byte 29,29,29,29,29,29,29,29,29,29,29,29,29,29,29,29
- .byte 29,29,29,29,29,29,29,29,29,29,29,29,29,29,29,29
- .byte 30,30,30,30,30,30,30,30,27,27,27,27,27,27,27,27
- .byte 30,30,30,30,30,30,30,30,27,27,27,27,27,27,27,27
- .byte 29,29,29,29,29,29,29,29,29,29,29,29,29,29,29,29
- .byte 29,29,29,29,29,29,29,29,29,29,29,29,29,29,29,29
- .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
- .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
- .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
- .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
- .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
- .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
- .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
- .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
-#endif
-#ifdef IOMD_IRQREQD
-irq_prio_ld: .byte 40,40,41,40,42,42,42,42,43,43,43,43,43,43,43,43
- .byte 44,40,41,40,42,42,42,42,43,43,43,43,43,43,43,43
- .byte 45,45,45,45,45,45,45,45,45,45,45,45,45,45,45,45
- .byte 45,45,45,45,45,45,45,45,45,45,45,45,45,45,45,45
- .byte 46,46,46,46,46,46,46,46,43,43,43,43,43,43,43,43
- .byte 46,46,46,46,46,46,46,46,43,43,43,43,43,43,43,43
- .byte 45,45,45,45,45,45,45,45,45,45,45,45,45,45,45,45
- .byte 45,45,45,45,45,45,45,45,45,45,45,45,45,45,45,45
- .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47
- .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47
- .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47
- .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47
- .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47
- .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47
- .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47
- .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47
-#endif
- .endm
-
-#elif defined(CONFIG_ARCH_EBSA110)
-
-#define IRQ_STAT 0xff000000 /* read */
-
- .macro disable_fiq
- .endm
-
- .macro get_irqnr_and_base, irqnr, stat, base, tmp
- mov \base, #IRQ_STAT
- ldrb \stat, [\base] @ get interrupts
- mov \irqnr, #0
- tst \stat, #15
- addeq \irqnr, \irqnr, #4
- moveq \stat, \stat, lsr #4
- tst \stat, #3
- addeq \irqnr, \irqnr, #2
- moveq \stat, \stat, lsr #2
- tst \stat, #1
- addeq \irqnr, \irqnr, #1
- moveq \stat, \stat, lsr #1
- tst \stat, #1 @ bit 0 should be set
- .endm
-
- .macro irq_prio_table
- .endm
-
-#elif defined(CONFIG_ARCH_SHARK)
-
- .macro disable_fiq
- .endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- mov r4, #0xe0000000
-
- mov \irqstat, #0x0C
- strb \irqstat, [r4, #0x20] @outb(0x0C, 0x20) /*
Poll command */
- ldrb \irqnr, [r4, #0x20] @irq = inb(0x20) & 7
- and \irqstat, \irqnr, #0x80
- teq \irqstat, #0
- beq 43f
- and \irqnr, \irqnr, #7
- teq \irqnr, #2
- bne 44f
-43: mov \irqstat, #0x0C
- strb \irqstat, [r4, #0xa0] @outb(0x0C, 0xA0) /*
Poll command */
- ldrb \irqnr, [r4, #0xa0] @irq = (inb(0xA0) & 7)
+ 8
- and \irqstat, \irqnr, #0x80
- teq \irqstat, #0
- beq 44f
- and \irqnr, \irqnr, #7
- add \irqnr, \irqnr, #8
-44: teq \irqstat, #0
- .endm
-
- .macro irq_prio_table
- .endm
-
-#elif defined(CONFIG_FOOTBRIDGE)
-#include <asm/hardware/dec21285.h>
-
- .macro disable_fiq
- .endm
-
- .equ dc21285_high, ARMCSR_BASE & 0xff000000
- .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- mov r4, #dc21285_high
- .if dc21285_low
- orr r4, r4, #dc21285_low
- .endif
- ldr \irqstat, [r4, #0x180] @ get interrupts
-
- mov \irqnr, #IRQ_SDRAMPARITY
- tst \irqstat, #IRQ_MASK_SDRAMPARITY
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_UART_RX
- movne \irqnr, #IRQ_CONRX
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_DMA1
- movne \irqnr, #IRQ_DMA1
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_DMA2
- movne \irqnr, #IRQ_DMA2
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_IN0
- movne \irqnr, #IRQ_IN0
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_IN1
- movne \irqnr, #IRQ_IN1
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_IN2
- movne \irqnr, #IRQ_IN2
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_IN3
- movne \irqnr, #IRQ_IN3
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_PCI
- movne \irqnr, #IRQ_PCI
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_DOORBELLHOST
- movne \irqnr, #IRQ_DOORBELLHOST
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_I2OINPOST
- movne \irqnr, #IRQ_I2OINPOST
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_TIMER1
- movne \irqnr, #IRQ_TIMER1
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_TIMER2
- movne \irqnr, #IRQ_TIMER2
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_TIMER3
- movne \irqnr, #IRQ_TIMER3
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_UART_TX
- movne \irqnr, #IRQ_CONTX
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_PCI_ABORT
- movne \irqnr, #IRQ_PCI_ABORT
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_PCI_SERR
- movne \irqnr, #IRQ_PCI_SERR
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_DISCARD_TIMER
- movne \irqnr, #IRQ_DISCARD_TIMER
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_PCI_DPERR
- movne \irqnr, #IRQ_PCI_DPERR
- bne 1001f
-
- tst \irqstat, #IRQ_MASK_PCI_PERR
- movne \irqnr, #IRQ_PCI_PERR
-1001:
- .endm
-
- .macro irq_prio_table
- .endm
-
-#elif defined(CONFIG_ARCH_NEXUSPCI)
-
- .macro disable_fiq
- .endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- ldr \irqstat, =INTCONT_BASE
- ldr \base, =soft_irq_mask
- ldr \irqstat, [\irqstat] @ get interrupts
- ldr \base, [\base]
- mov \irqnr, #0
- and \irqstat, \irqstat, \base @ mask out disabled ones
-1001: tst \irqstat, #1
- addeq \irqnr, \irqnr, #1
- moveq \irqstat, \irqstat, lsr #1
- tsteq \irqnr, #32
- beq 1001b
- teq \irqnr, #32
- .endm
-
- .macro irq_prio_table
- .ltorg
- .bss
-ENTRY(soft_irq_mask)
- .word 0
- .text
- .endm
-
-#elif defined(CONFIG_ARCH_TBOX)
-
- .macro disable_fiq
- .endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- ldr \irqstat, =0xffff7000
- ldr \irqstat, [\irqstat] @ get interrupts
- ldr \base, =soft_irq_mask
- ldr \base, [\base]
- mov \irqnr, #0
- and \irqstat, \irqstat, \base @ mask out disabled ones
-1001: tst \irqstat, #1
- addeq \irqnr, \irqnr, #1
- moveq \irqstat, \irqstat, lsr #1
- tsteq \irqnr, #32
- beq 1001b
- teq \irqnr, #32
- .endm
-
- .macro irq_prio_table
- .ltorg
- .bss
-ENTRY(soft_irq_mask)
- .word 0
- .text
- .endm
-
-#elif defined(CONFIG_ARCH_SA1100)
-
- .macro disable_fiq
- .endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- mov r4, #0xfa000000 @ ICIP = 0xfa050000
- add r4, r4, #0x00050000
- ldr \irqstat, [r4] @ get irqs
- ldr \irqnr, [r4, #4] @ ICMR = 0xfa050004
- ands \irqstat, \irqstat, \irqnr
- mov \irqnr, #0
- beq 1001f
- tst \irqstat, #0xff
- moveq \irqstat, \irqstat, lsr #8
- addeq \irqnr, \irqnr, #8
- tsteq \irqstat, #0xff
- moveq \irqstat, \irqstat, lsr #8
- addeq \irqnr, \irqnr, #8
- tsteq \irqstat, #0xff
- moveq \irqstat, \irqstat, lsr #8
- addeq \irqnr, \irqnr, #8
- tst \irqstat, #0x0f
- moveq \irqstat, \irqstat, lsr #4
- addeq \irqnr, \irqnr, #4
- tst \irqstat, #0x03
- moveq \irqstat, \irqstat, lsr #2
- addeq \irqnr, \irqnr, #2
- tst \irqstat, #0x01
- addeqs \irqnr, \irqnr, #1
-1001:
- .endm
-
- .macro irq_prio_table
- .endm
-
-#elif defined(CONFIG_ARCH_L7200)
-#include <asm/hardware.h>
-
- .equ irq_base_addr, IO_BASE_2
-
- .macro disable_fiq
- .endm
-
[%d lines skipped]
612diff -urN linux/arch/arm/kernel/entry-header.S
linux/arch/arm/kernel/entry-header.S
--- linux/arch/arm/kernel/entry-header.S 2004/08/13 07:18:51 1.11
+++ linux/arch/arm/kernel/entry-header.S 2005/01/13 14:05:18 1.12
@@ -6,6 +6,7 @@
#include <asm/errno.h>
#include <asm/hardware.h>
#include <asm/arch/irqs.h>
+#include <asm/arch/entry-macro.S>
#ifndef MODE_SVC
#define MODE_SVC 0x13
diff -urN linux/arch/arm/kernel/head.S linux/arch/arm/kernel/head.S
--- linux/arch/arm/kernel/head.S 2004/12/04 18:15:58 1.13
+++ linux/arch/arm/kernel/head.S 2005/01/13 14:05:18 1.14
@@ -14,10 +14,19 @@
#include <linux/init.h>
#include <asm/assembler.h>
+#include <asm/domain.h>
#include <asm/mach-types.h>
#include <asm/procinfo.h>
#include <asm/ptrace.h>
#include <asm/constants.h>
+#include <asm/system.h>
+
+#define PROCINFO_MMUFLAGS 8
+#define PROCINFO_INITFUNC 12
+
+#define MACHINFO_PHYSRAM 4
+#define MACHINFO_PHYSIO 8
+#define MACHINFO_PGOFFIO 12
#ifndef CONFIG_XIP_KERNEL
/*
@@ -86,17 +95,16 @@
* circumstances, zImage) is for.
*/
__INIT
- .type stext, #function
+ .type stext, %function
ENTRY(stext)
- mov r12, r0
- mov r0, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ make sure svc mode
- msr cpsr_c, r0 @ and all irqs disabled
- bl __lookup_processor_type
- teq r10, #0 @ invalid processor?
+ msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode
+ @ and irqs disabled
+ bl __lookup_processor_type @ r5=procinfo r9=cpuid
+ movs r10, r5 @ invalid processor (r5=0)?
moveq r0, #'p' @ yes, error 'p'
beq __error
- bl __lookup_architecture_type
- teq r7, #0 @ invalid architecture?
+ bl __lookup_machine_type @ r5=machinfo
+ movs r8, r5 @ invalid machine (r5=0)?
moveq r0, #'a' @ yes, error 'a'
beq __error
bl __create_page_tables
@@ -104,89 +112,128 @@
/*
* The following calls CPU specific code in a position independent
* manner. See arch/arm/mm/proc-*.S for details. r10 = base of
- * xxx_proc_info structure selected by __lookup_architecture_type
+ * xxx_proc_info structure selected by __lookup_machine_type
* above. On return, the CPU will be ready for the MMU to be
* turned on, and r0 will hold the CPU control register value.
*/
- adr lr, __turn_mmu_on @ return (PIC) address
- add pc, r10, #12
+ ldr r13, __switch_data @ address to jump to after
+ @ mmu has been enabled
+ adr lr, __enable_mmu @ return (PIC) address
+ add pc, r10, #PROCINFO_INITFUNC
.type __switch_data, %object
__switch_data:
.long __mmap_switched
- .long __data_loc @ r2
- .long __data_start @ r3
- .long __bss_start @ r4
- .long _end @ r5
- .long processor_id @ r6
- .long __machine_arch_type @ r7
- .long cr_alignment @ r8
+ .long __data_loc @ r4
+ .long __data_start @ r5
+ .long __bss_start @ r6
+ .long _end @ r7
+ .long processor_id @ r4
+ .long __machine_arch_type @ r5
+ .long cr_alignment @ r6
.long init_thread_union+8192 @ sp
/*
- * Enable the MMU. This completely changes the structure of the visible
- * memory space. You will not be able to trace execution through this.
- * If you have an enquiry about this, *please* check the linux-arm-kernel
- * mailing list archives BEFORE sending another post to the list.
- */
- .align 5
- .type __turn_mmu_on, %function
-__turn_mmu_on:
- ldr lr, __switch_data
-#ifdef CONFIG_ALIGNMENT_TRAP
- orr r0, r0, #2 @ ...........A.
-#endif
- mcr p15, 0, r0, c1, c0, 0 @ write control reg
- mrc p15, 0, r3, c0, c0, 0 @ read id reg
- mov r3, r3
- mov r3, r3
- mov pc, lr
-
-/*
* The following fragment of code is executed with the MMU on, and uses
* absolute addresses; this is not position independent.
*
- * r0 = processor control register
+ * r0 = cp#15 control register
* r1 = machine ID
* r9 = processor ID
- * r12 = value of r0 when kernel was called (currently always zero)
*/
- .align 5
+ .type __mmap_switched, %function
__mmap_switched:
- adr r2, __switch_data + 4
- ldmia r2, {r2, r3, r4, r5, r6, r7, r8, sp}
+ adr r3, __switch_data + 4
- cmp r2, r3 @ Copy data segment if needed
-1: cmpne r3, r4
- ldrne fp, [r2], #4
- strne fp, [r3], #4
+ ldmia r3!, {r4, r5, r6, r7}
+ cmp r4, r5 @ Copy data segment if needed
+1: cmpne r5, r6
+ ldrne fp, [r4], #4
+ strne fp, [r5], #4
bne 1b
mov fp, #0 @ Clear BSS (and zero fp)
-1: cmp r4, r5
- strcc fp, [r4],#4
+1: cmp r6, r7
+ strcc fp, [r6],#4
bcc 1b
- str r9, [r6] @ Save processor ID
- str r1, [r7] @ Save machine type
- bic r2, r0, #2 @ Clear 'A' bit
- stmia r8, {r0, r2} @ Save control register values
+ ldmia r3, {r4, r5, r6, sp}
+ str r9, [r4] @ Save processor ID
+ str r1, [r5] @ Save machine type
+ bic r4, r0, #CR_A @ Clear 'A' bit
+ stmia r6, {r0, r4} @ Save control register values
b start_kernel
+/*
+ * Setup common bits before finally enabling the MMU. Essentially
+ * this is just loading the page table pointer and domain access
+ * registers.
+ */
+ .type __enable_mmu, %function
+__enable_mmu:
+#ifdef CONFIG_ALIGNMENT_TRAP
+ orr r0, r0, #CR_A
+#else
+ bic r0, r0, #CR_A
+#endif
+#ifdef CONFIG_CPU_DCACHE_DISABLE
+ bic r0, r0, #CR_C
+#endif
+#ifdef CONFIG_CPU_BPREDICT_DISABLE
+ bic r0, r0, #CR_Z
+#endif
+#ifdef CONFIG_CPU_ICACHE_DISABLE
+ bic r0, r0, #CR_I
+#endif
+ mov r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
+ domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
+ domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
+ domain_val(DOMAIN_IO, DOMAIN_CLIENT))
+ mcr p15, 0, r5, c3, c0, 0 @ load domain access register
+ mcr p15, 0, r4, c2, c0, 0 @ load page table pointer
+ b __turn_mmu_on
+
+/*
+ * Enable the MMU. This completely changes the structure of the visible
+ * memory space. You will not be able to trace execution through this.
+ * If you have an enquiry about this, *please* check the linux-arm-kernel
+ * mailing list archives BEFORE sending another post to the list.
+ *
+ * r0 = cp#15 control register
+ * r13 = *virtual* address to jump to upon completion
+ *
+ * other registers depend on the function called upon completion
+ */
+ .align 5
+ .type __turn_mmu_on, %function
+__turn_mmu_on:
+ mov r0, r0
+ mcr p15, 0, r0, c1, c0, 0 @ write control reg
+ mrc p15, 0, r3, c0, c0, 0 @ read id reg
+ mov r3, r3
+ mov r3, r3
+ mov pc, r13
+
+
/*
* Setup the initial page tables. We only setup the barest
* amount which are required to get the kernel running, which
* generally means mapping in the kernel code.
*
- * r5 = physical address of start of RAM
- * r6 = physical IO address
- * r7 = byte offset into page tables for IO
- * r8 = page table flags
+ * r8 = machinfo
+ * r9 = cpuid
+ * r10 = procinfo
+ *
+ * Returns:
+ * r0, r3, r5, r6, r7 corrupted
+ * r4 = physical page table address
*/
+ .type __create_page_tables, %function
__create_page_tables:
+ ldr r5, [r8, #MACHINFO_PHYSRAM] @ physram
pgtbl r4, r5 @ page table address
/*
@@ -194,23 +241,25 @@
*/
mov r0, r4
mov r3, #0
- add r2, r0, #0x4000
+ add r6, r0, #0x4000
1: str r3, [r0], #4
str r3, [r0], #4
str r3, [r0], #4
str r3, [r0], #4
- teq r0, r2
+ teq r0, r6
bne 1b
+ ldr r7, [r10, #PROCINFO_MMUFLAGS] @ mmuflags
+
/*
* Create identity mapping for first MB of kernel to
* cater for the MMU enable. This identity mapping
* will be removed by paging_init(). We use our current program
* counter to determine corresponding section base address.
*/
- mov r2, pc, lsr #20 @ start of kernel section
- add r3, r8, r2, lsl #20 @ flags + kernel base
- str r3, [r4, r2, lsl #2] @ identity mapping
+ mov r6, pc, lsr #20 @ start of kernel section
+ orr r3, r7, r6, lsl #20 @ flags + kernel base
+ str r3, [r4, r6, lsl #2] @ identity mapping
/*
* Now setup the pagetables for our kernel direct
@@ -231,8 +280,8 @@
* Then map first 1MB of ram in case it contains our boot params.
*/
add r0, r4, #VIRT_OFFSET >> 18
- add r2, r5, r8
- str r2, [r0]
+ orr r6, r5, r7
+ str r6, [r0]
#ifdef CONFIG_XIP_KERNEL
/*
@@ -242,15 +291,15 @@
sub r3, r4, r5
mov r3, r3, lsr #20
add r0, r0, r3, lsl #2
- add r2, r2, r3, lsl #20
- str r2, [r0], #4
- add r2, r2, #(1 << 20)
- str r2, [r0], #4
- add r2, r2, #(1 << 20)
- str r2, [r0]
+ add r6, r6, r3, lsl #20
+ str r6, [r0], #4
+ add r6, r6, #(1 << 20)
+ str r6, [r0], #4
+ add r6, r6, #(1 << 20)
+ str r6, [r0]
#endif
- bic r8, r8, #0x0c @ turn off cacheable
+ bic r7, r7, #0x0c @ turn off cacheable
@ and bufferable bits
#ifdef CONFIG_DEBUG_LL
/*
@@ -258,15 +307,17 @@
* This allows debug messages to be output
* via a serial console before paging_init.
*/
- add r0, r4, r7
- rsb r3, r7, #0x4000 @ PTRS_PER_PGD*sizeof(long)
- cmp r3, #0x0800
- addge r2, r0, #0x0800
- addlt r2, r0, r3
- orr r3, r6, r8
+ ldr r3, [r8, #MACHINFO_PGOFFIO]
+ add r0, r4, r3
+ rsb r3, r3, #0x4000 @ PTRS_PER_PGD*sizeof(long)
+ cmp r3, #0x0800 @ limit to 512MB
+ movhi r3, #0x0800
+ add r6, r0, r3
+ ldr r3, [r8, #MACHINFO_PHYSIO]
+ orr r3, r3, r7
1: str r3, [r0], #4
add r3, r3, #1 << 20
- teq r0, r2
+ teq r0, r6
bne 1b
#if defined(CONFIG_ARCH_NETWINDER) || defined(CONFIG_ARCH_CATS)
/*
@@ -278,7 +329,7 @@
bne 1f
add r0, r4, #0x3fc0 @ ff000000
mov r3, #0x7c000000
- orr r3, r3, r8
+ orr r3, r3, r7
str r3, [r0], #4
add r3, r3, #1 << 20
str r3, [r0], #4
@@ -293,7 +344,7 @@
*/
add r0, r4, #0x80 @ 02000000
mov r3, #0x02000000
- orr r3, r3, r8
+ orr r3, r3, r7
str r3, [r0]
add r0, r4, #0x3600 @ d8000000
str r3, [r0]
@@ -315,6 +366,7 @@
*
* Generally, only serious errors cause this.
*/
+ .type __error, %function
__error:
#ifdef CONFIG_DEBUG_LL
mov r8, r0 @ preserve r0
@@ -340,6 +392,7 @@
b 1b
#ifdef CONFIG_DEBUG_LL
+ .type err_str, %object
err_str:
.asciz "\nError: "
.align
@@ -353,35 +406,35 @@
* calculate the offset.
*
* Returns:
- * r5, r6, r7 corrupted
- * r8 = page table flags
- * r9 = processor ID
- * r10 = pointer to processor structure
+ * r3, r6 corrupted
+ * r5 = proc_info pointer in physical address space
+ * r9 = cpuid
*/
+ .type __lookup_processor_type, %function
__lookup_processor_type:
- adr r5, 2f
- ldmia r5, {r7, r9, r10}
- sub r5, r5, r10 @ convert addresses
- add r7, r7, r5 @ to our address space
- add r10, r9, r5
+ adr r3, 3f
+ ldmda r3, {r5, r6, r9}
+ sub r3, r3, r9 @ get offset between virt&phys
+ add r5, r5, r3 @ convert virt addresses to
+ add r6, r6, r3 @ physical address space
mrc p15, 0, r9, c0, c0 @ get processor id
-1: ldmia r10, {r5, r6, r8} @ value, mask, mmuflags
- and r6, r6, r9 @ mask wanted bits
- teq r5, r6
- moveq pc, lr
- add r10, r10, #PROC_INFO_SZ @ sizeof(proc_info_list)
- cmp r10, r7
+1: ldmia r5, {r3, r10} @ value, mask
+ and r10, r10, r9 @ mask wanted bits
+ teq r3, r10
+ beq 2f
+ add r5, r5, #PROC_INFO_SZ @ sizeof(proc_info_list)
+ cmp r5, r6
blt 1b
- mov r10, #0 @ unknown processor
- mov pc, lr
+ mov r5, #0 @ unknown processor
+2: mov pc, lr
/*
* Look in include/asm-arm/procinfo.h and arch/arm/kernel/arch.[ch] for
* more information about the __proc_info and __arch_info structures.
*/
-2: .long __proc_info_end
.long __proc_info_begin
- .long 2b
+ .long __proc_info_end
+3: .long .
[%d lines skipped]
44diff -urN linux/arch/arm/kernel/setup.c linux/arch/arm/kernel/setup.c
--- linux/arch/arm/kernel/setup.c 2004/12/27 02:15:48 1.56
+++ linux/arch/arm/kernel/setup.c 2005/01/13 14:05:18 1.57
@@ -24,6 +24,7 @@
#include <linux/cpu.h>
#include <linux/interrupt.h>
+#include <asm/cpu.h>
#include <asm/elf.h>
#include <asm/hardware.h>
#include <asm/io.h>
@@ -108,6 +109,8 @@
static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l',
'?', '?', 'b' } };
#define ENDIANNESS ((char)endian_test.l)
+DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data);
+
/*
* Standard memory resources
*/
@@ -739,11 +742,15 @@
#endif
}
-static struct cpu cpu[1];
static int __init topology_init(void)
{
- return register_cpu(cpu, 0, NULL);
+ int cpu;
+
+ for_each_cpu(cpu)
+ register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu, NULL);
+
+ return 0;
}
subsys_initcall(topology_init);
@@ -784,9 +791,18 @@
seq_printf(m, "Processor\t: %s rev %d (%s)\n",
cpu_name, (int)processor_id & 15, elf_platform);
+#if defined(CONFIG_SMP)
+ for_each_online_cpu(i) {
+ seq_printf(m, "Processor\t: %d\n", i);
+ seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
+ per_cpu(cpu_data, i).loops_per_jiffy / (500000UL/HZ),
+ (per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ))
% 100);
+ }
+#else /* CONFIG_SMP */
seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
loops_per_jiffy / (500000/HZ),
(loops_per_jiffy / (5000/HZ)) % 100);
+#endif
/* dump out the processor features */
seq_puts(m, "Features\t: ");
diff -urN linux/arch/arm/mach-integrator/impd1.c
linux/arch/arm/mach-integrator/impd1.c
--- linux/arch/arm/mach-integrator/impd1.c 2004/08/24 15:10:03 1.6
+++ linux/arch/arm/mach-integrator/impd1.c 2005/01/13 14:05:18 1.7
@@ -17,6 +17,7 @@
#include <linux/init.h>
#include <linux/device.h>
#include <linux/errno.h>
+#include <linux/mm.h>
#include <asm/io.h>
#include <asm/hardware/icst525.h>
@@ -259,6 +260,17 @@
return ret;
}
+static int impd1fb_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
+{
+ unsigned long start, size;
+
+ start = vma->vm_pgoff + (fb->fb.fix.smem_start >> PAGE_SHIFT);
+ size = vma->vm_end - vma->vm_start;
+
+ return remap_pfn_range(vma, vma->vm_start, start, size,
+ vma->vm_page_prot);
+}
+
static void impd1fb_clcd_remove(struct clcd_fb *fb)
{
iounmap(fb->fb.screen_base);
@@ -272,6 +284,7 @@
.disable = impd1fb_clcd_disable,
.enable = impd1fb_clcd_enable,
.setup = impd1fb_clcd_setup,
+ .mmap = impd1fb_clcd_mmap,
.remove = impd1fb_clcd_remove,
};
diff -urN linux/arch/arm/mach-integrator/integrator_ap.c
linux/arch/arm/mach-integrator/integrator_ap.c
--- linux/arch/arm/mach-integrator/integrator_ap.c 2004/10/25 20:44:10
1.6
+++ linux/arch/arm/mach-integrator/integrator_ap.c 2005/01/13 14:05:18
1.7
@@ -68,7 +68,6 @@
* f1200000 12000000 EBI registers
* f1300000 13000000 Counter/Timer
* f1400000 14000000 Interrupt controller
- * f1500000 15000000 RTC
* f1600000 16000000 UART 0
* f1700000 17000000 UART 1
* f1a00000 1a000000 Debug LEDs
@@ -81,7 +80,6 @@
{ IO_ADDRESS(INTEGRATOR_EBI_BASE), INTEGRATOR_EBI_BASE, SZ_4K, MT_DEVICE
},
{ IO_ADDRESS(INTEGRATOR_CT_BASE), INTEGRATOR_CT_BASE, SZ_4K, MT_DEVICE
},
{ IO_ADDRESS(INTEGRATOR_IC_BASE), INTEGRATOR_IC_BASE, SZ_4K, MT_DEVICE
},
- { IO_ADDRESS(INTEGRATOR_RTC_BASE), INTEGRATOR_RTC_BASE, SZ_4K, MT_DEVICE
},
{ IO_ADDRESS(INTEGRATOR_UART0_BASE), INTEGRATOR_UART0_BASE, SZ_4K, MT_DEVICE
},
{ IO_ADDRESS(INTEGRATOR_UART1_BASE), INTEGRATOR_UART1_BASE, SZ_4K, MT_DEVICE
},
{ IO_ADDRESS(INTEGRATOR_DBG_BASE), INTEGRATOR_DBG_BASE, SZ_4K, MT_DEVICE
},
diff -urN linux/arch/arm/mach-integrator/integrator_cp.c
linux/arch/arm/mach-integrator/integrator_cp.c
--- linux/arch/arm/mach-integrator/integrator_cp.c 2004/10/25 20:44:10
1.5
+++ linux/arch/arm/mach-integrator/integrator_cp.c 2005/01/13 14:05:18
1.6
@@ -444,6 +444,14 @@
return 0;
}
+static int cp_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
+{
+ return dma_mmap_writecombine(&fb->dev->dev, vma,
+ fb->fb.screen_base,
+ fb->fb.fix.smem_start,
+ fb->fb.fix.smem_len);
+}
+
static void cp_clcd_remove(struct clcd_fb *fb)
{
dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
@@ -456,6 +464,7 @@
.decode = clcdfb_decode,
.enable = cp_clcd_enable,
.setup = cp_clcd_setup,
+ .mmap = cp_clcd_mmap,
.remove = cp_clcd_remove,
};
diff -urN linux/arch/arm/mach-integrator/time.c
linux/arch/arm/mach-integrator/time.c
--- linux/arch/arm/mach-integrator/time.c 2003/06/01 00:39:08 1.3
+++ linux/arch/arm/mach-integrator/time.c 2005/01/13 14:05:18 1.4
@@ -1,46 +1,213 @@
/*
* linux/arch/arm/mach-integrator/time.c
*
- * Copyright (C) 2000-2001 Deep Blue Solutions
+ * Copyright (C) 2000-2001 Deep Blue Solutions Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
+#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/time.h>
+#include <linux/mc146818rtc.h>
+#include <linux/interrupt.h>
#include <linux/init.h>
+#include <linux/device.h>
+#include <asm/hardware/amba.h>
#include <asm/hardware.h>
#include <asm/io.h>
+#include <asm/uaccess.h>
+#include <asm/rtc.h>
-#define RTC_DR (IO_ADDRESS(INTEGRATOR_RTC_BASE) + 0)
-#define RTC_MR (IO_ADDRESS(INTEGRATOR_RTC_BASE) + 4)
-#define RTC_STAT (IO_ADDRESS(INTEGRATOR_RTC_BASE) + 8)
-#define RTC_EOI (IO_ADDRESS(INTEGRATOR_RTC_BASE) + 8)
-#define RTC_LR (IO_ADDRESS(INTEGRATOR_RTC_BASE) + 12)
-#define RTC_CR (IO_ADDRESS(INTEGRATOR_RTC_BASE) + 16)
+#include <asm/mach/time.h>
-#define RTC_CR_MIE 0x00000001
+#define RTC_DR (0)
+#define RTC_MR (4)
+#define RTC_STAT (8)
+#define RTC_EOI (8)
+#define RTC_LR (12)
+#define RTC_CR (16)
+#define RTC_CR_MIE (1 << 0)
extern int (*set_rtc)(void);
+static void *rtc_base;
static int integrator_set_rtc(void)
{
- __raw_writel(xtime.tv_sec, RTC_LR);
+ __raw_writel(xtime.tv_sec, rtc_base + RTC_LR);
return 1;
}
-static int integrator_rtc_init(void)
+static void rtc_read_alarm(struct rtc_wkalrm *alrm)
{
- __raw_writel(0, RTC_CR);
- __raw_writel(0, RTC_EOI);
+ rtc_time_to_tm(readl(rtc_base + RTC_MR), &alrm->time);
+}
+
+static int rtc_set_alarm(struct rtc_wkalrm *alrm)
+{
+ unsigned long time;
+ int ret;
+
+ ret = rtc_tm_to_time(&alrm->time, &time);
+ if (ret == 0)
+ writel(time, rtc_base + RTC_MR);
+ return ret;
+}
+
+static void rtc_read_time(struct rtc_time *tm)
+{
+ rtc_time_to_tm(readl(rtc_base + RTC_DR), tm);
+}
+
+/*
+ * Set the RTC time. Unfortunately, we can't accurately set
+ * the point at which the counter updates.
+ *
+ * Also, since RTC_LR is transferred to RTC_CR on next rising
+ * edge of the 1Hz clock, we must write the time one second
+ * in advance.
+ */
+static int rtc_set_time(struct rtc_time *tm)
+{
+ unsigned long time;
+ int ret;
- xtime.tv_sec = __raw_readl(RTC_DR);
+ ret = rtc_tm_to_time(tm, &time);
+ if (ret == 0)
+ writel(time + 1, rtc_base + RTC_LR);
+
+ return ret;
+}
+
+static struct rtc_ops rtc_ops = {
+ .owner = THIS_MODULE,
+ .read_time = rtc_read_time,
+ .set_time = rtc_set_time,
+ .read_alarm = rtc_read_alarm,
+ .set_alarm = rtc_set_alarm,
+};
+
+static irqreturn_t rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+ writel(0, rtc_base + RTC_EOI);
+ return IRQ_HANDLED;
+}
+
+static int rtc_probe(struct amba_device *dev, void *id)
+{
+ int ret;
+
+ if (rtc_base)
+ return -EBUSY;
+
+ ret = amba_request_regions(dev, NULL);
+ if (ret)
+ goto out;
+
+ rtc_base = ioremap(dev->res.start, SZ_4K);
+ if (!rtc_base) {
+ ret = -ENOMEM;
+ goto res_out;
+ }
+
+ __raw_writel(0, rtc_base + RTC_CR);
+ __raw_writel(0, rtc_base + RTC_EOI);
+
+ xtime.tv_sec = __raw_readl(rtc_base + RTC_DR);
+
+ ret = request_irq(dev->irq[0], rtc_interrupt, SA_INTERRUPT,
+ "rtc-pl030", rtc_base);
+ if (ret)
+ goto map_out;
+
+ ret = register_rtc(&rtc_ops);
+ if (ret)
+ goto irq_out;
set_rtc = integrator_set_rtc;
+ return 0;
+
+ irq_out:
+ free_irq(dev->irq[0], rtc_base);
+ map_out:
+ iounmap(rtc_base);
+ rtc_base = NULL;
+ res_out:
+ amba_release_regions(dev);
+ out:
+ return ret;
+}
+
+static int rtc_remove(struct amba_device *dev)
+{
+ set_rtc = NULL;
+
+ writel(0, rtc_base + RTC_CR);
+
+ free_irq(dev->irq[0], rtc_base);
+ unregister_rtc(&rtc_ops);
+
+ iounmap(rtc_base);
+ rtc_base = NULL;
+ amba_release_regions(dev);
return 0;
}
-__initcall(integrator_rtc_init);
+static struct timespec rtc_delta;
+
+static int rtc_suspend(struct amba_device *dev, u32 state)
+{
+ struct timespec rtc;
+
+ rtc.tv_sec = readl(rtc_base + RTC_DR);
+ rtc.tv_nsec = 0;
+ save_time_delta(&rtc_delta, &rtc);
+
+ return 0;
+}
+
+static int rtc_resume(struct amba_device *dev)
+{
+ struct timespec rtc;
+
+ rtc.tv_sec = readl(rtc_base + RTC_DR);
+ rtc.tv_nsec = 0;
+ restore_time_delta(&rtc_delta, &rtc);
+
+ return 0;
+}
+
+static struct amba_id rtc_ids[] = {
+ {
+ .id = 0x00041030,
+ .mask = 0x000fffff,
+ },
+ { 0, 0 },
+};
+
+static struct amba_driver rtc_driver = {
+ .drv = {
+ .name = "rtc-pl030",
+ },
+ .probe = rtc_probe,
+ .remove = rtc_remove,
+ .suspend = rtc_suspend,
+ .resume = rtc_resume,
+ .id_table = rtc_ids,
+};
+
+static int __init integrator_rtc_init(void)
+{
+ return amba_driver_register(&rtc_driver);
+}
+
+static void __exit integrator_rtc_exit(void)
+{
+ amba_driver_unregister(&rtc_driver);
+}
+
+module_init(integrator_rtc_init);
+module_exit(integrator_rtc_exit);
diff -urN linux/arch/arm/mach-iop3xx/iq80332-mm.c
linux/arch/arm/mach-iop3xx/iq80332-mm.c
--- linux/arch/arm/mach-iop3xx/iq80332-mm.c 1970/01/01 00:00:00
+++ linux/arch/arm/mach-iop3xx/iq80332-mm.c Thu Jan 13 14:05:18 2005
1.1
@@ -0,0 +1,36 @@
+/*
+ * linux/arch/arm/mach-iop3xx/mm.c
+ *
+ * Low level memory initialization for iq80332 platform
+ *
+ * Author: Dave Jiang <dave.jiang@intel.com>
+ * Copyright (C) 2004 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include <linux/mm.h>
+#include <linux/init.h>
+
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+
+
+/*
+ * IQ80332 specific IO mappings
+ *
+ * We use RedBoot's setup for the onboard devices.
+ */
+
+void __init iq80332_map_io(void)
+{
+ iop331_map_io();
+}
diff -urN linux/arch/arm/mach-iop3xx/iq80332-pci.c
linux/arch/arm/mach-iop3xx/iq80332-pci.c
--- linux/arch/arm/mach-iop3xx/iq80332-pci.c 1970/01/01 00:00:00
+++ linux/arch/arm/mach-iop3xx/iq80332-pci.c Thu Jan 13 14:05:18 2005
1.1
@@ -0,0 +1,128 @@
+/*
+ * arch/arm/mach-iop3xx/iq80332-pci.c
+ *
+ * PCI support for the Intel IQ80332 reference board
+ *
+ * Author: Dave Jiang <dave.jiang@intel.com>
+ * Copyright (C) 2004 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/mach/pci.h>
+#include <asm/mach-types.h>
+
+/*
+ * The following macro is used to lookup irqs in a standard table
+ * format for those systems that do not already have PCI
+ * interrupts properly routed. We assume 1 <= pin <= 4
+ */
+#define PCI_IRQ_TABLE_LOOKUP(minid,maxid) \
+({ int _ctl_ = -1; \
+ unsigned int _idsel = idsel - minid; \
+ if (_idsel <= maxid) \
+ _ctl_ = pci_irq_table[_idsel][pin-1]; \
+ _ctl_; })
+
+#define INTA IRQ_IQ80332_INTA
+#define INTB IRQ_IQ80332_INTB
+#define INTC IRQ_IQ80332_INTC
+#define INTD IRQ_IQ80332_INTD
+
+//#define INTE IRQ_IQ80332_I82544
+
+static inline int __init
+iq80332_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
+{
+ static int pci_irq_table[][8] = {
+ /*
+ * PCI IDSEL/INTPIN->INTLINE
+ * A B C D
+ */
+ {-1, -1, -1, -1},
+ {-1, -1, -1, -1},
+ {-1, -1, -1, -1},
+ {INTA, INTB, INTC, INTD}, /* PCI-X Slot */
+ {-1, -1, -1, -1},
+ {INTC, INTC, INTC, INTC}, /* GigE */
+ {-1, -1, -1, -1},
+ {-1, -1, -1, -1},
+ };
+
+ BUG_ON(pin < 1 || pin > 4);
+
+ return PCI_IRQ_TABLE_LOOKUP(1, 7);
+}
+
+static int iq80332_setup(int nr, struct pci_sys_data *sys)
+{
+ struct resource *res;
+
+ if(nr != 0)
+ return 0;
+
+ res = kmalloc(sizeof(struct resource) * 2, GFP_KERNEL);
+ if (!res)
+ panic("PCI: unable to alloc resources");
+
+ memset(res, 0, sizeof(struct resource) * 2);
+
+ res[0].start = IOP331_PCI_LOWER_IO_BA + IOP331_PCI_IO_OFFSET;
+ res[0].end = IOP331_PCI_UPPER_IO_BA + IOP331_PCI_IO_OFFSET;
+ res[0].name = "IQ80332 PCI I/O Space";
+ res[0].flags = IORESOURCE_IO;
+
+ res[1].start = IOP331_PCI_LOWER_MEM_BA + IOP331_PCI_MEM_OFFSET;
+ res[1].end = IOP331_PCI_UPPER_MEM_BA + IOP331_PCI_MEM_OFFSET;
+ res[1].name = "IQ80332 PCI Memory Space";
+ res[1].flags = IORESOURCE_MEM;
+
+ request_resource(&ioport_resource, &res[0]);
+ request_resource(&iomem_resource, &res[1]);
+
+ sys->mem_offset = IOP331_PCI_MEM_OFFSET;
+ sys->io_offset = IOP331_PCI_IO_OFFSET;
+
+ sys->resource[0] = &res[0];
+ sys->resource[1] = &res[1];
+ sys->resource[2] = NULL;
+
+ iop3xx_pcibios_min_io = IOP331_PCI_LOWER_IO_VA;
+ iop3xx_pcibios_min_mem = IOP331_PCI_LOWER_MEM_VA;
+
+ return 1;
+}
+
+static void iq80332_preinit(void)
+{
+ iop331_init();
+}
+
+static struct hw_pci iq80332_pci __initdata = {
+ .swizzle = pci_std_swizzle,
+ .nr_controllers = 1,
+ .setup = iq80332_setup,
+ .scan = iop331_scan_bus,
+ .preinit = iq80332_preinit,
+ .map_irq = iq80332_map_irq
+};
+
+static int __init iq80332_pci_init(void)
+{
+ if (machine_is_iq80332())
+ pci_common_init(&iq80332_pci);
+ return 0;
+}
+
+subsys_initcall(iq80332_pci_init);
+
+
+
+
diff -urN linux/arch/arm/mach-iop3xx/Kconfig linux/arch/arm/mach-iop3xx/Kconfig
--- linux/arch/arm/mach-iop3xx/Kconfig 2004/09/19 12:30:02 1.4
+++ linux/arch/arm/mach-iop3xx/Kconfig 2005/01/13 14:05:18 1.5
@@ -25,6 +25,13 @@
Say Y here if you want to run your kernel on the Intel IQ80331
evaluation kit for the IOP331 chipset.
+config MACH_IQ80332
+ bool "Enable support for IQ80332"
+ select ARCH_IOP331
+ help
+ Say Y here if you want to run your kernel on the Intel IQ80332
+ evaluation kit for the IOP332 chipset
+
config ARCH_EP80219
bool "Enable support for EP80219"
select ARCH_IOP321
@@ -41,10 +48,16 @@
bool
default ARCH_IQ80331
help
- The IQ80331 uses the IOP331 variant.
+ The IQ80331, IQ80332, and IQ80333 uses the IOP331 variant.
comment "IOP3xx Chipset Features"
-endmenu
+config IOP331_STEPD
+ bool "Chip stepping D of the IOP80331 processor or IOP80333"
+ depends on (ARCH_IOP331)
+ help
+ Say Y here if you have StepD of the IOP80331 or IOP8033
+ based platforms.
+endmenu
endif
diff -urN linux/arch/arm/mach-iop3xx/Makefile
linux/arch/arm/mach-iop3xx/Makefile
--- linux/arch/arm/mach-iop3xx/Makefile 2004/11/15 11:49:14 1.4
+++ linux/arch/arm/mach-iop3xx/Makefile 2005/01/13 14:05:18 1.5
@@ -19,3 +19,5 @@
obj-$(CONFIG_ARCH_IQ31244) += iq31244-mm.o iq31244-pci.o
obj-$(CONFIG_ARCH_IQ80331) += iq80331-mm.o iq80331-pci.o
+
+obj-$(CONFIG_MACH_IQ80332) += iq80332-mm.o iq80332-pci.o
diff -urN linux/arch/arm/mach-iop3xx/iop321-pci.c
linux/arch/arm/mach-iop3xx/iop321-pci.c
--- linux/arch/arm/mach-iop3xx/iop321-pci.c 2004/09/19 12:30:02 1.3
+++ linux/arch/arm/mach-iop3xx/iop321-pci.c 2005/01/13 14:05:18 1.4
@@ -197,14 +197,6 @@
void iop321_init(void)
{
-#if CONFIG_ARCH_EP80219
- *IOP321_ATUCR = 0x2;
- *IOP321_OIOWTVR = 0x90000000;
- *IOP321_IABAR0 = 0x00000004;
- *IOP321_IABAR2 = 0xa000000c;
- *IOP321_IALR2 = 0xe0000000;
-#endif
-
DBG("PCI: Intel 80321 PCI init code.\n");
DBG("\tATU: IOP321_ATUCMD=0x%04x\n", *IOP321_ATUCMD);
DBG("\tATU: IOP321_OMWTVR0=0x%04x, IOP321_OIOWTVR=0x%04x\n",
diff -urN linux/arch/arm/mach-iop3xx/iop321-setup.c
linux/arch/arm/mach-iop3xx/iop321-setup.c
--- linux/arch/arm/mach-iop3xx/iop321-setup.c 2004/11/15 11:49:14 1.3
+++ linux/arch/arm/mach-iop3xx/iop321-setup.c 2005/01/13 14:05:18 1.4
@@ -3,6 +3,7 @@
*
* Author: Nicolas Pitre <nico@cam.org>
* Copyright (C) 2001 MontaVista Software, Inc.
+ * Copyright (C) 2004 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -40,10 +41,10 @@
/* virtual physical length type */
/* mem mapped registers */
- { IOP321_VIRT_MEM_BASE, IOP321_PHY_MEM_BASE, 0x00002000, MT_DEVICE },
+ { IOP321_VIRT_MEM_BASE, IOP321_PHYS_MEM_BASE, 0x00002000, MT_DEVICE },
/* PCI IO space */
- { 0xfe000000, 0x90000000, 0x00020000, MT_DEVICE }
+ { IOP321_PCI_LOWER_IO_VA, IOP321_PCI_LOWER_IO_PA,
IOP321_PCI_IO_WINDOW_SIZE, MT_DEVICE }
};
#ifdef CONFIG_ARCH_IQ80321
@@ -71,6 +72,60 @@
}
};
+static struct resource iop32x_i2c_0_resources[] = {
+ [0] = {
+ .start = 0xfffff680,
+ .end = 0xfffff698,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_IOP321_I2C_0,
+ .end = IRQ_IOP321_I2C_0,
+ .flags = IORESOURCE_IRQ
+ }
+};
+
+static struct resource iop32x_i2c_1_resources[] = {
+ [0] = {
+ .start = 0xfffff6a0,
+ .end = 0xfffff6b8,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_IOP321_I2C_1,
+ .end = IRQ_IOP321_I2C_1,
+ .flags = IORESOURCE_IRQ
+ }
+};
+
+static struct platform_device iop32x_i2c_0_controller = {
+ .name = "IOP3xx-I2C",
+ .id = 0,
+ .num_resources = 2,
+ .resource = iop32x_i2c_0_resources
+};
+
+static struct platform_device iop32x_i2c_1_controller = {
+ .name = "IOP3xx-I2C",
+ .id = 1,
+ .num_resources = 2,
+ .resource = iop32x_i2c_1_resources
+};
+
+static struct platform_device *iop32x_devices[] __initdata = {
+ &iop32x_i2c_0_controller,
+ &iop32x_i2c_1_controller
+};
+
+void __init iop32x_init(void)
+{
+ if(iop_is_321())
+ {
+ platform_add_devices(iop32x_devices,
+ ARRAY_SIZE(iop32x_devices));
+ }
+}
+
void __init iop321_map_io(void)
{
iotable_init(iop321_std_desc, ARRAY_SIZE(iop321_std_desc));
@@ -97,6 +152,7 @@
INITIRQ(iop321_init_irq)
.timer = &iop321_timer,
BOOT_PARAMS(0xa0000100)
+ INIT_MACHINE(iop32x_init)
MACHINE_END
#elif defined(CONFIG_ARCH_IQ31244)
MACHINE_START(IQ31244, "Intel IQ31244")
@@ -106,6 +162,7 @@
INITIRQ(iop321_init_irq)
.timer = &iop321_timer,
BOOT_PARAMS(0xa0000100)
+ INIT_MACHINE(iop32x_init)
MACHINE_END
#else
#error No machine descriptor defined for this IOP3XX implementation
diff -urN linux/arch/arm/mach-iop3xx/iop331-pci.c
linux/arch/arm/mach-iop3xx/iop331-pci.c
--- linux/arch/arm/mach-iop3xx/iop331-pci.c 2004/10/12 14:36:31 1.2
+++ linux/arch/arm/mach-iop3xx/iop331-pci.c 2005/01/13 14:05:18 1.3
@@ -4,7 +4,7 @@
* PCI support for the Intel IOP331 chipset
*
* Author: Dave Jiang (dave.jiang@intel.com)
- * Copyright (C) 2003 Intel Corp.
+ * Copyright (C) 2003, 2004 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -26,7 +26,8 @@
#include <asm/arch/iop331.h>
-//#define DEBUG
+#undef DEBUG
+#undef DEBUG1
#ifdef DEBUG
#define DBG(x...) printk(x)
@@ -34,6 +35,12 @@
#define DBG(x...) do { } while (0)
#endif
+#ifdef DEBUG1
+#define DBG1(x...) printk(x)
+#else
+#define DBG1(x...) do { } while (0)
+#endif
+
/*
* This routine builds either a type0 or type1 configuration command. If the
* bus is on the 80331 then a type0 made, else a type1 is created.
@@ -197,21 +204,19 @@
void iop331_init(void)
{
- DBG("PCI: Intel 80331 PCI init code.\n");
- DBG("\tATU: IOP331_ATUCMD=0x%04x\n", *IOP331_ATUCMD);
- DBG("\tATU: IOP331_OMWTVR0=0x%04x, IOP331_OIOWTVR=0x%04x\n",
+ DBG1("PCI: Intel 80331 PCI init code.\n");
+ DBG1("\tATU: IOP331_ATUCMD=0x%04x\n", *IOP331_ATUCMD);
+ DBG1("\tATU: IOP331_OMWTVR0=0x%04x, IOP331_OIOWTVR=0x%04x\n",
*IOP331_OMWTVR0,
*IOP331_OIOWTVR);
- DBG("\tATU: IOP331_ATUCR=0x%08x\n", *IOP331_ATUCR);
- DBG("\tATU: IOP331_IABAR0=0x%08x IOP331_IALR0=0x%08x
IOP331_IATVR0=%08x\n", *IOP331_IABAR0, *IOP331_IALR0, *IOP331_IATVR0);
- DBG("\tATU: IOP331_ERBAR=0x%08x IOP331_ERLR=0x%08x
IOP331_ERTVR=%08x\n", *IOP331_ERBAR, *IOP331_ERLR, *IOP331_ERTVR);
- DBG("\tATU: IOP331_IABAR2=0x%08x IOP331_IALR2=0x%08x
IOP331_IATVR2=%08x\n", *IOP331_IABAR2, *IOP331_IALR2, *IOP331_IATVR2);
- DBG("\tATU: IOP331_IABAR3=0x%08x IOP331_IALR3=0x%08x
IOP331_IATVR3=%08x\n", *IOP331_IABAR3, *IOP331_IALR3, *IOP331_IATVR3);
-
- /* redboot changed, reset IABAR0 to something sane */
- /* fixes master aborts in plugged in cards */
- /* will clean up later and work nicely with redboot */
- *IOP331_IABAR0 = 0x00000004;
+ DBG1("\tATU: IOP331_OMWTVR1=0x%04x\n", *IOP331_OMWTVR1);
+ DBG1("\tATU: IOP331_ATUCR=0x%08x\n", *IOP331_ATUCR);
+ DBG1("\tATU: IOP331_IABAR0=0x%08x IOP331_IALR0=0x%08x
IOP331_IATVR0=%08x\n", *IOP331_IABAR0, *IOP331_IALR0, *IOP331_IATVR0);
+ DBG1("\tATU: IOP31_IABAR1=0x%08x IOP331_IALR1=0x%08x\n",
*IOP331_IABAR1, *IOP331_IALR1);
+ DBG1("\tATU: IOP331_ERBAR=0x%08x IOP331_ERLR=0x%08x
IOP331_ERTVR=%08x\n", *IOP331_ERBAR, *IOP331_ERLR, *IOP331_ERTVR);
+ DBG1("\tATU: IOP331_IABAR2=0x%08x IOP331_IALR2=0x%08x
IOP331_IATVR2=%08x\n", *IOP331_IABAR2, *IOP331_IALR2, *IOP331_IATVR2);
+ DBG1("\tATU: IOP331_IABAR3=0x%08x IOP331_IALR3=0x%08x
IOP331_IATVR3=%08x\n", *IOP331_IABAR3, *IOP331_IALR3, *IOP331_IATVR3);
+
hook_fault_code(16+6, iop331_pci_abort, SIGBUS, "imprecise external
abort");
}
diff -urN linux/arch/arm/mach-iop3xx/iop331-setup.c
linux/arch/arm/mach-iop3xx/iop331-setup.c
--- linux/arch/arm/mach-iop3xx/iop331-setup.c 2004/11/15 11:49:14 1.3
+++ linux/arch/arm/mach-iop3xx/iop331-setup.c 2005/01/13 14:05:18 1.4
@@ -12,6 +12,7 @@
#include <linux/mm.h>
#include <linux/init.h>
#include <linux/config.h>
+#include <linux/init.h>
#include <linux/major.h>
#include <linux/fs.h>
#include <linux/device.h>
@@ -42,13 +43,13 @@
{ IOP331_VIRT_MEM_BASE, IOP331_PHYS_MEM_BASE, 0x00002000, MT_DEVICE },
/* PCI IO space */
- { 0xfe000000, 0x90000000, 0x00020000, MT_DEVICE }
+ { IOP331_PCI_LOWER_IO_VA, IOP331_PCI_LOWER_IO_PA,
IOP331_PCI_IO_WINDOW_SIZE, MT_DEVICE }
};
static struct uart_port iop331_serial_ports[] = {
{
- .membase = (char*)(IQ80331_UART0_VIRT),
- .mapbase = (IQ80331_UART0_PHYS),
+ .membase = (char*)(IOP331_UART0_VIRT),
+ .mapbase = (IOP331_UART0_PHYS),
.irq = IRQ_IOP331_UART0,
.flags = UPF_SKIP_TEST,
.iotype = UPIO_MEM,
@@ -58,8 +59,8 @@
.type = PORT_XSCALE,
.fifosize = 32
} , {
- .membase = (char*)(IQ80331_UART1_VIRT),
- .mapbase = (IQ80331_UART1_PHYS),
+ .membase = (char*)(IOP331_UART1_VIRT),
+ .mapbase = (IOP331_UART1_PHYS),
.irq = IRQ_IOP331_UART1,
.flags = UPF_SKIP_TEST,
.iotype = UPIO_MEM,
@@ -71,6 +72,60 @@
}
};
+static struct resource iop33x_i2c_0_resources[] = {
+ [0] = {
+ .start = 0xfffff680,
+ .end = 0xfffff698,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_IOP331_I2C_0,
+ .end = IRQ_IOP331_I2C_0,
+ .flags = IORESOURCE_IRQ
+ }
+};
+
+static struct resource iop33x_i2c_1_resources[] = {
+ [0] = {
+ .start = 0xfffff6a0,
+ .end = 0xfffff6b8,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_IOP331_I2C_1,
+ .end = IRQ_IOP331_I2C_1,
+ .flags = IORESOURCE_IRQ
+ }
+};
+
+static struct platform_device iop33x_i2c_0_controller = {
+ .name = "IOP3xx-I2C",
+ .id = 0,
+ .num_resources = 2,
+ .resource = iop33x_i2c_0_resources
+};
+
+static struct platform_device iop33x_i2c_1_controller = {
+ .name = "IOP3xx-I2C",
+ .id = 1,
+ .num_resources = 2,
+ .resource = iop33x_i2c_1_resources
+};
+
+static struct platform_device *iop33x_devices[] __initdata = {
+ &iop33x_i2c_0_controller,
+ &iop33x_i2c_1_controller
+};
+
+void __init iop33x_init(void)
+{
+ if(iop_is_331())
+ {
+ platform_add_devices(iop33x_devices,
+ ARRAY_SIZE(iop33x_devices));
+ }
+}
+
void __init iop331_map_io(void)
{
iotable_init(iop331_std_desc, ARRAY_SIZE(iop331_std_desc));
@@ -78,22 +133,43 @@
early_serial_setup(&iop331_serial_ports[1]);
}
-#ifdef CONFIG_ARCH_IQ80331
+#ifdef CONFIG_ARCH_IOP331
extern void iop331_init_irq(void);
extern struct sys_timer iop331_timer;
+#endif
+
+#ifdef CONFIG_ARCH_IQ80331
extern void iq80331_map_io(void);
#endif
+#ifdef CONFIG_MACH_IQ80332
+extern void iq80332_map_io(void);
+#endif
+
#if defined(CONFIG_ARCH_IQ80331)
MACHINE_START(IQ80331, "Intel IQ80331")
MAINTAINER("Intel Corp.")
BOOT_MEM(PHYS_OFFSET, 0xfefff000, 0xfffff000) // virtual, physical
- //BOOT_MEM(PHYS_OFFSET, IQ80331_UART0_VIRT, IQ80331_UART0_PHYS)
+ //BOOT_MEM(PHYS_OFFSET, IOP331_UART0_VIRT, IOP331_UART0_PHYS)
MAPIO(iq80331_map_io)
INITIRQ(iop331_init_irq)
- .timer = &iop331_timer,
+ .timer = &iop331_timer,
BOOT_PARAMS(0x0100)
+ INIT_MACHINE(iop33x_init)
MACHINE_END
+
+#elif defined(CONFIG_MACH_IQ80332)
+MACHINE_START(IQ80332, "Intel IQ80332")
+ MAINTAINER("Intel Corp.")
+ BOOT_MEM(PHYS_OFFSET, 0xfefff000, 0xfffff000) // virtual, physical
+ //BOOT_MEM(PHYS_OFFSET, IOP331_UART0_VIRT, IOP331_UART0_PHYS)
+ MAPIO(iq80332_map_io)
+ INITIRQ(iop331_init_irq)
+ .timer = &iop331_timer,
+ BOOT_PARAMS(0x0100)
+ INIT_MACHINE(iop33x_init)
+MACHINE_END
+
#else
#error No machine descriptor defined for this IOP3XX implementation
#endif
diff -urN linux/arch/arm/mach-iop3xx/iq31244-pci.c
linux/arch/arm/mach-iop3xx/iq31244-pci.c
--- linux/arch/arm/mach-iop3xx/iq31244-pci.c 2004/09/19 12:30:02 1.1
+++ linux/arch/arm/mach-iop3xx/iq31244-pci.c 2005/01/13 14:05:18 1.2
@@ -5,6 +5,7 @@
*
* Author: Rory Bolt <rorybolt@pacbell.net>
* Copyright (C) 2002 Rory Bolt
+ * Copyright (C) 2004 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -77,28 +78,28 @@
memset(res, 0, sizeof(struct resource) * 2);
- res[0].start = IQ31244_PCI_IO_BASE + 0x6e000000;
- res[0].end = IQ31244_PCI_IO_BASE + IQ31244_PCI_IO_SIZE - 1 +
IQ31244_PCI_IO_OFFSET;
+ res[0].start = IOP321_PCI_LOWER_IO_BA + IOP321_PCI_IO_OFFSET;
+ res[0].end = IOP321_PCI_UPPER_IO_BA + IOP321_PCI_IO_OFFSET;
res[0].name = "IQ31244 PCI I/O Space";
res[0].flags = IORESOURCE_IO;
- res[1].start = IQ31244_PCI_MEM_BASE;
- res[1].end = IQ31244_PCI_MEM_BASE + IQ31244_PCI_MEM_SIZE;
+ res[1].start = IOP321_PCI_LOWER_MEM_BA + IOP321_PCI_MEM_OFFSET;
+ res[1].end = IOP321_PCI_UPPER_MEM_BA + IOP321_PCI_MEM_OFFSET;
res[1].name = "IQ31244 PCI Memory Space";
res[1].flags = IORESOURCE_MEM;
request_resource(&ioport_resource, &res[0]);
request_resource(&iomem_resource, &res[1]);
+ sys->mem_offset = IOP321_PCI_MEM_OFFSET;
+ sys->io_offset = IOP321_PCI_IO_OFFSET;
+
sys->resource[0] = &res[0];
sys->resource[1] = &res[1];
sys->resource[2] = NULL;
- sys->io_offset = IQ31244_PCI_IO_OFFSET;
- sys->mem_offset = IQ80321_PCI_MEM_BASE -
- (*IOP321_IABAR1 & PCI_BASE_ADDRESS_MEM_MASK);
- iop3xx_pcibios_min_io = IQ31244_PCI_IO_BASE;
- iop3xx_pcibios_min_mem = IQ31244_PCI_MEM_BASE;
+ iop3xx_pcibios_min_io = IOP321_PCI_LOWER_IO_VA;
+ iop3xx_pcibios_min_mem = IOP321_PCI_LOWER_MEM_VA;
return 1;
}
@@ -106,9 +107,6 @@
static void iq31244_preinit(void)
{
iop321_init();
- /* setting up the second translation window */
- *IOP321_OMWTVR1 = IQ31244_PCI_MEM_BASE + 0x04000000;
- *IOP321_OUMWTVR1 = 0x0;
}
static struct hw_pci iq31244_pci __initdata = {
diff -urN linux/arch/arm/mach-iop3xx/iq80321-pci.c
linux/arch/arm/mach-iop3xx/iq80321-pci.c
--- linux/arch/arm/mach-iop3xx/iq80321-pci.c 2004/09/19 12:30:02 1.2
+++ linux/arch/arm/mach-iop3xx/iq80321-pci.c 2005/01/13 14:05:18 1.3
@@ -5,6 +5,7 @@
*
* Author: Rory Bolt <rorybolt@pacbell.net>
* Copyright (C) 2002 Rory Bolt
+ * Copyright (C) 2004 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -71,44 +72,28 @@
memset(res, 0, sizeof(struct resource) * 2);
- res[0].start = IQ80321_PCI_IO_BASE + IQ80321_PCI_IO_OFFSET;
- res[0].end = IQ80321_PCI_IO_BASE + IQ80321_PCI_IO_SIZE - 1 +
IQ80321_PCI_IO_OFFSET;
+ res[0].start = IOP321_PCI_LOWER_IO_BA + IOP321_PCI_IO_OFFSET;
+ res[0].end = IOP321_PCI_UPPER_IO_BA + IOP321_PCI_IO_OFFSET;
res[0].name = "IQ80321 PCI I/O Space";
res[0].flags = IORESOURCE_IO;
- res[1].start = IQ80321_PCI_MEM_BASE;
- res[1].end = IQ80321_PCI_MEM_BASE + IQ80321_PCI_MEM_SIZE;
+ res[1].start = IOP321_PCI_LOWER_MEM_BA + IOP321_PCI_MEM_OFFSET;
+ res[1].end = IOP321_PCI_UPPER_MEM_BA + IOP321_PCI_MEM_OFFSET;
res[1].name = "IQ80321 PCI Memory Space";
res[1].flags = IORESOURCE_MEM;
request_resource(&ioport_resource, &res[0]);
request_resource(&iomem_resource, &res[1]);
- /*
- * Since the IQ80321 is a slave card on a PCI backplane,
- * it uses BAR1 to reserve a portion of PCI memory space for
- * use with the private devices on the secondary bus
- * (GigE and PCI-X slot). We read BAR1 and configure
- * our outbound translation windows to target that
- * address range and assign all devices in that
- * address range. W/O this, certain BIOSes will fail
- * to boot as the IQ80321 claims addresses that are
- * in use by other devices.
- *
- * Note that the same cannot be done with I/O space,
- * so hopefully the host will stick to the lower 64K for
- * PCI I/O and leave us alone.
- */
- sys->mem_offset = IQ80321_PCI_MEM_BASE -
- (*IOP321_IABAR1 & PCI_BASE_ADDRESS_MEM_MASK);
+ sys->mem_offset = IOP321_PCI_MEM_OFFSET;
+ sys->io_offset = IOP321_PCI_IO_OFFSET;
sys->resource[0] = &res[0];
sys->resource[1] = &res[1];
sys->resource[2] = NULL;
- sys->io_offset = IQ80321_PCI_IO_OFFSET;
- iop3xx_pcibios_min_io = IQ80321_PCI_IO_BASE;
- iop3xx_pcibios_min_mem = IQ80321_PCI_MEM_BASE;
+ iop3xx_pcibios_min_io = IOP321_PCI_LOWER_IO_VA;
+ iop3xx_pcibios_min_mem = IOP321_PCI_LOWER_MEM_VA;
return 1;
}
diff -urN linux/arch/arm/mach-iop3xx/iq80331-pci.c
linux/arch/arm/mach-iop3xx/iq80331-pci.c
--- linux/arch/arm/mach-iop3xx/iq80331-pci.c 2004/09/19 12:30:02 1.1
+++ linux/arch/arm/mach-iop3xx/iq80331-pci.c 2005/01/13 14:05:18 1.2
@@ -4,7 +4,7 @@
* PCI support for the Intel IQ80331 reference board
*
* Author: Dave Jiang <dave.jiang@intel.com>
- * Copyright (C) 2003 Intel Corp.
+ * Copyright (C) 2003, 2004 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -68,44 +68,28 @@
memset(res, 0, sizeof(struct resource) * 2);
- res[0].start = IQ80331_PCI_IO_BASE + 0x6e000000;
- res[0].end = IQ80331_PCI_IO_BASE + IQ80331_PCI_IO_SIZE - 1 +
IQ80331_PCI_IO_OFFSET;
+ res[0].start = IOP331_PCI_LOWER_IO_BA + IOP331_PCI_IO_OFFSET;
+ res[0].end = IOP331_PCI_UPPER_IO_BA + IOP331_PCI_IO_OFFSET;
res[0].name = "IQ80331 PCI I/O Space";
res[0].flags = IORESOURCE_IO;
- res[1].start = IQ80331_PCI_MEM_BASE;
- res[1].end = IQ80331_PCI_MEM_BASE + IQ80331_PCI_MEM_SIZE;
+ res[1].start = IOP331_PCI_LOWER_MEM_BA + IOP331_PCI_MEM_OFFSET;
+ res[1].end = IOP331_PCI_UPPER_MEM_BA + IOP331_PCI_MEM_OFFSET;
res[1].name = "IQ80331 PCI Memory Space";
res[1].flags = IORESOURCE_MEM;
request_resource(&ioport_resource, &res[0]);
request_resource(&iomem_resource, &res[1]);
- /*
- * Since the IQ80331 is a slave card on a PCI backplane,
- * it uses BAR1 to reserve a portion of PCI memory space for
- * use with the private devices on the secondary bus
- * (GigE and PCI-X slot). We read BAR1 and configure
- * our outbound translation windows to target that
- * address range and assign all devices in that
- * address range. W/O this, certain BIOSes will fail
- * to boot as the IQ80331 claims addresses that are
- * in use by other devices.
- *
- * Note that the same cannot be done with I/O space,
- * so hopefully the host will stick to the lower 64K for
- * PCI I/O and leave us alone.
- */
- sys->mem_offset = IQ80331_PCI_MEM_BASE -
- (*IOP331_IABAR1 & PCI_BASE_ADDRESS_MEM_MASK);
+ sys->mem_offset = IOP331_PCI_MEM_OFFSET;
+ sys->io_offset = IOP331_PCI_IO_OFFSET;
sys->resource[0] = &res[0];
sys->resource[1] = &res[1];
sys->resource[2] = NULL;
- sys->io_offset = IQ80331_PCI_IO_OFFSET;
- iop3xx_pcibios_min_io = IQ80331_PCI_IO_BASE;
- iop3xx_pcibios_min_mem = IQ80331_PCI_MEM_BASE;
+ iop3xx_pcibios_min_io = IOP331_PCI_LOWER_IO_VA;
+ iop3xx_pcibios_min_mem = IOP331_PCI_LOWER_MEM_VA;
return 1;
}
diff -urN linux/arch/arm/mach-ixp2000/core.c linux/arch/arm/mach-ixp2000/core.c
--- linux/arch/arm/mach-ixp2000/core.c 2004/12/04 18:15:58 1.4
+++ linux/arch/arm/mach-ixp2000/core.c 2005/01/13 14:05:18 1.5
@@ -167,15 +167,28 @@
*************************************************************************/
static unsigned ticks_per_jiffy;
static unsigned ticks_per_usec;
+static unsigned next_jiffy_time;
unsigned long ixp2000_gettimeoffset (void)
{
- unsigned long elapsed;
+ unsigned long elapsed1, elapsed2, pending;
+ unsigned long offset;
- /* Get ticks since last perfect jiffy */
- elapsed = ticks_per_jiffy - *IXP2000_T1_CSR;
+ elapsed1 = *IXP2000_T1_CSR;
+ pending = (*IXP2000_IRQ_STATUS & IRQ_MASK_TIMER1);
+ elapsed2 = *IXP2000_T1_CSR;
+
+ offset = ticks_per_jiffy - elapsed2;
+
+ /*
+ * We have two cases to cover, one where we were pending
+ * already, and another where it overflowed while we were
+ * checking the timers.
+ */
+ if ((elapsed2 > elapsed1) || pending)
+ offset += ticks_per_jiffy;
- return elapsed / ticks_per_usec;
+ return offset / ticks_per_usec;
}
static int ixp2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
@@ -185,7 +198,10 @@
/* clear timer 1 */
ixp2000_reg_write(IXP2000_T1_CLR, 1);
- timer_tick(regs);
+ while ((next_jiffy_time - *IXP2000_T4_CSR) > ticks_per_jiffy) {
+ timer_tick(regs);
+ next_jiffy_time -= ticks_per_jiffy;
+ }
write_sequnlock(&xtime_lock);
@@ -201,7 +217,7 @@
void __init ixp2000_init_time(unsigned long tick_rate)
{
ixp2000_reg_write(IXP2000_T1_CLR, 0);
- ixp2000_reg_write(IXP2000_T2_CLR, 0);
+ ixp2000_reg_write(IXP2000_T4_CLR, 0);
ticks_per_jiffy = (tick_rate + HZ/2) / HZ;
ticks_per_usec = tick_rate / 1000000;
@@ -209,6 +225,13 @@
ixp2000_reg_write(IXP2000_T1_CLD, ticks_per_jiffy);
ixp2000_reg_write(IXP2000_T1_CTL, (1 << 7));
+ /*
+ * We use T4 as a monotonic counter to track missed jiffies
+ */
+ ixp2000_reg_write(IXP2000_T4_CLD, -1);
+ ixp2000_reg_write(IXP2000_T4_CTL, (1 << 7));
+ next_jiffy_time = 0xffffffff - ticks_per_jiffy;
+
/* register for interrupt */
setup_irq(IRQ_IXP2000_TIMER1, &ixp2000_timer_irq);
}
diff -urN linux/arch/arm/mach-ixp2000/enp2611.c
linux/arch/arm/mach-ixp2000/enp2611.c
--- linux/arch/arm/mach-ixp2000/enp2611.c 2004/11/15 11:49:14 1.3
+++ linux/arch/arm/mach-ixp2000/enp2611.c 2005/01/13 14:05:18 1.4
@@ -57,7 +57,7 @@
ixp2000_init_time(50 * 1000 * 1000);
}
-static struct enp2611_timer = {
+static struct sys_timer enp2611_timer = {
.init = enp2611_timer_init,
.offset = ixp2000_gettimeoffset,
};
diff -urN linux/arch/arm/mach-ixp2000/ixdp2400.c
linux/arch/arm/mach-ixp2000/ixdp2400.c
--- linux/arch/arm/mach-ixp2000/ixdp2400.c 2004/11/15 11:49:14 1.3
+++ linux/arch/arm/mach-ixp2000/ixdp2400.c 2005/01/13 14:05:18 1.4
@@ -56,7 +56,7 @@
ixp2000_init_time(((3125000 * numerator) / (denominator)) / 2);
}
-static struct timer ixdp2400_timer = {
+static struct sys_timer ixdp2400_timer = {
.init = ixdp2400_timer_init,
.offset = ixp2000_gettimeoffset,
};
diff -urN linux/arch/arm/mach-ixp2000/ixdp2800.c
linux/arch/arm/mach-ixp2000/ixdp2800.c
--- linux/arch/arm/mach-ixp2000/ixdp2800.c 2004/11/15 11:49:14 1.3
+++ linux/arch/arm/mach-ixp2000/ixdp2800.c 2005/01/13 14:05:18 1.4
@@ -113,7 +113,7 @@
* Device behind the first bridge
*/
if(dev->bus->self->devfn == IXDP2X00_P2P_DEVFN) {
- switch(PCI_SLOT(dev->devfn)) {
+ switch(dev->devfn) {
case IXDP2X00_PMC_DEVFN:
return IRQ_IXDP2800_PMC;
diff -urN linux/arch/arm/mach-ixp4xx/Kconfig linux/arch/arm/mach-ixp4xx/Kconfig
--- linux/arch/arm/mach-ixp4xx/Kconfig 2004/12/04 18:15:58 1.3
+++ linux/arch/arm/mach-ixp4xx/Kconfig 2005/01/13 14:05:18 1.4
@@ -36,6 +36,14 @@
IXDPG425 Development Platform (Also known as Montajade).
For more information on this platform, see Documentation/arm/IXP4xx.
+config MACH_IXDP465
+ bool "IXDP465"
+ help
+ Say 'Y' here if you want your kernel to support Intel's
+ IXDP465 Development Platform (Also known as BMP).
+ For more information on this platform, see Documentation/arm/IXP4xx.
+
+
#
# IXCDP1100 is the exact same HW as IXDP425, but with a different machine
# number from the bootloader due to marketing monkeys, so we just enable it
@@ -58,7 +66,15 @@
#
config ARCH_IXDP4XX
bool
- depends on ARCH_IXDP425 || ARCH_AVILA
+ depends on ARCH_IXDP425 || ARCH_AVILA || MACH_IXDP465
+ default y
+
+#
+# Certain registers and IRQs are only enabled if supporting IXP465 CPUs
+#
+config CPU_IXP46X
+ bool
+ depends on MACH_IXDP465
default y
comment "IXP4xx Options"
diff -urN linux/arch/arm/mach-ixp4xx/common-pci.c
linux/arch/arm/mach-ixp4xx/common-pci.c
--- linux/arch/arm/mach-ixp4xx/common-pci.c 2004/12/27 02:15:48 1.5
+++ linux/arch/arm/mach-ixp4xx/common-pci.c 2005/01/13 14:05:18 1.6
@@ -348,10 +348,11 @@
asm("mrc p15, 0, %0, cr0, cr0, 0;" : "=r"(processor_id) :);
/*
- * Determine which PCI read method to use
+ * Determine which PCI read method to use.
+ * Rev 0 IXP425 requires workaround.
*/
- if (!(processor_id & 0xf)) {
- printk("PCI: IXP4xx A0 silicon detected - "
+ if (!(processor_id & 0xf) && !cpu_is_ixp46x()) {
+ printk("PCI: IXP42x A0 silicon detected - "
"PCI Non-Prefetch Workaround Enabled\n");
ixp4xx_pci_read = ixp4xx_pci_read_errata;
} else
diff -urN linux/arch/arm/mach-ixp4xx/common.c
linux/arch/arm/mach-ixp4xx/common.c
--- linux/arch/arm/mach-ixp4xx/common.c 2004/12/04 18:15:58 1.6
+++ linux/arch/arm/mach-ixp4xx/common.c 2005/01/13 14:05:18 1.7
@@ -145,7 +145,10 @@
**************************************************************************/
static void ixp4xx_irq_mask(unsigned int irq)
{
- *IXP4XX_ICMR &= ~(1 << irq);
+ if (cpu_is_ixp46x() && irq >= 32)
+ *IXP4XX_ICMR2 &= ~(1 << (irq - 32));
+ else
+ *IXP4XX_ICMR &= ~(1 << irq);
}
static void ixp4xx_irq_mask_ack(unsigned int irq)
@@ -155,13 +158,13 @@
static void ixp4xx_irq_unmask(unsigned int irq)
{
- static int irq2gpio[NR_IRQS] = {
+ static int irq2gpio[32] = {
-1, -1, -1, -1, -1, -1, 0, 1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, 2, 3, 4, 5, 6,
7, 8, 9, 10, 11, 12, -1, -1,
};
- int line = irq2gpio[irq];
+ int line = (irq < 32) ? irq2gpio[irq] : -1;
/*
* This only works for LEVEL gpio IRQs as per the IXP4xx developer's
@@ -171,7 +174,10 @@
if (line >= 0)
gpio_line_isr_clear(line);
- *IXP4XX_ICMR |= (1 << irq);
+ if (cpu_is_ixp46x() && irq >= 32)
+ *IXP4XX_ICMR2 |= (1 << (irq - 32));
+ else
+ *IXP4XX_ICMR |= (1 << irq);
}
static struct irqchip ixp4xx_irq_chip = {
@@ -190,6 +196,14 @@
/* Disable all interrupt */
*IXP4XX_ICMR = 0x0;
+ if (cpu_is_ixp46x()) {
+ /* Route upper 32 sources to IRQ instead of FIQ */
+ *IXP4XX_ICLR2 = 0x00;
+
+ /* Disable upper 32 interrupts */
+ *IXP4XX_ICMR2 = 0x00;
+ }
+
for(i = 0; i < NR_IRQS; i++)
{
set_irq_chip(i, &ixp4xx_irq_chip);
@@ -265,3 +279,40 @@
.init = ixp4xx_timer_init,
.offset = ixp4xx_gettimeoffset,
};
+
+static struct resource ixp46x_i2c_resources[] = {
+ [0] = {
+ .start = 0xc8011000,
+ .end = 0xc801101c,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_IXP4XX_I2C,
+ .end = IRQ_IXP4XX_I2C,
+ .flags = IORESOURCE_IRQ
+ }
+};
+
+/*
+ * I2C controller. The IXP46x uses the same block as the IOP3xx, so
+ * we just use the same device name.
+ */
+static struct platform_device ixp46x_i2c_controller = {
+ .name = "IOP3xx-I2C",
+ .id = 0,
+ .num_resources = 2,
+ .resource = &ixp46x_i2c_resources
+};
+
+static struct platform_device *ixp46x_devices[] __initdata = {
+ &ixp46x_i2c_controller
+};
+
+void __init ixp4xx_sys_init(void)
+{
+ if (cpu_is_ixp46x()) {
+ platform_add_devices(ixp46x_devices,
+ ARRAY_SIZE(ixp46x_devices));
+ }
+}
+
diff -urN linux/arch/arm/mach-ixp4xx/coyote-setup.c
linux/arch/arm/mach-ixp4xx/coyote-setup.c
--- linux/arch/arm/mach-ixp4xx/coyote-setup.c 2004/12/04 18:15:58 1.5
+++ linux/arch/arm/mach-ixp4xx/coyote-setup.c 2005/01/13 14:05:18 1.6
@@ -89,7 +89,8 @@
*IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
- platform_add_devices(&coyote_devices, ARRAY_SIZE(coyote_devices));
+ ixp4xx_sys_init();
+ platform_add_devices(coyote_devices, ARRAY_SIZE(coyote_devices));
}
#ifdef CONFIG_ARCH_ADI_COYOTE
diff -urN linux/arch/arm/mach-ixp4xx/ixdp425-pci.c
linux/arch/arm/mach-ixp4xx/ixdp425-pci.c
--- linux/arch/arm/mach-ixp4xx/ixdp425-pci.c 2004/06/06 02:12:34 1.1
+++ linux/arch/arm/mach-ixp4xx/ixdp425-pci.c 2005/01/13 14:05:18 1.2
@@ -73,9 +73,8 @@
int __init ixdp425_pci_init(void)
{
- if (machine_is_ixdp425() ||
- machine_is_ixcdp1100() ||
- machine_is_avila())
+ if (machine_is_ixdp425() || machine_is_ixcdp1100() ||
+ machine_is_avila() || machine_is_ixdp465())
pci_common_init(&ixdp425_pci);
return 0;
}
diff -urN linux/arch/arm/mach-ixp4xx/ixdp425-setup.c
linux/arch/arm/mach-ixp4xx/ixdp425-setup.c
--- linux/arch/arm/mach-ixp4xx/ixdp425-setup.c 2004/10/25 20:44:10 1.4
+++ linux/arch/arm/mach-ixp4xx/ixdp425-setup.c 2005/01/13 14:05:18 1.5
@@ -108,13 +108,33 @@
static void __init ixdp425_init(void)
{
- platform_add_devices(&ixdp425_devices, ARRAY_SIZE(ixdp425_devices));
+ ixp4xx_sys_init();
+
+ /*
+ * IXP465 has 32MB window
+ */
+ if (machine_is_ixdp465()) {
+ ixdp425_flash_resource.end += IXDP425_FLASH_SIZE;
+ }
+
+ platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices));
}
MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
MAINTAINER("MontaVista Software, Inc.")
BOOT_MEM(PHYS_OFFSET, IXP4XX_PERIPHERAL_BASE_PHYS,
IXP4XX_PERIPHERAL_BASE_VIRT)
+ MAPIO(ixdp425_map_io)
+ INITIRQ(ixp4xx_init_irq)
+ .timer = &ixp4xx_timer,
+ BOOT_PARAMS(0x0100)
+ INIT_MACHINE(ixdp425_init)
+MACHINE_END
+
+MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
+ MAINTAINER("MontaVista Software, Inc.")
+ BOOT_MEM(PHYS_OFFSET, IXP4XX_PERIPHERAL_BASE_PHYS,
+ IXP4XX_PERIPHERAL_BASE_VIRT)
MAPIO(ixdp425_map_io)
INITIRQ(ixp4xx_init_irq)
.timer = &ixp4xx_timer,
diff -urN linux/arch/arm/mach-ixp4xx/prpmc1100-setup.c
linux/arch/arm/mach-ixp4xx/prpmc1100-setup.c
--- linux/arch/arm/mach-ixp4xx/prpmc1100-setup.c 2004/10/25 20:44:10
1.4
+++ linux/arch/arm/mach-ixp4xx/prpmc1100-setup.c 2005/01/13 14:05:18
1.5
@@ -79,7 +79,9 @@
static void __init prpmc1100_init(void)
{
- platform_add_devices(&prpmc1100_devices, ARRAY_SIZE(prpmc1100_devices));
+ ixp4xx_sys_init();
+
+ platform_add_devices(prpmc1100_devices, ARRAY_SIZE(prpmc1100_devices));
}
MACHINE_START(PRPMC1100, "Motorola PrPMC1100")
diff -urN linux/arch/arm/mach-omap/board-h2.c
linux/arch/arm/mach-omap/board-h2.c
--- linux/arch/arm/mach-omap/board-h2.c 2004/11/15 11:49:14 1.3
+++ linux/arch/arm/mach-omap/board-h2.c 2005/01/13 14:05:18 1.4
@@ -32,10 +32,11 @@
#include <asm/arch/clocks.h>
#include <asm/arch/gpio.h>
#include <asm/arch/usb.h>
-#include <asm/arch/serial.h>
#include "common.h"
+extern int omap_gpio_init(void);
+
static int __initdata h2_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
static struct resource h2_smc91x_resources[] = {
@@ -45,8 +46,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = 0, /* Really GPIO 0 */
- .end = 0,
+ .start = OMAP_GPIO_IRQ(0),
+ .end = OMAP_GPIO_IRQ(0),
.flags = IORESOURCE_IRQ,
},
};
@@ -62,9 +63,20 @@
&h2_smc91x_device,
};
+static void __init h2_init_smc91x(void)
+{
+ if ((omap_request_gpio(0)) < 0) {
+ printk("Error requesting gpio 0 for smc91x irq\n");
+ return;
+ }
+ omap_set_gpio_edge_ctrl(0, OMAP_GPIO_FALLING_EDGE);
+}
+
void h2_init_irq(void)
{
omap_init_irq();
+ omap_gpio_init();
+ h2_init_smc91x();
}
static struct omap_usb_config h2_usb_config __initdata = {
diff -urN linux/arch/arm/mach-omap/board-h3.c
linux/arch/arm/mach-omap/board-h3.c
--- linux/arch/arm/mach-omap/board-h3.c 2004/11/15 11:49:14 1.3
+++ linux/arch/arm/mach-omap/board-h3.c 2005/01/13 14:05:18 1.4
@@ -28,16 +28,13 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/arch/irqs.h>
+#include <asm/arch/mux.h>
#include <asm/arch/gpio.h>
#include <asm/mach-types.h>
-#include <asm/arch/serial.h>
#include "common.h"
-void h3_init_irq(void)
-{
- omap_init_irq();
-}
+extern int omap_gpio_init(void);
static int __initdata h3_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
@@ -48,8 +45,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = 0,
- .end = 0,
+ .start = OMAP_GPIO_IRQ(40),
+ .end = OMAP_GPIO_IRQ(40),
.flags = IORESOURCE_IRQ,
},
};
@@ -70,6 +67,23 @@
(void) platform_add_devices(devices, ARRAY_SIZE(devices));
}
+static void __init h3_init_smc91x(void)
+{
+ omap_cfg_reg(W15_1710_GPIO40);
+ if (omap_request_gpio(40) < 0) {
+ printk("Error requesting gpio 40 for smc91x irq\n");
+ return;
+ }
+ omap_set_gpio_edge_ctrl(40, OMAP_GPIO_FALLING_EDGE);
+}
+
+void h3_init_irq(void)
+{
+ omap_init_irq();
+ omap_gpio_init();
+ h3_init_smc91x();
+}
+
static void __init h3_map_io(void)
{
omap_map_io();
diff -urN linux/arch/arm/mach-omap/board-innovator.c
linux/arch/arm/mach-omap/board-innovator.c
--- linux/arch/arm/mach-omap/board-innovator.c 2004/11/15 11:49:14 1.7
+++ linux/arch/arm/mach-omap/board-innovator.c 2005/01/13 14:05:18 1.8
@@ -30,13 +30,12 @@
#include <asm/arch/gpio.h>
#include <asm/arch/fpga.h>
#include <asm/arch/usb.h>
-#include <asm/arch/serial.h>
#include "common.h"
-#ifdef CONFIG_ARCH_OMAP1510
+static int __initdata innovator_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
-extern int omap_gpio_init(void);
+#ifdef CONFIG_ARCH_OMAP1510
/* Only FPGA needs to be mapped here. All others are done with ioremap */
static struct map_desc innovator1510_io_desc[] __initdata = {
@@ -44,8 +43,6 @@
MT_DEVICE },
};
-static int __initdata innovator_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
-
static struct resource innovator1510_smc91x_resources[] = {
[0] = {
.start = OMAP1510_FPGA_ETHR_START, /* Physical */
@@ -81,8 +78,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = 0, /* Really GPIO 0 */
- .end = 0,
+ .start = OMAP_GPIO_IRQ(0),
+ .end = OMAP_GPIO_IRQ(0),
.flags = IORESOURCE_IRQ,
},
};
@@ -100,15 +97,31 @@
#endif /* CONFIG_ARCH_OMAP16XX */
+static void __init innovator_init_smc91x(void)
+{
+ if (cpu_is_omap1510()) {
+ fpga_write(fpga_read(OMAP1510_FPGA_RST) & ~1,
+ OMAP1510_FPGA_RST);
+ udelay(750);
+ } else {
+ if ((omap_request_gpio(0)) < 0) {
+ printk("Error requesting gpio 0 for smc91x irq\n");
+ return;
+ }
+ omap_set_gpio_edge_ctrl(0, OMAP_GPIO_RISING_EDGE);
+ }
+}
+
void innovator_init_irq(void)
{
omap_init_irq();
+ omap_gpio_init();
#ifdef CONFIG_ARCH_OMAP1510
if (cpu_is_omap1510()) {
- omap_gpio_init();
omap1510_fpga_init_irq();
}
#endif
+ innovator_init_smc91x();
}
#ifdef CONFIG_ARCH_OMAP1510
diff -urN linux/arch/arm/mach-omap/board-osk.c
linux/arch/arm/mach-omap/board-osk.c
--- linux/arch/arm/mach-omap/board-osk.c 2004/11/15 11:49:14 1.7
+++ linux/arch/arm/mach-omap/board-osk.c 2005/01/13 14:05:18 1.8
@@ -39,7 +39,6 @@
#include <asm/arch/gpio.h>
#include <asm/arch/fpga.h>
#include <asm/arch/usb.h>
-#include <asm/arch/serial.h>
#include "common.h"
@@ -57,8 +56,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = 0, /* Really GPIO 0 */
- .end = 0,
+ .start = OMAP_GPIO_IRQ(0),
+ .end = OMAP_GPIO_IRQ(0),
.flags = IORESOURCE_IRQ,
},
};
@@ -74,9 +73,20 @@
&osk5912_smc91x_device,
};
+static void __init osk_init_smc91x(void)
+{
+ if ((omap_request_gpio(0)) < 0) {
+ printk("Error requesting gpio 0 for smc91x irq\n");
+ return;
+ }
+ omap_set_gpio_edge_ctrl(0, OMAP_GPIO_RISING_EDGE);
+}
+
void osk_init_irq(void)
{
omap_init_irq();
+ omap_gpio_init();
+ osk_init_smc91x();
}
static struct omap_usb_config osk_usb_config __initdata = {
diff -urN linux/arch/arm/mach-omap/board-perseus2.c
linux/arch/arm/mach-omap/board-perseus2.c
--- linux/arch/arm/mach-omap/board-perseus2.c 2004/11/15 11:49:14 1.7
+++ linux/arch/arm/mach-omap/board-perseus2.c 2005/01/13 14:05:18 1.8
@@ -14,6 +14,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/device.h>
+#include <linux/delay.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
@@ -28,11 +29,6 @@
#include "common.h"
-void omap_perseus2_init_irq(void)
-{
- omap_init_irq();
-}
-
static struct resource smc91x_resources[] = {
[0] = {
.start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
@@ -64,6 +60,22 @@
(void) platform_add_devices(devices, ARRAY_SIZE(devices));
}
+static void __init perseus2_init_smc91x(void)
+{
+ fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
+ mdelay(50);
+ fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
+ H2P2_DBG_FPGA_LAN_RESET);
+ mdelay(50);
+}
+
+void omap_perseus2_init_irq(void)
+{
+ omap_init_irq();
+ omap_gpio_init();
+ perseus2_init_smc91x();
+}
+
/* Only FPGA needs to be mapped here. All others are done with ioremap */
static struct map_desc omap_perseus2_io_desc[] __initdata = {
{H2P2_DBG_FPGA_BASE, H2P2_DBG_FPGA_START, H2P2_DBG_FPGA_SIZE,
diff -urN linux/arch/arm/mach-omap/common.c linux/arch/arm/mach-omap/common.c
--- linux/arch/arm/mach-omap/common.c 2004/11/15 11:49:14 1.5
+++ linux/arch/arm/mach-omap/common.c 2005/01/13 14:05:18 1.6
@@ -30,8 +30,6 @@
#include <asm/arch/board.h>
#include <asm/arch/mux.h>
#include <asm/arch/fpga.h>
-#include <asm/arch/serial.h>
-
#include "clock.h"
@@ -307,14 +305,14 @@
_omap_map_io();
}
-static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
+static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
int offset)
{
offset <<= up->regshift;
return (unsigned int)__raw_readb(up->membase + offset);
}
-static inline void omap_serial_outp(struct plat_serial8250_port *p, int
offset,
+static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
int value)
{
offset <<= p->regshift;
@@ -323,12 +321,14 @@
/*
* Internal UARTs need to be initialized for the 8250 autoconfig to work
- * properly.
+ * properly. Note that the TX watermark initialization may not be needed
+ * once the 8250.c watermark handling code is merged.
*/
static void __init omap_serial_reset(struct plat_serial8250_port *p)
{
- omap_serial_outp(p, UART_OMAP_MDR1, 0x07); /* disable UART */
- omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */
+ omap_serial_outp(p, UART_OMAP_MDR1, 0x07); /* disable UART */
+ omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */
+ omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */
if (!cpu_is_omap1510()) {
omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
diff -urN linux/arch/arm/mach-omap/dma.c linux/arch/arm/mach-omap/dma.c
--- linux/arch/arm/mach-omap/dma.c 2004/11/15 11:49:14 1.6
+++ linux/arch/arm/mach-omap/dma.c 2005/01/13 14:05:18 1.7
@@ -6,6 +6,7 @@
* DMA channel linking for 1610 by Samuel Ortiz <samuel.ortiz@nokia.com>
* Graphics DMA and LCD DMA graphics tranformations
* by Imre Deak <imre.deak@nokia.com>
+ * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
*
* Support functions for the OMAP internal DMA channels.
*
@@ -477,10 +478,6 @@
if (dev_id == 0)
break;
}
- if (dev_id != 0 && dma_chan[ch].dev_id == dev_id) {
- spin_unlock_irqrestore(&dma_chan_lock, flags);
- return -EAGAIN;
- }
}
if (free_ch == -1) {
spin_unlock_irqrestore(&dma_chan_lock, flags);
@@ -931,6 +928,50 @@
OMAP1610_DMA_LCD_CCR);
}
+/*
+ * Clears any DMA state so the DMA engine is ready to restart with new buffers
+ * through omap_start_dma(). Any buffers in flight are discarded.
+ */
+void omap_clear_dma(int lch)
+{
+ unsigned long flags;
+ int status;
+
+ local_irq_save(flags);
+ omap_writew(omap_readw(OMAP_DMA_CCR(lch)) & ~OMAP_DMA_CCR_EN,
+ OMAP_DMA_CCR(lch));
+ status = OMAP_DMA_CSR(lch); /* clear pending interrupts */
+ local_irq_restore(flags);
+}
+
+/*
+ * Returns current physical source address for the given DMA channel.
+ * If the channel is running the caller must disable interrupts prior calling
+ * this function and process the returned value before re-enabling interrupt to
+ * prevent races with the interrupt handler. Note that in continuous mode there
+ * is a chance for CSSA_L register overflow inbetween the two reads resulting
+ * in incorrect return value.
+ */
+dma_addr_t omap_get_dma_src_pos(int lch)
+{
+ return (dma_addr_t) (OMAP_DMA_CSSA_L(lch) |
+ (OMAP_DMA_CSSA_U(lch) << 16));
+}
+
+/*
+ * Returns current physical destination address for the given DMA channel.
+ * If the channel is running the caller must disable interrupts prior calling
+ * this function and process the returned value before re-enabling interrupt to
+ * prevent races with the interrupt handler. Note that in continuous mode there
+ * is a chance for CDSA_L register overflow inbetween the two reads resulting
+ * in incorrect return value.
+ */
+dma_addr_t omap_get_dma_dst_pos(int lch)
+{
+ return (dma_addr_t) (OMAP_DMA_CDSA_L(lch) |
+ (OMAP_DMA_CDSA_U(lch) << 16));
+}
+
static int __init omap_init_dma(void)
{
int ch, r;
@@ -999,9 +1040,13 @@
}
return 0;
}
+
arch_initcall(omap_init_dma);
+EXPORT_SYMBOL(omap_get_dma_src_pos);
+EXPORT_SYMBOL(omap_get_dma_dst_pos);
+EXPORT_SYMBOL(omap_clear_dma);
EXPORT_SYMBOL(omap_set_dma_priority);
EXPORT_SYMBOL(omap_request_dma);
EXPORT_SYMBOL(omap_free_dma);
diff -urN linux/arch/arm/mach-omap/pm.c linux/arch/arm/mach-omap/pm.c
--- linux/arch/arm/mach-omap/pm.c 2004/11/15 11:49:14 1.1
+++ linux/arch/arm/mach-omap/pm.c 2005/01/13 14:05:18 1.2
@@ -81,6 +81,12 @@
mask32 = omap_readl(ARM_SYSST);
local_fiq_enable();
local_irq_enable();
+
+#if defined(CONFIG_OMAP_32K_TIMER) && defined(CONFIG_NO_IDLE_HZ)
+ /* Override timer to use VST for the next cycle */
+ omap_32k_timer_next_vst_interrupt();
+#endif
+
if ((mask32 & DSP_IDLE) == 0) {
__asm__ volatile ("mcr p15, 0, r0, c7, c0, 4");
} else {
@@ -508,7 +514,7 @@
*/
//#include <asm/arch/hardware.h>
-static int omap_pm_prepare(u32 state)
+static int omap_pm_prepare(suspend_state_t state)
{
int error = 0;
@@ -535,7 +541,7 @@
*
*/
-static int omap_pm_enter(u32 state)
+static int omap_pm_enter(suspend_state_t state)
{
switch (state)
{
@@ -563,7 +569,7 @@
* failed).
*/
-static int omap_pm_finish(u32 state)
+static int omap_pm_finish(suspend_state_t state)
{
return 0;
}
diff -urN linux/arch/arm/mach-pxa/corgi.c linux/arch/arm/mach-pxa/corgi.c
--- linux/arch/arm/mach-pxa/corgi.c 1970/01/01 00:00:00
+++ linux/arch/arm/mach-pxa/corgi.c Thu Jan 13 14:05:19 2005 1.1
@@ -0,0 +1,159 @@
+/*
+ * Support for Sharp SL-C7xx PDAs
+ * Models: SL-C700 (Corgi), SL-C750 (Shepherd), SL-C760 (Husky)
+ *
+ * Copyright (c) 2004-2005 Richard Purdie
+ *
+ * Based on Sharp's 2.4 kernel patches/lubbock.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/major.h>
+#include <linux/fs.h>
+#include <linux/interrupt.h>
+
+#include <asm/setup.h>
+#include <asm/memory.h>
+#include <asm/mach-types.h>
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/irq.h>
+#include <asm/arch/corgi.h>
+
+#include <asm/hardware/scoop.h>
+
+#include "generic.h"
+
+extern void corgi_ssp_lcdtg_send (u8 adrs, u8 data);
+
+static void __init corgi_init_irq(void)
+{
+ pxa_init_irq();
+}
+
+static struct resource corgi_scoop_resources[] = {
+ [0] = {
+ .start = 0x10800000,
+ .end = 0x10800fff,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct scoop_config corgi_scoop_setup = {
+ .io_dir = CORGI_SCOOP_IO_DIR,
+ .io_out = CORGI_SCOOP_IO_OUT,
+};
+
+static struct platform_device corgiscoop_device = {
+ .name = "sharp-scoop",
+ .id = -1,
+ .dev = {
+ .platform_data = &corgi_scoop_setup,
+ },
+ .num_resources = ARRAY_SIZE(corgi_scoop_resources),
+ .resource = corgi_scoop_resources,
+};
+
+static struct platform_device *devices[] __initdata = {
+ &corgiscoop_device,
+};
+
+static struct sharpsl_flash_param_info sharpsl_flash_param;
+
+void corgi_get_param(void)
+{
+ sharpsl_flash_param.comadj_keyword = readl(FLASH_MEM_BASE +
FLASH_COMADJ_MAGIC_ADR);
+ sharpsl_flash_param.comadj = readl(FLASH_MEM_BASE +
FLASH_COMADJ_DATA_ADR);
+
+ sharpsl_flash_param.phad_keyword = readl(FLASH_MEM_BASE +
FLASH_PHAD_MAGIC_ADR);
+ sharpsl_flash_param.phadadj = readl(FLASH_MEM_BASE +
FLASH_PHAD_DATA_ADR);
+}
+
+static void __init corgi_init(void)
+{
+ platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+static void __init fixup_corgi(struct machine_desc *desc,
+ struct tag *tags, char **cmdline, struct meminfo *mi)
+{
+ corgi_get_param();
+ mi->nr_banks=1;
+ mi->bank[0].start = 0xa0000000;
+ mi->bank[0].node = 0;
+ if (machine_is_corgi())
+ mi->bank[0].size = (32*1024*1024);
+ else
+ mi->bank[0].size = (64*1024*1024);
+}
+
+static struct map_desc corgi_io_desc[] __initdata = {
+/* virtual physical length */
+/* { 0xf1000000, 0x08000000, 0x01000000, MT_DEVICE },*/ /* LCDC (readable
for Qt driver) */
+/* { 0xef700000, 0x10800000, 0x00001000, MT_DEVICE },*/ /* SCOOP */
+ { 0xef800000, 0x00000000, 0x00800000, MT_DEVICE }, /* Boot Flash */
+};
+
+static void __init corgi_map_io(void)
+{
+ pxa_map_io();
+ iotable_init(corgi_io_desc,ARRAY_SIZE(corgi_io_desc));
+
+ /* setup sleep mode values */
+ PWER = 0x00000002;
+ PFER = 0x00000000;
+ PRER = 0x00000002;
+ PGSR0 = 0x0158C000;
+ PGSR1 = 0x00FF0080;
+ PGSR2 = 0x0001C004;
+ /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
+ PCFR |= PCFR_OPDE;
+}
+
+#ifdef CONFIG_MACH_CORGI
+MACHINE_START(CORGI, "SHARP Corgi")
+ BOOT_MEM(0xa0000000, 0x40000000, io_p2v(0x40000000))
+ FIXUP(fixup_corgi)
+ MAPIO(corgi_map_io)
+ INITIRQ(corgi_init_irq)
+ .init_machine = corgi_init,
+ .timer = &pxa_timer,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_SHEPHERD
+MACHINE_START(SHEPHERD, "SHARP Shepherd")
+ BOOT_MEM(0xa0000000, 0x40000000, io_p2v(0x40000000))
+ FIXUP(fixup_corgi)
+ MAPIO(corgi_map_io)
+ INITIRQ(corgi_init_irq)
+ .init_machine = corgi_init,
+ .timer = &pxa_timer,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_HUSKY
+MACHINE_START(HUSKY, "SHARP Husky")
+ BOOT_MEM(0xa0000000, 0x40000000, io_p2v(0x40000000))
+ FIXUP(fixup_corgi)
+ MAPIO(corgi_map_io)
+ INITIRQ(corgi_init_irq)
+ .init_machine = corgi_init,
+ .timer = &pxa_timer,
+MACHINE_END
+#endif
+
diff -urN linux/arch/arm/mach-pxa/Kconfig linux/arch/arm/mach-pxa/Kconfig
--- linux/arch/arm/mach-pxa/Kconfig 2004/08/24 15:10:04 1.4
+++ linux/arch/arm/mach-pxa/Kconfig 2005/01/13 14:05:19 1.5
@@ -18,10 +18,30 @@
bool "Accelent Xscale IDP"
select PXA25x
+config PXA_SHARPSL
+ bool "SHARP SL-C7xx Models (Corgi, Shepherd and Husky)"
+ select PXA25x
+ help
+ Say Y here if you intend to run this kernel on a
+ Sharp SL-C700 (Corgi), SL-C750 (Shepherd) or a
+ Sharp SL-C760 (Husky) handheld computer.
+
endchoice
endmenu
+config MACH_CORGI
+ bool "Enable Sharp SL-C700 (Corgi) Support"
+ depends PXA_SHARPSL
+
+config MACH_SHEPHERD
+ bool "Enable Sharp SL-C750 (Shepherd) Support"
+ depends PXA_SHARPSL
+
+config MACH_HUSKY
+ bool "Enable Sharp SL-C760 (Husky) Support"
+ depends PXA_SHARPSL
+
config PXA25x
bool
help
diff -urN linux/arch/arm/mach-pxa/Makefile linux/arch/arm/mach-pxa/Makefile
--- linux/arch/arm/mach-pxa/Makefile 2004/06/26 15:15:07 1.9
+++ linux/arch/arm/mach-pxa/Makefile 2005/01/13 14:05:19 1.10
@@ -11,6 +11,7 @@
obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
+obj-$(CONFIG_PXA_SHARPSL) += corgi.o
# Support for blinky lights
led-y := leds.o
diff -urN linux/arch/arm/mach-pxa/generic.c linux/arch/arm/mach-pxa/generic.c
--- linux/arch/arm/mach-pxa/generic.c 2004/12/04 18:15:58 1.15
+++ linux/arch/arm/mach-pxa/generic.c 2005/01/13 14:05:19 1.16
@@ -92,7 +92,7 @@
*/
static struct map_desc standard_io_desc[] __initdata = {
/* virtual physical length type */
- { 0xf2000000, 0x40000000, 0x01800000, MT_DEVICE }, /* Devs */
+ { 0xf2000000, 0x40000000, 0x02000000, MT_DEVICE }, /* Devs */
{ 0xf4000000, 0x44000000, 0x00100000, MT_DEVICE }, /* LCD */
{ 0xf6000000, 0x48000000, 0x00100000, MT_DEVICE }, /* Mem Ctl */
{ 0xf8000000, 0x4c000000, 0x00100000, MT_DEVICE }, /* USB host */
diff -urN linux/arch/arm/mach-pxa/ssp.c linux/arch/arm/mach-pxa/ssp.c
--- linux/arch/arm/mach-pxa/ssp.c 2004/11/15 11:49:14 1.1
+++ linux/arch/arm/mach-pxa/ssp.c 2005/01/13 14:05:19 1.2
@@ -17,7 +17,8 @@
*
* Revision history:
* 22nd Aug 2003 Initial version.
- *
+ * 20th Dec 2004 Added ssp_config for changing port config without
+ * closing the port.
*/
#include <linux/module.h>
@@ -34,6 +35,11 @@
#include <asm/arch/ssp.h>
#include <asm/arch/pxa-regs.h>
+#define PXA_SSP_PORTS 3
+
+static DECLARE_MUTEX(sem);
+static int use_count[PXA_SSP_PORTS] = {0, 0, 0};
+
static irqreturn_t ssp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
struct ssp_dev *dev = (struct ssp_dev*) dev_id;
@@ -171,6 +177,30 @@
}
/**
+ * ssp_config - configure SSP port settings
+ * @mode: port operating mode
+ * @flags: port config flags
+ * @psp_flags: port PSP config flags
+ * @speed: port speed
+ *
+ * Port MUST be disabled by ssp_disable before making any config changes.
+ */
+int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32
speed)
+{
+ dev->mode = mode;
+ dev->flags = flags;
+ dev->psp_flags = psp_flags;
+ dev->speed = speed;
+
+ /* set up port type, speed, port settings */
+ SSCR0_P(dev->port) = (dev->speed | dev->mode);
+ SSCR1_P(dev->port) = dev->flags;
+ SSPSP_P(dev->port) = dev->psp_flags;
+
+ return 0;
+}
+
+/**
* ssp_init - setup the SSP port
*
* initialise and claim resources for the SSP port.
@@ -180,12 +210,23 @@
* %-EBUSY if the resources are already in use
* %0 on success
*/
-int ssp_init(struct ssp_dev *dev, u32 port, u32 mode, u32 flags, u32 psp_flags,
- u32 speed)
+int ssp_init(struct ssp_dev *dev, u32 port)
{
int ret, irq;
+ if (port > PXA_SSP_PORTS || port == 0)
+ return -ENODEV;
+
+ down(&sem);
+ if (use_count[port - 1]) {
+ up(&sem);
+ return -EBUSY;
+ }
+ use_count[port - 1]++;
+
if (!request_mem_region(__PREG(SSCR0_P(port)), 0x2c, "SSP")) {
+ use_count[port - 1]--;
+ up(&sem);
return -EBUSY;
}
@@ -213,15 +254,6 @@
}
dev->port = port;
- dev->mode = mode;
- dev->flags = flags;
- dev->psp_flags = psp_flags;
- dev->speed = speed;
-
- /* set up port type, speed, port settings */
- SSCR0_P(dev->port) = (dev->speed | dev->mode);
- SSCR1_P(dev->port) = dev->flags;
- SSPSP_P(dev->port) = dev->psp_flags;
ret = request_irq(irq, ssp_interrupt, 0, "SSP", dev);
if (ret)
@@ -252,10 +284,13 @@
#endif
}
+ up(&sem);
return 0;
out_region:
- release_mem_region(__PREG(SSCR0_P(dev->port)), 0x2c);
+ release_mem_region(__PREG(SSCR0_P(port)), 0x2c);
+ use_count[port - 1]--;
+ up(&sem);
return ret;
}
@@ -268,6 +303,7 @@
{
int irq;
+ down(&sem);
SSCR0_P(dev->port) &= ~SSCR0_SSE;
/* find irq, save power and turn off SSP port clock */
@@ -306,6 +342,8 @@
free_irq(irq, dev);
release_mem_region(__PREG(SSCR0_P(dev->port)), 0x2c);
+ use_count[dev->port - 1]--;
+ up(&sem);
}
EXPORT_SYMBOL(ssp_write_word);
@@ -317,3 +355,9 @@
EXPORT_SYMBOL(ssp_restore_state);
EXPORT_SYMBOL(ssp_init);
EXPORT_SYMBOL(ssp_exit);
+EXPORT_SYMBOL(ssp_config);
+
+MODULE_DESCRIPTION("PXA SSP driver");
+MODULE_AUTHOR("Liam Girdwood");
+MODULE_LICENSE("GPL");
+
diff -urN linux/arch/arm/mach-s3c2410/cpu.c linux/arch/arm/mach-s3c2410/cpu.c
--- linux/arch/arm/mach-s3c2410/cpu.c 2004/12/04 18:15:58 1.4
+++ linux/arch/arm/mach-s3c2410/cpu.c 2005/01/13 14:05:19 1.5
@@ -46,6 +46,7 @@
unsigned long idcode;
unsigned long idmask;
void (*map_io)(struct map_desc *mach_desc, int size);
+ void (*init_uarts)(struct s3c2410_uartcfg *cfg, int no);
int (*init)(void);
const char *name;
};
@@ -59,32 +60,36 @@
static struct cpu_table cpu_ids[] __initdata = {
{
- .idcode = 0x32410000,
- .idmask = 0xffffffff,
- .map_io = s3c2410_map_io,
- .init = s3c2410_init,
- .name = name_s3c2410
+ .idcode = 0x32410000,
+ .idmask = 0xffffffff,
+ .map_io = s3c2410_map_io,
+ .init_uarts = s3c2410_init_uarts,
+ .init = s3c2410_init,
+ .name = name_s3c2410
},
{
- .idcode = 0x32410002,
- .idmask = 0xffffffff,
- .map_io = s3c2410_map_io,
- .init = s3c2410_init,
- .name = name_s3c2410a
+ .idcode = 0x32410002,
+ .idmask = 0xffffffff,
+ .map_io = s3c2410_map_io,
+ .init_uarts = s3c2410_init_uarts,
+ .init = s3c2410_init,
+ .name = name_s3c2410a
},
{
- .idcode = 0x32440000,
- .idmask = 0xffffffff,
- .map_io = s3c2440_map_io,
- .init = s3c2440_init,
- .name = name_s3c2440
+ .idcode = 0x32440000,
+ .idmask = 0xffffffff,
+ .map_io = s3c2440_map_io,
+ .init_uarts = s3c2440_init_uarts,
+ .init = s3c2440_init,
+ .name = name_s3c2440
},
{
- .idcode = 0x32440001,
- .idmask = 0xffffffff,
- .map_io = s3c2440_map_io,
- .init = s3c2440_init,
- .name = name_s3c2440a
+ .idcode = 0x32440001,
+ .idmask = 0xffffffff,
+ .map_io = s3c2440_map_io,
+ .init_uarts = s3c2440_init_uarts,
+ .init = s3c2440_init,
+ .name = name_s3c2440a
}
};
@@ -160,6 +165,16 @@
(cpu->map_io)(mach_desc, size);
}
+void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+ if (cpu == NULL)
+ return;
+
+ if (cpu->init_uarts == NULL) {
+ printk(KERN_ERR "s3c24xx_init_uarts: cpu has no uart init\n");
+ } else
+ (cpu->init_uarts)(cfg, no);
+}
static int __init s3c_arch_init(void)
{
int ret;
diff -urN linux/arch/arm/mach-s3c2410/cpu.h linux/arch/arm/mach-s3c2410/cpu.h
--- linux/arch/arm/mach-s3c2410/cpu.h 2004/11/15 11:49:14 1.3
+++ linux/arch/arm/mach-s3c2410/cpu.h 2005/01/13 14:05:19 1.4
@@ -1,7 +1,7 @@
/* arch/arm/mach-s3c2410/cpu.h
*
- * Copyright (c) 2004 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
+ * Copyright (c) 2004-2005 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
*
* Header file for S3C24XX CPU support
*
@@ -12,6 +12,7 @@
* Modifications:
* 24-Aug-2004 BJD Start of generic S3C24XX support
* 18-Oct-2004 BJD Moved board struct into this file
+ * 04-Jan-2005 BJD New uart initialisation
*/
#define IODESC_ENT(x) { S3C2410_VA_##x, S3C2410_PA_##x, S3C2410_SZ_##x,
MT_DEVICE }
@@ -22,10 +23,15 @@
#define print_mhz(m) ((m) / MHZ), ((m / 1000) % 1000)
+/* forward declaration */
+struct s3c2410_uartcfg;
+
#ifdef CONFIG_CPU_S3C2410
extern int s3c2410_init(void);
extern void s3c2410_map_io(struct map_desc *mach_desc, int size);
+extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
#else
+#define s3c2410_init_uarts NULL
#define s3c2410_map_io NULL
#define s3c2410_init NULL
#endif
@@ -33,13 +39,17 @@
#ifdef CONFIG_CPU_S3C2440
extern int s3c2440_init(void);
extern void s3c2440_map_io(struct map_desc *mach_desc, int size);
+extern void s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
#else
+#define s3c2440_init_uarts NULL
#define s3c2440_map_io NULL
#define s3c2440_init NULL
#endif
extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
+extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+
/* the board structure is used at first initialsation time
* to get info such as the devices to register for this
* board. This is done because platfrom_add_devices() cannot
@@ -55,5 +65,3 @@
};
extern void s3c24xx_set_board(struct s3c24xx_board *board);
-
-
diff -urN linux/arch/arm/mach-s3c2410/mach-bast.c
linux/arch/arm/mach-s3c2410/mach-bast.c
--- linux/arch/arm/mach-s3c2410/mach-bast.c 2004/12/04 18:15:58 1.7
+++ linux/arch/arm/mach-s3c2410/mach-bast.c 2005/01/13 14:05:19 1.8
@@ -1,6 +1,6 @@
/* linux/arch/arm/mach-s3c2410/mach-bast.c
*
- * Copyright (c) 2003,2004 Simtec Electronics
+ * Copyright (c) 2003-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* http://www.simtec.co.uk/products/EB2410ITX/
@@ -20,6 +20,7 @@
* 18-Jan-2003 BJD Added serial port configuration
* 05-Oct-2004 BJD Power management code
* 04-Nov-2004 BJD Updated serial port clocks
+ * 04-Jan-2004 BJD New uart init call
*/
#include <linux/kernel.h>
@@ -262,7 +263,7 @@
s3c24xx_uclk.parent = &s3c24xx_clkout1;
s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));
- s3c2410_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs));
+ s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs));
s3c24xx_set_board(&bast_board);
usb_simtec_init();
}
diff -urN linux/arch/arm/mach-s3c2410/mach-h1940.c
linux/arch/arm/mach-s3c2410/mach-h1940.c
--- linux/arch/arm/mach-s3c2410/mach-h1940.c 2004/11/15 11:49:14 1.6
+++ linux/arch/arm/mach-s3c2410/mach-h1940.c 2005/01/13 14:05:19 1.7
@@ -1,6 +1,6 @@
/* linux/arch/arm/mach-s3c2410/mach-h1940.c
*
- * Copyright (c) 2003,2004 Simtec Electronics
+ * Copyright (c) 2003-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* http://www.handhelds.org/projects/h1940.html
@@ -20,6 +20,7 @@
* 04-Sep-2004 BJD Changed uart init, renamed ipaq_ -> h1940_
* 18-Oct-2004 BJD Updated new board structure name
* 04-Nov-2004 BJD Change for new serial clock
+ * 04-Jan-2005 BJD Updated uart init call
*/
#include <linux/kernel.h>
@@ -102,7 +103,7 @@
void __init h1940_map_io(void)
{
s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc));
- s3c2410_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs));
+ s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs));
s3c24xx_set_board(&h1940_board);
}
diff -urN linux/arch/arm/mach-s3c2410/mach-rx3715.c
linux/arch/arm/mach-s3c2410/mach-rx3715.c
--- linux/arch/arm/mach-s3c2410/mach-rx3715.c 2004/11/15 11:49:14 1.1
+++ linux/arch/arm/mach-s3c2410/mach-rx3715.c 2005/01/13 14:05:19 1.2
@@ -95,7 +95,7 @@
s3c24xx_xtal = 16934000;
s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc));
- s3c2440_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs));
+ s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs));
s3c24xx_set_board(&rx3715_board);
}
diff -urN linux/arch/arm/mach-s3c2410/mach-smdk2410.c
linux/arch/arm/mach-s3c2410/mach-smdk2410.c
--- linux/arch/arm/mach-s3c2410/mach-smdk2410.c 2004/11/15 11:49:14 1.6
+++ linux/arch/arm/mach-s3c2410/mach-smdk2410.c 2005/01/13 14:05:19 1.7
@@ -98,7 +98,7 @@
void __init smdk2410_map_io(void)
{
s3c24xx_init_io(smdk2410_iodesc, ARRAY_SIZE(smdk2410_iodesc));
- s3c2410_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
+ s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
s3c24xx_set_board(&smdk2410_board);
}
diff -urN linux/arch/arm/mach-s3c2410/mach-vr1000.c
linux/arch/arm/mach-s3c2410/mach-vr1000.c
--- linux/arch/arm/mach-s3c2410/mach-vr1000.c 2004/11/15 11:49:14 1.8
+++ linux/arch/arm/mach-s3c2410/mach-vr1000.c 2005/01/13 14:05:19 1.9
@@ -18,6 +18,7 @@
* 05-Apr-2004 BJD Copied to make mach-vr1000.c
* 18-Oct-2004 BJD Updated board struct
* 04-Nov-2004 BJD Clock and serial configuration update
+ * 04-Jan-2004 BJD Updated uart init call
*/
#include <linux/kernel.h>
@@ -204,7 +205,7 @@
s3c24xx_uclk.parent = &s3c24xx_clkout1;
s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
- s3c2410_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
+ s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
s3c24xx_set_board(&vr1000_board);
usb_simtec_init();
}
diff -urN linux/arch/arm/mach-s3c2410/s3c2410.c
linux/arch/arm/mach-s3c2410/s3c2410.c
--- linux/arch/arm/mach-s3c2410/s3c2410.c 2004/11/15 11:49:14 1.5
+++ linux/arch/arm/mach-s3c2410/s3c2410.c 2005/01/13 14:05:19 1.6
@@ -1,6 +1,6 @@
/* linux/arch/arm/mach-s3c2410/s3c2410.c
*
- * Copyright (c) 2003,2004 Simtec Electronics
+ * Copyright (c) 2003-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* http://www.simtec.co.uk/products/EB2410ITX/
@@ -17,6 +17,7 @@
* 21-Aug-2004 BJD Added new struct s3c2410_board handler
* 28-Sep-2004 BJD Updates for new serial port bits
* 04-Nov-2004 BJD Updated UART configuration process
+ * 10-Jan-2004 BJD Removed s3c2410_clock_tick_rate
*/
#include <linux/kernel.h>
@@ -42,8 +43,6 @@
#include "cpu.h"
#include "clock.h"
-int s3c2410_clock_tick_rate = 12*1000*1000; /* current timers at 12MHz */
-
/* Initial IO mappings */
static struct map_desc s3c2410_iodesc[] __initdata = {
diff -urN linux/arch/arm/mach-s3c2410/s3c2410.h
linux/arch/arm/mach-s3c2410/s3c2410.h
--- linux/arch/arm/mach-s3c2410/s3c2410.h 2004/11/15 11:49:14 1.7
+++ linux/arch/arm/mach-s3c2410/s3c2410.h 2005/01/13 14:05:19 1.8
@@ -14,17 +14,14 @@
* 20-Aug-2004 BJD Added s3c2410_board struct
* 04-Sep-2004 BJD Added s3c2410_init_uarts() call
* 17-Oct-2004 BJD Moved board out to cpu
+ * 04-Jan-2005 BJD Changed uart init
*/
-struct s3c2410_uartcfg;
-
extern void s3c2410_map_io(struct map_desc *, int count);
-extern void s3c2410_init_uarts(struct s3c2410_uartcfg *, int no);
-
extern void s3c2410_init_irq(void);
struct sys_timer;
extern struct sys_timer s3c2410_timer;
-extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+
diff -urN linux/arch/arm/mach-s3c2410/s3c2440.c
linux/arch/arm/mach-s3c2410/s3c2440.c
--- linux/arch/arm/mach-s3c2410/s3c2440.c 2004/12/04 18:15:58 1.4
+++ linux/arch/arm/mach-s3c2410/s3c2440.c 2005/01/13 14:05:19 1.5
@@ -59,6 +59,7 @@
IODESC_ENT(LCD),
IODESC_ENT(TIMER),
IODESC_ENT(ADC),
+ IODESC_ENT(WATCHDOG),
};
static struct resource s3c_uart0_resource[] = {
@@ -243,7 +244,7 @@
s3c24xx_hclk = s3c24xx_fclk / s3c2440_hdiv;
s3c24xx_pclk = s3c24xx_hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
- /* print brieft summary of clocks, etc */
+ /* print brief summary of clocks, etc */
printk("S3C2440: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral
%ld.%03ld MHz\n",
print_mhz(s3c24xx_fclk), print_mhz(s3c24xx_hclk),
diff -urN linux/arch/arm/mach-s3c2410/s3c2440.h
linux/arch/arm/mach-s3c2410/s3c2440.h
--- linux/arch/arm/mach-s3c2410/s3c2440.h 2004/11/15 11:49:14 1.2
+++ linux/arch/arm/mach-s3c2410/s3c2440.h 2005/01/13 14:05:19 1.3
@@ -12,12 +12,9 @@
* Modifications:
* 24-Aug-2004 BJD Start of S3C2440 CPU support
* 04-Nov-2004 BJD Added s3c2440_init_uarts()
+ * 04-Jan-2004 BJD Moved uart init to cpu code
*/
-struct s3c2410_uartcfg;
-
extern void s3c2440_init_irq(void);
extern void s3c2440_init_time(void);
-
-extern void s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
diff -urN linux/arch/arm/mach-sa1100/neponset.c
linux/arch/arm/mach-sa1100/neponset.c
--- linux/arch/arm/mach-sa1100/neponset.c 2004/11/15 11:49:15 1.19
+++ linux/arch/arm/mach-sa1100/neponset.c 2005/01/13 14:05:19 1.20
@@ -211,8 +211,8 @@
}
#else
-#define neponset_suspend NULL
-#define neponset_resume NULL
+#define neponset_suspend NULL
+#define neponset_resume NULL
#endif
static struct device_driver neponset_device_driver = {
diff -urN linux/arch/arm/mach-versatile/core.c
linux/arch/arm/mach-versatile/core.c
--- linux/arch/arm/mach-versatile/core.c 2004/12/27 02:15:49 1.9
+++ linux/arch/arm/mach-versatile/core.c 2005/01/13 14:05:19 1.10
@@ -597,6 +597,14 @@
return 0;
}
+static int versatile_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
+{
+ return dma_mmap_writecombine(&fb->dev->dev, vma,
+ fb->fb.screen_base,
+ fb->fb.fix.smem_start,
+ fb->fb.fix.smem_len);
+}
+
static void versatile_clcd_remove(struct clcd_fb *fb)
{
dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
@@ -610,6 +618,7 @@
.disable = versatile_clcd_disable,
.enable = versatile_clcd_enable,
.setup = versatile_clcd_setup,
+ .mmap = versatile_clcd_mmap,
.remove = versatile_clcd_remove,
};
diff -urN linux/arch/arm/mm/Kconfig linux/arch/arm/mm/Kconfig
--- linux/arch/arm/mm/Kconfig 2004/12/27 02:15:49 1.14
+++ linux/arch/arm/mm/Kconfig 2005/01/13 14:05:19 1.15
@@ -82,9 +82,9 @@
# ARM922T
config CPU_ARM922T
- bool
- depends on ARCH_CAMELOT || ARCH_LH7A40X
- default y
+ bool "Support ARM922T processor" if ARCH_INTEGRATOR
+ depends on ARCH_CAMELOT || ARCH_LH7A40X || ARCH_INTEGRATOR
+ default y if ARCH_CAMELOT || ARCH_LH7A40X
select CPU_32v4
select CPU_ABRT_EV4T
select CPU_CACHE_V4WT
@@ -101,9 +101,9 @@
# ARM925T
config CPU_ARM925T
- bool
+ bool "Support ARM925T processor" if ARCH_OMAP
depends on ARCH_OMAP1510
- default y
+ default y if ARCH_OMAP1510
select CPU_32v4
select CPU_ABRT_EV4T
select CPU_CACHE_V4WT
@@ -121,8 +121,8 @@
# ARM926T
config CPU_ARM926T
bool "Support ARM926T processor" if ARCH_INTEGRATOR
- depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB ||
ARCH_OMAP730 || ARCH_OMAP1610 || ARCH_OMAP5912
- default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB
+ depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB ||
ARCH_OMAP730 || ARCH_OMAP16XX
+ default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 ||
ARCH_OMAP16XX
select CPU_32v5
select CPU_ABRT_EV5TJ
select CPU_CACHE_VIVT
@@ -392,6 +392,7 @@
config CPU_DCACHE_WRITETHROUGH
bool "Force write through D-cache"
depends on (CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T ||
CPU_ARM1020) && !CPU_DISABLE_DCACHE
+ default y if CPU_ARM925T
help
Say Y here to use the data cache in writethough mode. Unless you
specifically require this or are unsure, say N.
diff -urN linux/arch/arm/mm/alignment.c linux/arch/arm/mm/alignment.c
--- linux/arch/arm/mm/alignment.c 2004/04/23 15:54:06 1.9
+++ linux/arch/arm/mm/alignment.c 2005/01/13 14:05:19 1.10
@@ -3,6 +3,9 @@
*
* Copyright (C) 1995 Linus Torvalds
* Modifications for ARM processor (c) 1995-2001 Russell King
+ * Thumb aligment fault fixups (c) 2004 MontaVista Software, Inc.
+ * - Adapted from gdb/sim/arm/thumbemu.c -- Thumb instruction emulation.
+ * Copyright (C) 1996, Cygnus Software Technologies Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -449,16 +452,146 @@
return TYPE_ERROR;
}
+/*
+ * Convert Thumb ld/st instruction forms to equivalent ARM instructions so
+ * we can reuse ARM userland alignment fault fixups for Thumb.
+ *
+ * This implementation was initially based on the algorithm found in
+ * gdb/sim/arm/thumbemu.c. It is basically just a code reduction of same
+ * to convert only Thumb ld/st instruction forms to equivalent ARM forms.
+ *
+ * NOTES:
+ * 1. Comments below refer to ARM ARM DDI0100E Thumb Instruction sections.
+ * 2. If for some reason we're passed an non-ld/st Thumb instruction to
+ * decode, we return 0xdeadc0de. This should never happen under normal
+ * circumstances but if it does, we've got other problems to deal with
+ * elsewhere and we obviously can't fix those problems here.
+ */
+
+static unsigned long
+thumb2arm(u16 tinstr)
+{
+ u32 L = (tinstr & (1<<11)) >> 11;
+
+ switch ((tinstr & 0xf800) >> 11) {
+ /* 6.5.1 Format 1: */
+ case 0x6000 >> 11: /* 7.1.52 STR(1) */
+ case 0x6800 >> 11: /* 7.1.26 LDR(1) */
+ case 0x7000 >> 11: /* 7.1.55 STRB(1) */
+ case 0x7800 >> 11: /* 7.1.30 LDRB(1) */
+ return 0xe5800000 |
+ ((tinstr & (1<<12)) << (22-12)) | /* fixup */
+ (L<<20) | /* L==1? */
+ ((tinstr & (7<<0)) << (12-0)) | /* Rd */
+ ((tinstr & (7<<3)) << (16-3)) | /* Rn */
+ ((tinstr & (31<<6)) >> /* immed_5 */
+ (6 - ((tinstr & (1<<12)) ? 0 : 2)));
+ case 0x8000 >> 11: /* 7.1.57 STRH(1) */
+ case 0x8800 >> 11: /* 7.1.32 LDRH(1) */
+ return 0xe1c000b0 |
+ (L<<20) | /* L==1? */
+ ((tinstr & (7<<0)) << (12-0)) | /* Rd */
+ ((tinstr & (7<<3)) << (16-3)) | /* Rn */
+ ((tinstr & (7<<6)) >> (6-1)) | /* immed_5[2:0] */
+ ((tinstr & (3<<9)) >> (9-8)); /* immed_5[4:3] */
+
+ /* 6.5.1 Format 2: */
+ case 0x5000 >> 11:
+ case 0x5800 >> 11:
+ {
+ static const u32 subset[8] = {
+ 0xe7800000, /* 7.1.53 STR(2) */
+ 0xe18000b0, /* 7.1.58 STRH(2) */
+ 0xe7c00000, /* 7.1.56 STRB(2) */
+ 0xe19000d0, /* 7.1.34 LDRSB */
+ 0xe7900000, /* 7.1.27 LDR(2) */
+ 0xe19000b0, /* 7.1.33 LDRH(2) */
+ 0xe7d00000, /* 7.1.31 LDRB(2) */
+ 0xe19000f0 /* 7.1.35 LDRSH */
+ };
+ return subset[(tinstr & (7<<9)) >> 9] |
+ ((tinstr & (7<<0)) << (12-0)) | /* Rd */
+ ((tinstr & (7<<3)) << (16-3)) | /* Rn */
+ ((tinstr & (7<<6)) >> (6-0)); /* Rm */
+ }
+
+ /* 6.5.1 Format 3: */
+ case 0x4800 >> 11: /* 7.1.28 LDR(3) */
+ /* NOTE: This case is not technically possible. We're
+ * loading 32-bit memory data via PC relative
+ * addressing mode. So we can and should eliminate
+ * this case. But I'll leave it here for now.
+ */
+ return 0xe59f0000 |
+ ((tinstr & (7<<8)) << (12-8)) | /* Rd */
+ ((tinstr & 255) << (2-0)); /* immed_8 */
+
+ /* 6.5.1 Format 4: */
+ case 0x9000 >> 11: /* 7.1.54 STR(3) */
+ case 0x9800 >> 11: /* 7.1.29 LDR(4) */
+ return 0xe58d0000 |
+ (L<<20) | /* L==1? */
+ ((tinstr & (7<<8)) << (12-8)) | /* Rd */
+ ((tinstr & 255) << 2); /* immed_8 */
+
+ /* 6.6.1 Format 1: */
+ case 0xc000 >> 11: /* 7.1.51 STMIA */
+ case 0xc800 >> 11: /* 7.1.25 LDMIA */
+ {
+ u32 Rn = (tinstr & (7<<8)) >> 8;
+ u32 W = ((L<<Rn) & (tinstr&255)) ? 0 : 1<<21;
+
+ return 0xe8800000 | W | (L<<20) | (Rn<<16) |
+ (tinstr&255);
+ }
+
+ /* 6.6.1 Format 2: */
+ case 0xb000 >> 11: /* 7.1.48 PUSH */
+ case 0xb800 >> 11: /* 7.1.47 POP */
+ if ((tinstr & (3 << 9)) == 0x0400) {
+ static const u32 subset[4] = {
+ 0xe92d0000, /* STMDB sp!,{registers} */
+ 0xe92d4000, /* STMDB sp!,{registers,lr} */
+ 0xe8bd0000, /* LDMIA sp!,{registers} */
+ 0xe8bd8000 /* LDMIA sp!,{registers,pc} */
+ };
+ return subset[(L<<1) | ((tinstr & (1<<8)) >> 8)] |
+ (tinstr & 255); /* register_list */
+ }
+ /* Else fall through for illegal instruction case */
+
+ default:
+ return 0xdeadc0de;
+ }
+}
+
static int
do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
{
union offset_union offset;
- unsigned long instr, instrptr;
+ unsigned long instr = 0, instrptr;
int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs
*regs);
unsigned int type;
+ mm_segment_t fs;
+ unsigned int fault;
+ u16 tinstr = 0;
instrptr = instruction_pointer(regs);
- instr = *(unsigned long *)instrptr;
+
+ fs = get_fs();
+ set_fs(KERNEL_DS);
+ if thumb_mode(regs) {
+ fault = __get_user(tinstr, (u16 *)(instrptr & ~1));
+ if (!(fault))
+ instr = thumb2arm(tinstr);
+ } else
+ fault = __get_user(instr, (u32 *)instrptr);
+ set_fs(fs);
+
+ if (fault) {
+ type = TYPE_FAULT;
+ goto bad_or_fault;
+ }
if (user_mode(regs))
goto user;
@@ -467,7 +600,7 @@
fixup:
- regs->ARM_pc += 4;
+ regs->ARM_pc += thumb_mode(regs) ? 2 : 4;
switch (CODING_BITS(instr)) {
case 0x00000000: /* ldrh or strh */
@@ -537,7 +670,7 @@
bad_or_fault:
if (type == TYPE_ERROR)
goto bad;
- regs->ARM_pc -= 4;
+ regs->ARM_pc -= thumb_mode(regs) ? 2 : 4;
/*
* We got a fault - fix it up, or die.
*/
@@ -549,7 +682,9 @@
* Oops, we didn't handle the instruction.
*/
printk(KERN_ERR "Alignment trap: not handling instruction "
- "%08lx at [<%08lx>]\n", instr, instrptr);
+ "%0*lx at [<%08lx>]\n",
+ thumb_mode(regs) ? 4 : 8,
+ thumb_mode(regs) ? tinstr : instr, instrptr);
ai_skipped += 1;
return 1;
@@ -557,9 +692,12 @@
ai_user += 1;
if (ai_usermode & 1)
- printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%08lx "
+ printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%0*lx "
"Address=0x%08lx FSR 0x%03x\n", current->comm,
- current->pid, instrptr, instr, addr, fsr);
+ current->pid, instrptr,
+ thumb_mode(regs) ? 4 : 8,
+ thumb_mode(regs) ? tinstr : instr,
+ addr, fsr);
if (ai_usermode & 2)
goto fixup;
diff -urN linux/arch/arm/mm/consistent.c linux/arch/arm/mm/consistent.c
--- linux/arch/arm/mm/consistent.c 2004/10/12 14:36:32 1.22
+++ linux/arch/arm/mm/consistent.c 2005/01/13 14:05:19 1.23
@@ -1,7 +1,7 @@
/*
* linux/arch/arm/mm/consistent.c
*
- * Copyright (C) 2000-2002 Russell King
+ * Copyright (C) 2000-2004 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -65,6 +65,7 @@
struct list_head vm_list;
unsigned long vm_start;
unsigned long vm_end;
+ struct page *vm_pages;
};
static struct vm_region consistent_head = {
@@ -206,6 +207,8 @@
pte_t *pte = consistent_pte + CONSISTENT_OFFSET(c->vm_start);
struct page *end = page + (1 << order);
+ c->vm_pages = page;
+
/*
* Set the "dma handle"
*/
@@ -215,6 +218,9 @@
BUG_ON(!pte_none(*pte));
set_page_count(page, 1);
+ /*
+ * x86 does not mark the pages reserved...
+ */
SetPageReserved(page);
set_pte(pte, mk_pte(page, prot));
page++;
@@ -264,6 +270,50 @@
}
EXPORT_SYMBOL(dma_alloc_writecombine);
+static int dma_mmap(struct device *dev, struct vm_area_struct *vma,
+ void *cpu_addr, dma_addr_t dma_addr, size_t size)
+{
+ unsigned long flags, user_size, kern_size;
+ struct vm_region *c;
+ int ret = -ENXIO;
+
+ user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
+
+ spin_lock_irqsave(&consistent_lock, flags);
+ c = vm_region_find(&consistent_head, (unsigned long)cpu_addr);
+ spin_unlock_irqrestore(&consistent_lock, flags);
+
+ if (c) {
+ kern_size = (c->vm_end - c->vm_start) >> PAGE_SHIFT;
+
+ if (vma->vm_pgoff < kern_size &&
+ user_size <= (kern_size - vma->vm_pgoff)) {
+ vma->vm_flags |= VM_RESERVED;
+ ret = remap_pfn_range(vma, vma->vm_start,
+ page_to_pfn(c->vm_pages),
+ user_size, vma->vm_page_prot);
+ }
+ }
+
+ return ret;
+}
+
+int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
+ void *cpu_addr, dma_addr_t dma_addr, size_t size)
+{
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+ return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
+}
+EXPORT_SYMBOL(dma_mmap_coherent);
+
+int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
+ void *cpu_addr, dma_addr_t dma_addr, size_t size)
+{
+ vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
+ return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
+}
+EXPORT_SYMBOL(dma_mmap_writecombine);
+
/*
* free a page as defined by the above mapping.
*/
@@ -300,6 +350,10 @@
if (pfn_valid(pfn)) {
struct page *page = pfn_to_page(pfn);
+
+ /*
+ * x86 does not mark the pages reserved...
+ */
ClearPageReserved(page);
__free_page(page);
diff -urN linux/arch/arm/mm/init.c linux/arch/arm/mm/init.c
--- linux/arch/arm/mm/init.c 2004/11/15 11:49:15 1.54
+++ linux/arch/arm/mm/init.c 2005/01/13 14:05:19 1.55
@@ -15,6 +15,7 @@
#include <linux/init.h>
#include <linux/bootmem.h>
#include <linux/mman.h>
+#include <linux/nodemask.h>
#include <linux/initrd.h>
#include <asm/mach-types.h>
@@ -55,7 +56,7 @@
show_free_areas();
printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10));
- for (node = 0; node < numnodes; node++) {
+ for_each_online_node(node) {
struct page *page, *end;
page = NODE_MEM_MAP(node);
@@ -178,18 +179,14 @@
node = mi->bank[i].node;
- if (node >= numnodes) {
- numnodes = node + 1;
-
- /*
- * Make sure we haven't exceeded the maximum number
- * of nodes that we have in this configuration. If
- * we have, we're in trouble. (maybe we ought to
- * limit, instead of bugging?)
- */
- if (numnodes > MAX_NUMNODES)
- BUG();
- }
+ /*
+ * Make sure we haven't exceeded the maximum number of nodes
+ * that we have in this configuration. If we have, we're in
+ * trouble. (maybe we ought to limit, instead of bugging?)
+ */
+ if (node >= MAX_NUMNODES)
+ BUG();
+ node_set_online(node);
/*
* Get the start and end pfns for this bank
@@ -211,7 +208,7 @@
* Calculate the number of pages we require to
* store the bootmem bitmaps.
*/
- for (i = 0; i < numnodes; i++) {
+ for_each_online_node(i) {
if (np[i].end == 0)
continue;
@@ -380,13 +377,13 @@
* (we could also do with rolling bootmem_init and paging_init
* into one generic "memory_init" type function).
*/
- np += numnodes - 1;
- for (node = numnodes - 1; node >= 0; node--, np--) {
+ np += num_online_nodes() - 1;
+ for (node = num_online_nodes() - 1; node >= 0; node--, np--) {
/*
* If there are no pages in this node, ignore it.
* Note that node 0 must always have some pages.
*/
- if (np->end == 0) {
+ if (np->end == 0 || !node_online(node)) {
if (node == 0)
BUG();
continue;
@@ -449,7 +446,7 @@
/*
* initialise the zones within each node
*/
- for (node = 0; node < numnodes; node++) {
+ for_each_online_node(node) {
unsigned long zone_size[MAX_NR_ZONES];
unsigned long zhole_size[MAX_NR_ZONES];
struct bootmem_data *bdata;
@@ -558,7 +555,7 @@
create_memmap_holes(&meminfo);
/* this will put all unused low memory onto the freelists */
- for (node = 0; node < numnodes; node++) {
+ for_each_online_node(node) {
pg_data_t *pgdat = NODE_DATA(node);
if (pgdat->node_spanned_pages != 0)
diff -urN linux/arch/arm/mm/mm-armv.c linux/arch/arm/mm/mm-armv.c
--- linux/arch/arm/mm/mm-armv.c 2004/12/27 02:15:49 1.43
+++ linux/arch/arm/mm/mm-armv.c 2005/01/13 14:05:19 1.44
@@ -15,6 +15,7 @@
#include <linux/init.h>
#include <linux/bootmem.h>
#include <linux/highmem.h>
+#include <linux/nodemask.h>
#include <asm/pgalloc.h>
#include <asm/page.h>
@@ -239,7 +240,8 @@
/*
* Create a SECTION PGD between VIRT and PHYS in domain
- * DOMAIN with protection PROT
+ * DOMAIN with protection PROT. This operates on half-
+ * pgdir entry increments.
*/
static inline void
alloc_init_section(unsigned long virt, unsigned long phys, int prot)
@@ -481,6 +483,9 @@
length -= PAGE_SIZE;
}
+ /*
+ * A section mapping covers half a "pgdir" entry.
+ */
while (length >= (PGDIR_SIZE / 2)) {
alloc_init_section(virt, virt + off, prot_sect);
@@ -522,6 +527,7 @@
pmdval |= PMD_BIT4;
pmd = pmd_offset(pgd + i, i << PGDIR_SHIFT);
set_pmd(pmd, __pmd(pmdval));
+ set_pmd(pmd + 1, __pmd(pmdval + (1 << (PGDIR_SHIFT - 1))));
}
}
@@ -696,6 +702,6 @@
{
int node;
- for (node = 0; node < numnodes; node++)
+ for_each_online_node(node)
free_unused_memmap_node(node, mi);
}
diff -urN linux/arch/arm/mm/proc-arm1020.S linux/arch/arm/mm/proc-arm1020.S
--- linux/arch/arm/mm/proc-arm1020.S 2004/09/19 12:30:02 1.14
+++ linux/arch/arm/mm/proc-arm1020.S 2005/01/13 14:05:19 1.15
@@ -431,36 +431,29 @@
mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
- mcr p15, 0, r4, c2, c0 @ load page table pointer
- mov r0, #0x1f @ Domains 0, 1 = client
- mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register v4
-/*
- * Clear out 'unwanted' bits (then put them in if we need them)
- */
- bic r0, r0, #0x1e00 @ i...??r.........
- bic r0, r0, #0x000e @ ............wca.
-/*
- * Turn on what we want
- */
- orr r0, r0, #0x0031 @ ..........DP...M
- orr r0, r0, #0x0100 @ .......S........
-
+ ldr r5, arm1020_cr1_clear
+ bic r0, r0, r5
+ ldr r5, arm1020_cr1_set
+ orr r0, r0, r5
#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
- orr r0, r0, #0x4000 @ .R..............
-#endif
-#ifndef CONFIG_CPU_BPREDICT_DISABLE
- orr r0, r0, #0x0800 @ ....Z...........
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
- orr r0, r0, #0x0004 @ Enable D cache
-#endif
-#ifndef CONFIG_CPU_ICACHE_DISABLE
- orr r0, r0, #0x1000 @ I Cache on
+ orr r0, r0, #0x4000 @ .R.. .... .... ....
#endif
mov pc, lr
.size __arm1020_setup, . - __arm1020_setup
+ /*
+ * R
+ * .RVI ZFRS BLDP WCAM
+ * .0.1 1001 ..11 0101 /* FIXME: why no V bit? */
+ */
+ .type arm1020_cr1_clear, #object
+ .type arm1020_cr1_set, #object
+arm1020_cr1_clear:
+ .word 0x593f
+arm1020_cr1_set:
+ .word 0x1935
+
__INITDATA
/*
@@ -522,7 +515,9 @@
__arm1020_proc_info:
.long 0x4104a200 @ ARM 1020T (Architecture v5T)
.long 0xff0ffff0
- .long 0x00000c02 @ mmuflags
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __arm1020_setup
.long cpu_arch_name
.long cpu_elf_name
diff -urN linux/arch/arm/mm/proc-arm1020e.S linux/arch/arm/mm/proc-arm1020e.S
--- linux/arch/arm/mm/proc-arm1020e.S 2004/09/19 12:30:02 1.2
+++ linux/arch/arm/mm/proc-arm1020e.S 2005/01/13 14:05:19 1.3
@@ -413,36 +413,29 @@
mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
- mcr p15, 0, r4, c2, c0 @ load page table pointer
- mov r0, #0x1f @ Domains 0, 1 = client
- mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register v4
-/*
- * Clear out 'unwanted' bits (then put them in if we need them)
- */
- bic r0, r0, #0x1e00 @ i...??r.........
- bic r0, r0, #0x000e @ ............wca.
-/*
- * Turn on what we want
- */
- orr r0, r0, #0x0031 @ ..........DP...M
- orr r0, r0, #0x0100 @ .......S........
-
+ ldr r5, arm1020e_cr1_clear
+ bic r0, r0, r5
+ ldr r5, arm1020e_cr1_set
+ orr r0, r0, r5
#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
- orr r0, r0, #0x4000 @ .R..............
-#endif
-#ifndef CONFIG_CPU_BPREDICT_DISABLE
- orr r0, r0, #0x0800 @ ....Z...........
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
- orr r0, r0, #0x0004 @ Enable D cache
-#endif
-#ifndef CONFIG_CPU_ICACHE_DISABLE
- orr r0, r0, #0x1000 @ I Cache on
+ orr r0, r0, #0x4000 @ .R.. .... .... ....
#endif
mov pc, lr
.size __arm1020e_setup, . - __arm1020e_setup
+ /*
+ * R
+ * .RVI ZFRS BLDP WCAM
+ * .0.1 1001 ..11 0101 /* FIXME: why no V bit? */
+ */
+ .type arm1020e_cr1_clear, #object
+ .type arm1020e_cr1_set, #object
+arm1020e_cr1_clear:
+ .word 0x5f3f
+arm1020e_cr1_set:
+ .word 0x1935
+
__INITDATA
/*
@@ -504,7 +497,10 @@
__arm1020e_proc_info:
.long 0x4105a200 @ ARM 1020TE (Architecture v5TE)
.long 0xff0ffff0
- .long 0x00000c12 @ mmuflags
+ .long PMD_TYPE_SECT | \
+ PMD_BIT4 | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __arm1020e_setup
.long cpu_arch_name
.long cpu_elf_name
diff -urN linux/arch/arm/mm/proc-arm1022.S linux/arch/arm/mm/proc-arm1022.S
--- linux/arch/arm/mm/proc-arm1022.S 2004/09/19 12:30:02 1.2
+++ linux/arch/arm/mm/proc-arm1022.S 2005/01/13 14:05:19 1.3
@@ -394,36 +394,30 @@
mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
- mcr p15, 0, r4, c2, c0 @ load page table pointer
- mov r0, #0x1f @ Domains 0, 1 = client
- mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register v4
-/*
- * Clear out 'unwanted' bits (then put them in if we need them)
- */
- bic r0, r0, #0x1e00 @ ...i??r.........
- bic r0, r0, #0x000e @ ............wca.
-/*
- * Turn on what we want
- */
- orr r0, r0, #0x0031 @ ..........DP...M
- orr r0, r0, #0x2100 @ ..V....S........
-
+ ldr r5, arm1022_cr1_clear
+ bic r0, r0, r5
+ ldr r5, arm1022_cr1_set
+ orr r0, r0, r5
#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
orr r0, r0, #0x4000 @ .R..............
#endif
-#ifndef CONFIG_CPU_BPREDICT_DISABLE
- orr r0, r0, #0x0800 @ ....Z...........
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
- orr r0, r0, #0x0004 @ .............C..
-#endif
-#ifndef CONFIG_CPU_ICACHE_DISABLE
- orr r0, r0, #0x1000 @ ...I............
-#endif
mov pc, lr
.size __arm1022_setup, . - __arm1022_setup
+ /*
+ * R
+ * .RVI ZFRS BLDP WCAM
+ * .011 1001 ..11 0101
+ *
+ */
+ .type arm1022_cr1_clear, #object
+ .type arm1022_cr1_set, #object
+arm1022_cr1_clear:
+ .word 0x7f3f
+arm1022_cr1_set:
+ .word 0x3935
+
__INITDATA
/*
@@ -485,7 +479,10 @@
__arm1022_proc_info:
.long 0x4105a220 @ ARM 1022E (v5TE)
.long 0xff0ffff0
- .long 0x00000c12 @ mmuflags
+ .long PMD_TYPE_SECT | \
+ PMD_BIT4 | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __arm1022_setup
.long cpu_arch_name
.long cpu_elf_name
diff -urN linux/arch/arm/mm/proc-arm1026.S linux/arch/arm/mm/proc-arm1026.S
--- linux/arch/arm/mm/proc-arm1026.S 2004/09/19 12:30:02 1.3
+++ linux/arch/arm/mm/proc-arm1026.S 2005/01/13 14:05:19 1.4
@@ -389,35 +389,30 @@
mov r0, #4 @ explicitly disable writeback
mcr p15, 7, r0, c15, c0, 0
#endif
- mov r0, #0x1f @ Domains 0, 1 = client
- mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register v4
-/*
- * Clear out 'unwanted' bits (then put them in if we need them)
- */
- bic r0, r0, #0x1e00 @ ...i??r.........
- bic r0, r0, #0x000e @ ............wca.
-/*
- * Turn on what we want
- */
- orr r0, r0, #0x0031 @ ..........DP...M
- orr r0, r0, #0x2100 @ ..V....S........
-
+ ldr r5, arm1026_cr1_clear
+ bic r0, r0, r5
+ ldr r5, arm1026_cr1_set
+ orr r0, r0, r5
#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
- orr r0, r0, #0x4000 @ .R..............
-#endif
-#ifndef CONFIG_CPU_BPREDICT_DISABLE
- orr r0, r0, #0x0800 @ ....Z...........
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
- orr r0, r0, #0x0004 @ .............C..
-#endif
-#ifndef CONFIG_CPU_ICACHE_DISABLE
- orr r0, r0, #0x1000 @ ...I............
+ orr r0, r0, #0x4000 @ .R.. .... .... ....
#endif
mov pc, lr
.size __arm1026_setup, . - __arm1026_setup
+ /*
+ * R
+ * .RVI ZFRS BLDP WCAM
+ * .011 1001 ..11 0101
+ *
+ */
+ .type arm1026_cr1_clear, #object
+ .type arm1026_cr1_set, #object
+arm1026_cr1_clear:
+ .word 0x7f3f
+arm1026_cr1_set:
+ .word 0x3935
+
__INITDATA
/*
@@ -480,7 +475,10 @@
__arm1026_proc_info:
.long 0x4106a260 @ ARM 1026EJ-S (v5TEJ)
.long 0xff0ffff0
- .long 0x00000c12 @ mmuflags
+ .long PMD_TYPE_SECT | \
+ PMD_BIT4 | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __arm1026_setup
.long cpu_arch_name
.long cpu_elf_name
diff -urN linux/arch/arm/mm/proc-arm6_7.S linux/arch/arm/mm/proc-arm6_7.S
--- linux/arch/arm/mm/proc-arm6_7.S 2003/09/30 14:27:16 1.9
+++ linux/arch/arm/mm/proc-arm6_7.S 2005/01/13 14:05:19 1.10
@@ -253,9 +253,6 @@
__arm6_setup: mov r0, #0
mcr p15, 0, r0, c7, c0 @ flush caches on v3
mcr p15, 0, r0, c5, c0 @ flush TLBs on v3
- mcr p15, 0, r4, c2, c0 @ load page table
pointer
- mov r0, #0x1f @ Domains 0, 1 = client
- mcr p15, 0, r0, c3, c0 @ load domain access
register
mov r0, #0x3d @ . ..RS BLDP WCAM
orr r0, r0, #0x100 @ . ..01 0011 1101
mov pc, lr
@@ -265,8 +262,6 @@
__arm7_setup: mov r0, #0
mcr p15, 0, r0, c7, c0 @ flush caches on v3
mcr p15, 0, r0, c5, c0 @ flush TLBs on v3
- mcr p15, 0, r4, c2, c0 @ load page table
pointer
- mov r0, #0x1f @ Domains 0, 1 = client
mcr p15, 0, r0, c3, c0 @ load domain access
register
mov r0, #0x7d @ . ..RS BLDP WCAM
orr r0, r0, #0x100 @ . ..01 0111 1101
@@ -391,7 +386,12 @@
__arm710_proc_info:
.long 0x41007100
.long 0xfff8ff00
- .long 0x00000c1e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_BIT4 | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __arm7_setup
.long cpu_arch_name
.long cpu_elf_name
diff -urN linux/arch/arm/mm/proc-arm720.S linux/arch/arm/mm/proc-arm720.S
--- linux/arch/arm/mm/proc-arm720.S 2004/12/04 18:15:58 1.23
+++ linux/arch/arm/mm/proc-arm720.S 2005/01/13 14:05:19 1.24
@@ -124,37 +124,59 @@
mcr p15, 0, ip, c1, c0, 0 @ ctrl register
mov pc, r0
- __INIT
+ __INIT
- .type __arm710_setup, #function
-__arm710_setup: mov r0, #0
- mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
- mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4)
- mcr p15, 0, r4, c2, c0 @ load page table
pointer
- mov r0, #0x1f @ Domains 0, 1 = client
- mcr p15, 0, r0, c3, c0 @ load domain access
register
-
- mrc p15, 0, r0, c1, c0 @ get control register
- bic r0, r0, #0x0e00 @ ..V. ..RS BLDP WCAM
- orr r0, r0, #0x0100 @ .... .... .111 ....
(old)
- orr r0, r0, #0x003d @ .... ..01 ..11 1101
(new)
- mov pc, lr @ __ret (head.S)
- .size __arm710_setup, . - __arm710_setup
-
- .type __arm720_setup, #function
-__arm720_setup: mov r0, #0
- mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
- mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4)
- mcr p15, 0, r4, c2, c0 @ load page table
pointer
- mov r0, #0x1f @ Domains 0, 1 = client
- mcr p15, 0, r0, c3, c0 @ load domain access
register
-
- mrc p15, 0, r0, c1, c0 @ get control register
- bic r0, r0, #0x0e00 @ ..V. ..RS BLDP WCAM
- orr r0, r0, #0x2100 @ .... .... .111 ....
(old)
- orr r0, r0, #0x003d @ ..1. ..01 ..11 1101
(new)
- mov pc, lr @ __ret (head.S)
- .size __arm720_setup, . - __arm720_setup
+ .type __arm710_setup, #function
+__arm710_setup:
+ mov r0, #0
+ mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
+ mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4)
+ mrc p15, 0, r0, c1, c0 @ get control register
+ ldr r5, arm710_cr1_clear
+ bic r0, r0, r5
+ ldr r5, arm710_cr1_set
+ orr r0, r0, r5
+ mov pc, lr @ __ret (head.S)
+ .size __arm710_setup, . - __arm710_setup
+
+ /*
+ * R
+ * .RVI ZFRS BLDP WCAM
+ * .... 0001 ..11 1101
+ *
+ */
+ .type arm710_cr1_clear, #object
+ .type arm710_cr1_set, #object
+arm710_cr1_clear:
+ .word 0x0f3f
+arm710_cr1_set:
+ .word 0x013d
+
+ .type __arm720_setup, #function
+__arm720_setup:
+ mov r0, #0
+ mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
+ mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4)
+ mrc p15, 0, r0, c1, c0 @ get control register
+ ldr r5, arm720_cr1_clear
+ bic r0, r0, r5
+ ldr r5, arm720_cr1_set
+ orr r0, r0, r5
+ mov pc, lr @ __ret (head.S)
+ .size __arm720_setup, . - __arm720_setup
+
+ /*
+ * R
+ * .RVI ZFRS BLDP WCAM
+ * ..1. 1001 ..11 1101
+ *
+ */
+ .type arm720_cr1_clear, #object
+ .type arm720_cr1_set, #object
+arm720_cr1_clear:
+ .word 0x2f3f
+arm720_cr1_set:
+ .word 0x213d
__INITDATA
@@ -206,7 +228,12 @@
__arm710_proc_info:
.long 0x41807100 @ cpu_val
.long 0xffffff00 @ cpu_mask
- .long 0x00000c1e @
section_mmu_flags
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_BIT4 | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __arm710_setup @ cpu_flush
.long cpu_arch_name @ arch_name
.long cpu_elf_name @ elf_name
@@ -222,7 +249,12 @@
__arm720_proc_info:
.long 0x41807200 @ cpu_val
.long 0xffffff00 @ cpu_mask
- .long 0x00000c1e @
section_mmu_flags
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_BIT4 | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __arm720_setup @ cpu_flush
.long cpu_arch_name @ arch_name
.long cpu_elf_name @ elf_name
diff -urN linux/arch/arm/mm/proc-arm920.S linux/arch/arm/mm/proc-arm920.S
--- linux/arch/arm/mm/proc-arm920.S 2004/09/19 12:30:02 1.19
+++ linux/arch/arm/mm/proc-arm920.S 2005/01/13 14:05:19 1.20
@@ -382,33 +382,27 @@
mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
- mcr p15, 0, r4, c2, c0 @ load page table pointer
- mov r0, #0x1f @ Domains 0, 1 = client
- mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register v4
-/*
- * Clear out 'unwanted' bits (then put them in if we need them)
- */
- @ VI ZFRS BLDP WCAM
- bic r0, r0, #0x0e00
- bic r0, r0, #0x0002
- bic r0, r0, #0x000c
- bic r0, r0, #0x1000 @ ...0 000. .... 000.
-/*
- * Turn on what we want
- */
- orr r0, r0, #0x0031
- orr r0, r0, #0x2100 @ ..1. ...1 ..11 ...1
-
-#ifndef CONFIG_CPU_DCACHE_DISABLE
- orr r0, r0, #0x0004 @ .... .... .... .1..
-#endif
-#ifndef CONFIG_CPU_ICACHE_DISABLE
- orr r0, r0, #0x1000 @ ...1 .... .... ....
-#endif
+ ldr r5, arm920_cr1_clear
+ bic r0, r0, r5
+ ldr r5, arm920_cr1_set
+ orr r0, r0, r5
mov pc, lr
.size __arm920_setup, . - __arm920_setup
+ /*
+ * R
+ * .RVI ZFRS BLDP WCAM
+ * ..11 0001 ..11 0101
+ *
+ */
+ .type arm920_cr1_clear, #object
+ .type arm920_cr1_set, #object
+arm920_cr1_clear:
+ .word 0x3f3f
+arm920_cr1_set:
+ .word 0x3135
+
__INITDATA
/*
@@ -464,7 +458,12 @@
__arm920_proc_info:
.long 0x41009200
.long 0xff00fff0
- .long 0x00000c1e @ mmuflags
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_BIT4 | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __arm920_setup
.long cpu_arch_name
.long cpu_elf_name
diff -urN linux/arch/arm/mm/proc-arm922.S linux/arch/arm/mm/proc-arm922.S
--- linux/arch/arm/mm/proc-arm922.S 2004/09/19 12:30:02 1.15
+++ linux/arch/arm/mm/proc-arm922.S 2005/01/13 14:05:19 1.16
@@ -386,33 +386,27 @@
mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
- mcr p15, 0, r4, c2, c0 @ load page table pointer
- mov r0, #0x1f @ Domains 0, 1 = client
- mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register v4
-/*
- * Clear out 'unwanted' bits (then put them in if we need them)
- */
- @ VI ZFRS BLDP WCAM
- bic r0, r0, #0x0e00
- bic r0, r0, #0x0002
- bic r0, r0, #0x000c
- bic r0, r0, #0x1000 @ ...0 000. .... 000.
-/*
- * Turn on what we want
- */
- orr r0, r0, #0x0031
- orr r0, r0, #0x2100 @ ..1. ...1 ..11 ...1
-
-#ifndef CONFIG_CPU_DCACHE_DISABLE
- orr r0, r0, #0x0004 @ .... .... .... .1..
-#endif
-#ifndef CONFIG_CPU_ICACHE_DISABLE
- orr r0, r0, #0x1000 @ ...1 .... .... ....
-#endif
+ ldr r5, arm922_cr1_clear
+ bic r0, r0, r5
+ ldr r5, arm922_cr1_set
+ orr r0, r0, r5
mov pc, lr
.size __arm922_setup, . - __arm922_setup
+ /*
+ * R
+ * .RVI ZFRS BLDP WCAM
+ * ..11 0001 ..11 0101
+ *
+ */
+ .type arm922_cr1_clear, #object
+ .type arm922_cr1_set, #object
+arm922_cr1_clear:
+ .word 0x3f3f
+arm922_cr1_set:
+ .word 0x3135
+
__INITDATA
/*
@@ -468,7 +462,12 @@
__arm922_proc_info:
.long 0x41009220
.long 0xff00fff0
- .long 0x00000c1e @ mmuflags
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_BIT4 | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __arm922_setup
.long cpu_arch_name
.long cpu_elf_name
diff -urN linux/arch/arm/mm/proc-arm925.S linux/arch/arm/mm/proc-arm925.S
--- linux/arch/arm/mm/proc-arm925.S 2004/09/19 12:30:02 1.3
+++ linux/arch/arm/mm/proc-arm925.S 2005/01/13 14:05:19 1.4
@@ -439,45 +439,36 @@
mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
- mcr p15, 0, r4, c2, c0 @ load page table pointer
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
mov r0, #4 @ disable write-back on caches
explicitly
mcr p15, 7, r0, c15, c0, 0
#endif
- mov r0, #0x1f @ Domains 0, 1 = client
- mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register v4
-/*
- * Clear out 'unwanted' bits (then put them in if we need them)
- */
- @ VI ZFRS BLDP WCAM
- bic r0, r0, #0x0e00
- bic r0, r0, #0x0002
- bic r0, r0, #0x000c
- bic r0, r0, #0x1000 @ ...0 000. .... 000.
-/*
- * Turn on what we want
- */
- orr r0, r0, #0x0031
- orr r0, r0, #0x2100 @ ..1. ...1 ..11 ...1
-
- /* Writebuffer on */
- orr r0, r0, #0x0008 @ .... .... .... 1...
-
+ ldr r5, arm925_cr1_clear
+ bic r0, r0, r5
+ ldr r5, arm925_cr1_set
+ orr r0, r0, r5
#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
orr r0, r0, #0x4000 @ .1.. .... .... ....
#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
- orr r0, r0, #0x0004 @ .... .... .... .1..
-#endif
-#ifndef CONFIG_CPU_ICACHE_DISABLE
- orr r0, r0, #0x1000 @ ...1 .... .... ....
-#endif
mov pc, lr
.size __arm925_setup, . - __arm925_setup
+ /*
+ * R
+ * .RVI ZFRS BLDP WCAM
+ * .011 0001 ..11 1101
+ *
+ */
+ .type arm925_cr1_clear, #object
+ .type arm925_cr1_set, #object
+arm925_cr1_clear:
+ .word 0x7f3f
+arm925_cr1_set:
+ .word 0x313d
+
__INITDATA
/*
@@ -536,7 +527,10 @@
__arm925_proc_info:
.long 0x54029250
.long 0xfffffff0
- .long 0x00000c12 @ mmuflags
+ .long PMD_TYPE_SECT | \
+ PMD_BIT4 | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __arm925_setup
.long cpu_arch_name
.long cpu_elf_name
@@ -552,7 +546,10 @@
__arm915_proc_info:
.long 0x54029150
.long 0xfffffff0
- .long 0x00000c12 @ mmuflags
+ .long PMD_TYPE_SECT | \
+ PMD_BIT4 | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __arm925_setup
.long cpu_arch_name
.long cpu_elf_name
diff -urN linux/arch/arm/mm/proc-arm926.S linux/arch/arm/mm/proc-arm926.S
--- linux/arch/arm/mm/proc-arm926.S 2004/09/19 12:30:02 1.15
+++ linux/arch/arm/mm/proc-arm926.S 2005/01/13 14:05:19 1.16
@@ -388,7 +388,6 @@
mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
- mcr p15, 0, r4, c2, c0 @ load page table pointer
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
@@ -396,35 +395,30 @@
mcr p15, 7, r0, c15, c0, 0
#endif
- mov r0, #0x1f @ Domains 0, 1 = client
- mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0 @ get control register v4
-/*
- * Clear out 'unwanted' bits (then put them in if we need them)
- */
- @ VI ZFRS BLDP WCAM
- bic r0, r0, #0x0e00
- bic r0, r0, #0x0002
- bic r0, r0, #0x000c
- bic r0, r0, #0x1000 @ ...0 000. .... 000.
-/*
- * Turn on what we want
- */
- orr r0, r0, #0x0031
- orr r0, r0, #0x2100 @ ..1. ...1 ..11 ...1
-
+ ldr r5, arm926_cr1_clear
+ bic r0, r0, r5
+ ldr r5, arm926_cr1_set
+ orr r0, r0, r5
#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
orr r0, r0, #0x4000 @ .1.. .... .... ....
#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
- orr r0, r0, #0x0004 @ .... .... .... .1..
-#endif
-#ifndef CONFIG_CPU_ICACHE_DISABLE
- orr r0, r0, #0x1000 @ ...1 .... .... ....
-#endif
mov pc, lr
.size __arm926_setup, . - __arm926_setup
+ /*
+ * R
+ * .RVI ZFRS BLDP WCAM
+ * .011 0001 ..11 0101
+ *
+ */
+ .type arm926_cr1_clear, #object
+ .type arm926_cr1_set, #object
+arm926_cr1_clear:
+ .word 0x7f3f
+arm926_cr1_set:
+ .word 0x3135
+
__INITDATA
/*
@@ -483,7 +477,12 @@
__arm926_proc_info:
.long 0x41069260 @ ARM926EJ-S (v5TEJ)
.long 0xff0ffff0
- .long 0x00000c1e @ mmuflags
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_BIT4 | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __arm926_setup
.long cpu_arch_name
.long cpu_elf_name
diff -urN linux/arch/arm/mm/proc-sa110.S linux/arch/arm/mm/proc-sa110.S
--- linux/arch/arm/mm/proc-sa110.S 2003/09/30 14:27:16 1.35
+++ linux/arch/arm/mm/proc-sa110.S 2005/01/13 14:05:19 1.36
@@ -186,21 +186,31 @@
.type __sa110_setup, #function
__sa110_setup:
- mrc p15, 0, r0, c1, c0 @ get control register v4
- bic r0, r0, #0x2e00 @ ..VI ZFRS BLDP WCAM
- bic r0, r0, #0x0002 @ ..0. 000. .... ..0.
- orr r0, r0, #0x003d
- orr r0, r0, #0x1100 @ ...1 ...1 ..11 11.1
mov r10, #0
mcr p15, 0, r10, c7, c7 @ invalidate I,D caches on v4
mcr p15, 0, r10, c7, c10, 4 @ drain write buffer on v4
mcr p15, 0, r10, c8, c7 @ invalidate I,D TLBs on v4
- mcr p15, 0, r4, c2, c0 @ load page table pointer
- mov r10, #0x1f @ Domains 0, 1 = client
- mcr p15, 0, r10, c3, c0 @ load domain access register
+ mrc p15, 0, r0, c1, c0 @ get control register v4
+ ldr r5, sa110_cr1_clear
+ bic r0, r0, r5
+ ldr r5, sa110_cr1_set
+ orr r0, r0, r5
mov pc, lr
.size __sa110_setup, . - __sa110_setup
+ /*
+ * R
+ * .RVI ZFRS BLDP WCAM
+ * ..01 0001 ..11 1101
+ *
+ */
+ .type sa110_cr1_clear, #object
+ .type sa110_cr1_set, #object
+sa110_cr1_clear:
+ .word 0x3f3f
+sa110_cr1_set:
+ .word 0x113d
+
__INITDATA
/*
@@ -245,7 +255,11 @@
__sa110_proc_info:
.long 0x4401a100
.long 0xfffffff0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __sa110_setup
.long cpu_arch_name
.long cpu_elf_name
diff -urN linux/arch/arm/mm/proc-sa1100.S linux/arch/arm/mm/proc-sa1100.S
--- linux/arch/arm/mm/proc-sa1100.S 2004/06/30 17:26:45 1.4
+++ linux/arch/arm/mm/proc-sa1100.S 2005/01/13 14:05:19 1.5
@@ -209,21 +209,31 @@
.type __sa1100_setup, #function
__sa1100_setup:
- mov r10, #0
- mcr p15, 0, r10, c7, c7 @ invalidate I,D caches on v4
- mcr p15, 0, r10, c7, c10, 4 @ drain write buffer on v4
- mcr p15, 0, r10, c8, c7 @ invalidate I,D TLBs on v4
- mov r0, #0x1f @ Domains 0, 1 = client
- mcr p15, 0, r0, c3, c0 @ load domain access register
- mcr p15, 0, r4, c2, c0 @ load page table pointer
+ mov r0, #0
+ mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
+ mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
+ mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
mrc p15, 0, r0, c1, c0 @ get control register v4
- bic r0, r0, #0x0e00 @ ..VI ZFRS BLDP WCAM
- bic r0, r0, #0x0002 @ .... 000. .... ..0.
- orr r0, r0, #0x003d
- orr r0, r0, #0x3100 @ ..11 ...1 ..11 11.1
+ ldr r5, sa1100_cr1_clear
+ bic r0, r0, r5
+ ldr r5, sa1100_cr1_set
+ orr r0, r0, r5
mov pc, lr
.size __sa1100_setup, . - __sa1100_setup
+ /*
+ * R
+ * .RVI ZFRS BLDP WCAM
+ * ..11 0001 ..11 1101
+ *
+ */
+ .type sa1100_cr1_clear, #object
+ .type sa1100_cr1_set, #object
+sa1100_cr1_clear:
+ .word 0x3f3f
+sa1100_cr1_set:
+ .word 0x313d
+
__INITDATA
/*
@@ -276,7 +286,11 @@
__sa1100_proc_info:
.long 0x4401a110
.long 0xfffffff0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __sa1100_setup
.long cpu_arch_name
.long cpu_elf_name
@@ -292,7 +306,11 @@
__sa1110_proc_info:
.long 0x6901b110
.long 0xfffffff0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __sa1100_setup
.long cpu_arch_name
.long cpu_elf_name
diff -urN linux/arch/arm/mm/proc-v6.S linux/arch/arm/mm/proc-v6.S
--- linux/arch/arm/mm/proc-v6.S 2004/12/27 02:15:49 1.4
+++ linux/arch/arm/mm/proc-v6.S 2005/01/13 14:05:19 1.5
@@ -189,27 +189,24 @@
* - cache type register is implemented
*/
__v6_setup:
- mov r10, #0
- mcr p15, 0, r10, c7, c14, 0 @ clean+invalidate D cache
- mcr p15, 0, r10, c7, c5, 0 @ invalidate I cache
- mcr p15, 0, r10, c7, c15, 0 @ clean+invalidate cache
- mcr p15, 0, r10, c7, c10, 4 @ drain write buffer
- mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs
- mcr p15, 0, r10, c2, c0, 2 @ TTB control register
- mcr p15, 0, r4, c2, c0, 0 @ load TTB0
+ mov r0, #0
+ mcr p15, 0, r0, c7, c14, 0 @ clean+invalidate D cache
+ mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
+ mcr p15, 0, r0, c7, c15, 0 @ clean+invalidate cache
+ mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
+ mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs
+ mcr p15, 0, r0, c2, c0, 2 @ TTB control register
mcr p15, 0, r4, c2, c0, 1 @ load TTB1
- mov r10, #0x1f @ domains 0, 1 = manager
- mcr p15, 0, r10, c3, c0, 0 @ load domain access register
- mrc p15, 0, r0, c1, c0, 0 @ read control register
#ifdef CONFIG_VFP
- mrc p15, 0, r10, c1, c0, 2
- orr r10, r10, #(3 << 20)
- mcr p15, 0, r10, c1, c0, 2 @ Enable full access to VFP
+ mrc p15, 0, r0, c1, c0, 2
+ orr r0, r0, #(3 << 20)
+ mcr p15, 0, r0, c1, c0, 2 @ Enable full access to VFP
#endif
- ldr r10, cr1_clear @ get mask for bits to clear
- bic r0, r0, r10 @ clear bits them
- ldr r10, cr1_set @ get mask for bits to set
- orr r0, r0, r10 @ set them
+ mrc p15, 0, r0, c1, c0, 0 @ read control register
+ ldr r5, v6_cr1_clear @ get mask for bits to clear
+ bic r0, r0, r5 @ clear bits them
+ ldr r5, v6_cr1_set @ get mask for bits to set
+ orr r0, r0, r5 @ set them
mov pc, lr @ return to head.S:__ret
/*
@@ -218,11 +215,11 @@
* rrrr rrrx xxx0 0101 xxxx xxxx x111 xxxx < forced
* 0 110 0011 1.00 .111 1101 < we want
*/
- .type cr1_clear, #object
- .type cr1_set, #object
-cr1_clear:
- .word 0x0120c302
-cr1_set:
+ .type v6_cr1_clear, #object
+ .type v6_cr1_set, #object
+v6_cr1_clear:
+ .word 0x01e0fb7f
+v6_cr1_set:
.word 0x00c0387d
.type v6_processor_functions, #object
@@ -257,7 +254,11 @@
__v6_proc_info:
.long 0x0007b000
.long 0x0007f000
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __v6_setup
.long cpu_arch_name
.long cpu_elf_name
diff -urN linux/arch/arm/mm/proc-xscale.S linux/arch/arm/mm/proc-xscale.S
--- linux/arch/arm/mm/proc-xscale.S 2004/12/27 02:15:49 1.21
+++ linux/arch/arm/mm/proc-xscale.S 2005/01/13 14:05:19 1.22
@@ -594,14 +594,9 @@
.type __xscale_setup, #function
__xscale_setup:
- mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
- msr cpsr_c, r0
mcr p15, 0, ip, c7, c7, 0 @ invalidate I, D caches & BTB
mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer
mcr p15, 0, ip, c8, c7, 0 @ invalidate I, D TLBs
- mcr p15, 0, r4, c2, c0, 0 @ load page table pointer
- mov r0, #0x1f @ Domains 0, 1 = client
- mcr p15, 0, r0, c3, c0, 0 @ load domain access register
#ifdef CONFIG_IWMMXT
mov r0, #0 @ initially disallow access to
CP0/CP1
#else
@@ -611,13 +606,26 @@
orr r0, r0, #1 << 13 @ Its undefined whether this
mcr p15, 0, r0, c15, c1, 0 @ affects USR or SVC modes
mrc p15, 0, r0, c1, c0, 0 @ get control register
- bic r0, r0, #0x0200 @ .... ..R. .... ....
- bic r0, r0, #0x0002 @ .... .... .... ..A.
- orr r0, r0, #0x0005 @ .... .... .... .C.M
- orr r0, r0, #0x3900 @ ..VI Z..S .... ....
+ ldr r5, xscale_cr1_clear
+ bic r0, r0, r5
+ ldr r5, xscale_cr1_set
+ orr r0, r0, r5
mov pc, lr
.size __xscale_setup, . - __xscale_setup
+ /*
+ * R
+ * .RVI ZFRS BLDP WCAM
+ * ..11 1.01 .... .101
+ *
+ */
+ .type xscale_cr1_clear, #object
+ .type xscale_cr1_set, #object
+xscale_cr1_clear:
+ .word 0x3b07
+xscale_cr1_set:
+ .word 0x3905
+
__INITDATA
/*
@@ -712,7 +720,11 @@
__80200_proc_info:
.long 0x69052000
.long 0xfffffff0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
@@ -728,7 +740,11 @@
__8032x_proc_info:
.long 0x69052420
.long 0xfffff5e0 @ mask should accomodate IOP80219 also
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
@@ -742,9 +758,13 @@
.type __8033x_proc_info,#object
__8033x_proc_info:
- .long 0x69054090
- .long 0xffffffb0
- .long 0x00000c0e
+ .long 0x69054010
+ .long 0xffffff30
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
@@ -760,7 +780,11 @@
__pxa250_proc_info:
.long 0x69052100
.long 0xfffff7f0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
@@ -776,7 +800,11 @@
__pxa210_proc_info:
.long 0x69052120
.long 0xfffff3f0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
@@ -792,7 +820,11 @@
__ixp2400_proc_info:
.long 0x69054190
.long 0xfffffff0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
@@ -808,7 +840,11 @@
__ixp2800_proc_info:
.long 0x690541a0
.long 0xfffffff0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
@@ -824,7 +860,11 @@
__ixp42x_proc_info:
.long 0x690541c0
.long 0xffffffc0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
@@ -856,7 +896,11 @@
__pxa255_proc_info:
.long 0x69052d00
.long 0xfffffff0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
@@ -872,7 +916,11 @@
__pxa270_proc_info:
.long 0x69054110
.long 0xfffffff0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
diff -urN linux/arch/arm/oprofile/common.c linux/arch/arm/oprofile/common.c
--- linux/arch/arm/oprofile/common.c 2004/04/23 15:54:06 1.1
+++ linux/arch/arm/oprofile/common.c 2005/01/13 14:05:20 1.2
@@ -24,14 +24,6 @@
static void pmu_stop(void);
static int pmu_create_files(struct super_block *, struct dentry *);
-static struct oprofile_operations pmu_ops = {
- .create_files = pmu_create_files,
- .setup = pmu_setup,
- .shutdown = pmu_stop,
- .start = pmu_start,
- .stop = pmu_stop,
-};
-
#ifdef CONFIG_PM
static struct sys_device device_oprofile = {
.id = 0,
@@ -113,19 +105,22 @@
up(&pmu_sem);
}
-int __init pmu_init(struct oprofile_operations **ops, struct op_arm_model_spec
*spec)
+void __init pmu_init(struct oprofile_operations *ops, struct op_arm_model_spec
*spec)
{
init_MUTEX(&pmu_sem);
if (spec->init() < 0)
- return -ENODEV;
+ return;
pmu_model = spec;
init_driverfs();
- *ops = &pmu_ops;
- pmu_ops.cpu_type = pmu_model->name;
+ ops->create_files = pmu_create_files;
+ ops->setup = pmu_setup;
+ ops->shutdown = pmu_stop;
+ ops->start = pmu_start;
+ ops->stop = pmu_stop;
+ ops->cpu_type = pmu_model->name;
printk(KERN_INFO "oprofile: using %s PMU\n", spec->name);
- return 0;
}
void pmu_exit(void)
diff -urN linux/arch/arm/oprofile/init.c linux/arch/arm/oprofile/init.c
--- linux/arch/arm/oprofile/init.c 2004/04/23 15:54:06 1.2
+++ linux/arch/arm/oprofile/init.c 2005/01/13 14:05:20 1.3
@@ -12,14 +12,11 @@
#include <linux/errno.h>
#include "op_arm_model.h"
-int __init oprofile_arch_init(struct oprofile_operations **ops)
+void __init oprofile_arch_init(struct oprofile_operations *ops)
{
- int ret = -ENODEV;
-
#ifdef CONFIG_CPU_XSCALE
- ret = pmu_init(ops, &op_xscale_spec);
+ pmu_init(ops, &op_xscale_spec);
#endif
- return ret;
}
void oprofile_arch_exit(void)
diff -urN linux/arch/arm/oprofile/op_model_xscale.c
linux/arch/arm/oprofile/op_model_xscale.c
--- linux/arch/arm/oprofile/op_model_xscale.c 2004/09/19 12:30:02 1.4
+++ linux/arch/arm/oprofile/op_model_xscale.c 2005/01/13 14:05:20 1.5
@@ -343,8 +343,7 @@
static irqreturn_t xscale_pmu_interrupt(int irq, void *arg, struct pt_regs
*regs)
{
- unsigned long pc = profile_pc(regs);
- int i, is_kernel = !user_mode(regs);
+ int i;
u32 pmnc;
if (pmu->id == PMU_XSC1)
@@ -357,7 +356,7 @@
continue;
write_counter(i, -(u32)results[i].reset_counter);
- oprofile_add_sample(pc, is_kernel, i, smp_processor_id());
+ oprofile_add_sample(regs, i);
results[i].ovf--;
}
diff -urN linux/arch/arm/tools/mach-types linux/arch/arm/tools/mach-types
--- linux/arch/arm/tools/mach-types 2004/11/15 11:49:15 1.40
+++ linux/arch/arm/tools/mach-types 2005/01/13 14:05:20 1.41
@@ -6,7 +6,7 @@
# To add an entry into this database, please see Documentation/arm/README,
# or contact rmk@arm.linux.org.uk
#
-# Last update: Sun Nov 7 13:20:41 2004
+# Last update: Thu Jan 6 00:10:23 2005
#
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
#
@@ -226,7 +226,7 @@
pnp1110 SA1100_PNP1110 PNP1110
215
csb226 ARCH_CSB226 CSB226 216
arnold SA1100_ARNOLD ARNOLD 217
-psiboard SA1100_PSIBOARD PSIBOARD 218
+voiceblue SA1100_PSIBOARD PSIBOARD 218
jz8028 ARCH_JZ8028 JZ8028 219
h5400 ARCH_H5400 H5400 220
forte SA1100_FORTE FORTE 221
@@ -250,8 +250,8 @@
pdb ARCH_PDB PDB 239
blue_2g SA1100_BLUE_2G BLUE_2G
240
bluearch SA1100_BLUEARCH BLUEARCH 241
-ixdp2400 ARCH_IXDB2400 IXDB2400 242
-ixdp2800 ARCH_IXDB2800 IXDB2800 243
+ixdp2400 ARCH_IXDP2400 IXDP2400 242
+ixdp2800 ARCH_IXDP2800 IXDP2800 243
explorer SA1100_EXPLORER EXPLORER 244
ixdp425 ARCH_IXDP425 IXDP425
245
chimp ARCH_CHIMP CHIMP 246
@@ -634,3 +634,36 @@
cm4008 MACH_CM4008 CM4008 624
p2001 MACH_P2001 P2001 625
twister MACH_TWISTER TWISTER
626
+mudshark MACH_MUDSHARK MUDSHARK 627
+hb2 MACH_HB2 HB2 628
+iq80332 MACH_IQ80332 IQ80332
629
+sendt MACH_SENDT SENDT 630
+mx2jazz MACH_MX2JAZZ MX2JAZZ
631
+multiio MACH_MULTIIO MULTIIO
632
+hrdisplay MACH_HRDISPLAY HRDISPLAY 633
+scma11bb MACH_SCMA11BB SCMA11BB 634
+trizeps3 MACH_TRIZEPS3 TRIZEPS3 635
+zefeerdza MACH_ZEFEERDZA ZEFEERDZA 636
+zefeerdzb MACH_ZEFEERDZB ZEFEERDZB 637
+zefeerdzg MACH_ZEFEERDZG ZEFEERDZG 638
+zefeerdzn MACH_ZEFEERDZN ZEFEERDZN 639
+zefeerdzq MACH_ZEFEERDZQ ZEFEERDZQ 640
+gtwx5715 MACH_GTWX5715 GTWX5715 641
+unknown MACH_VL420 VL420
642
+astro_jack MACH_ASTRO_JACK ASTRO_JACK 643
+tip03 MACH_TIP03 TIP03 644
+a9200ec MACH_A9200EC A9200EC
645
+pnx0105 MACH_PNX0105 PNX0105
646
+adcpoecpu MACH_ADCPOECPU ADCPOECPU 647
+csb637 MACH_CSB637 CSB637 648
+ml69q6203 MACH_ML69Q6203 ML69Q6203 649
+mb9200 MACH_MB9200 MB9200 650
+kulun MACH_KULUN KULUN 651
+snapper MACH_SNAPPER SNAPPER
652
+optima MACH_OPTIMA OPTIMA 653
+dlhsbc MACH_DLHSBC DLHSBC 654
+x30 MACH_X30 X30 655
+n30 MACH_N30 N30 656
+manga_ks8695 MACH_MANGA_KS8695 MANGA_KS8695 657
+ajax MACH_AJAX AJAX 658
+nec_mp900 MACH_NEC_MP900 NEC_MP900 659
diff -urN linux/arch/arm26/ACKNOWLEDGEMENTS linux/arch/arm26/ACKNOWLEDGEMENTS
--- linux/arch/arm26/ACKNOWLEDGEMENTS 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/ACKNOWLEDGEMENTS 2005/01/13 14:05:20 1.2
@@ -15,6 +15,8 @@
Russell King
Keith Owens
+also thanks to Nicholas Pitre for hints, and for the basis or our XIP support.
+
Currently maintaing the code are
Ian Molton (Maintainer / Archimedes)
diff -urN linux/arch/arm26/Kconfig linux/arch/arm26/Kconfig
--- linux/arch/arm26/Kconfig 2004/08/24 15:10:04 1.11
+++ linux/arch/arm26/Kconfig 2005/01/13 14:05:20 1.12
@@ -45,6 +45,10 @@
config RWSEM_XCHGADD_ALGORITHM
bool
+config GENERIC_CALIBRATE_DELAY
+ bool
+ default y
+
config GENERIC_BUST_SPINLOCK
bool
diff -urN linux/arch/arm26/Makefile linux/arch/arm26/Makefile
--- linux/arch/arm26/Makefile 2004/09/19 12:30:02 1.4
+++ linux/arch/arm26/Makefile 2005/01/13 14:05:20 1.5
@@ -6,6 +6,7 @@
# for more details.
#
# Copyright (C) 1995-2001 by Russell King
+# Copyright (c) 2004 Ian Molton
LDFLAGS_vmlinux :=-p -X
CPPFLAGS_vmlinux.lds = -DTEXTADDR=$(TEXTADDR) -DDATAADDR=$(DATAADDR)
@@ -20,13 +21,9 @@
CFLAGS +=-g
endif
-# Force -mno-fpu to be passed to the assembler. Some versions of gcc don't
-# do this with -msoft-float
-CFLAGS_BOOT :=-mapcs-26 -mcpu=arm3 -mshort-load-bytes -msoft-float
-Wa,-mno-fpu -Uarm
-CFLAGS +=-mapcs-26 -mcpu=arm3 -mshort-load-bytes -msoft-float
-Wa,-mno-fpu -Uarm
-AFLAGS +=-mapcs-26 -mcpu=arm3 -mno-fpu -msoft-float -Wa,-mno-fpu
-
-head-y := arch/arm26/machine/head.o arch/arm26/kernel/init_task.o
+CFLAGS_BOOT :=-mapcs-26 -mcpu=arm3 -msoft-float -Uarm
+CFLAGS +=-mapcs-26 -mcpu=arm3 -msoft-float -Uarm
+AFLAGS +=-mapcs-26 -mcpu=arm3 -msoft-float
ifeq ($(CONFIG_XIP_KERNEL),y)
TEXTADDR := 0x03880000
@@ -36,6 +33,8 @@
DATAADDR := .
endif
+head-y := arch/arm26/kernel/head.o arch/arm26/kernel/init_task.o
+
ifeq ($(incdir-y),)
incdir-y :=
endif
@@ -109,6 +108,7 @@
echo '* zImage - Compressed kernel image (arch/$(ARCH)/boot/zImage)'
echo ' Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)'
echo ' bootpImage - Combined zImage and initial RAM disk'
+ echo ' xipImage - eXecute In Place capable image for ROM use
(arch/$(ARCH)/boot/xipImage)'
echo ' initrd - Create an initial image'
echo ' install - Install uncompressed kernel'
echo ' zinstall - Install compressed kernel'
diff -urN linux/arch/arm26/boot/Makefile linux/arch/arm26/boot/Makefile
--- linux/arch/arm26/boot/Makefile 2004/09/19 12:30:02 1.3
+++ linux/arch/arm26/boot/Makefile 2005/01/13 14:05:20 1.4
@@ -1,5 +1,5 @@
#
-# arch/arm/boot/Makefile
+# arch/arm26/boot/Makefile
#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
@@ -51,8 +51,10 @@
ifeq ($(CONFIG_XIP_KERNEL),y)
$(obj)/xipImage: vmlinux FORCE
- $(OBJCOPY) -S -O binary -R .data -R .comment vmlinux vmlinux-text.bin
- $(OBJCOPY) -S -O binary -R .init -R .text -R .comment -R __ex_table -R
__ksymtab vmlinux vmlinux-data.bin
+# $(OBJCOPY) -S -O binary -R .data -R .comment vmlinux vmlinux-text.bin
+# FIXME - where has .pci_fixup crept in from?
+ $(OBJCOPY) -S -O binary -R .data -R .pci_fixup -R .comment vmlinux
vmlinux-text.bin
+ $(OBJCOPY) -S -O binary -R .init -R .text -R __ex_table -R .pci_fixup
-R __ksymtab -R __ksymtab_gpl -R __kcrctab -R __kcrctab_gpl -R __param -R
.comment vmlinux vmlinux-data.bin
cat vmlinux-text.bin vmlinux-data.bin > $@
$(RM) -f vmlinux-text.bin vmlinux-data.bin
@echo ' Kernel: $@ is ready'
diff -urN linux/arch/arm26/boot/install.sh linux/arch/arm26/boot/install.sh
--- linux/arch/arm26/boot/install.sh 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/boot/install.sh 2005/01/13 14:05:20 1.2
@@ -1,6 +1,6 @@
#!/bin/sh
#
-# arch/arm/boot/install.sh
+# arch/arm26/boot/install.sh
#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
@@ -10,7 +10,7 @@
#
# Adapted from code in arch/i386/boot/Makefile by H. Peter Anvin
# Adapted from code in arch/i386/boot/install.sh by Russell King
-# Stolen from arch/arm/boot/install.sh by Ian Molton
+# Stolen from arm32 by Ian Molton
#
# "make install" script for arm architecture
#
diff -urN linux/arch/arm26/boot/compressed/head.S
linux/arch/arm26/boot/compressed/head.S
--- linux/arch/arm26/boot/compressed/head.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/boot/compressed/head.S 2005/01/13 14:05:20 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/boot/compressed/head.S
+ * linux/arch/arm26/boot/compressed/head.S
*
* Copyright (C) 1996-2002 Russell King
*
diff -urN linux/arch/arm26/boot/compressed/ll_char_wr.S
linux/arch/arm26/boot/compressed/ll_char_wr.S
--- linux/arch/arm26/boot/compressed/ll_char_wr.S 2003/06/22 23:09:47
1.1
+++ linux/arch/arm26/boot/compressed/ll_char_wr.S 2005/01/13 14:05:20
1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/ll_char_wr.S
+ * linux/arch/arm26/lib/ll_char_wr.S
*
* Copyright (C) 1995, 1996 Russell King.
*
diff -urN linux/arch/arm26/boot/compressed/uncompress.h
linux/arch/arm26/boot/compressed/uncompress.h
--- linux/arch/arm26/boot/compressed/uncompress.h 2003/06/22 23:09:47
1.1
+++ linux/arch/arm26/boot/compressed/uncompress.h 2005/01/13 14:05:20
1.2
@@ -1,5 +1,4 @@
/*
- * linux/include/asm-arm/arch-arc/uncompress.h
*
* Copyright (C) 1996 Russell King
*
diff -urN linux/arch/arm26/boot/compressed/vmlinux.lds.in
linux/arch/arm26/boot/compressed/vmlinux.lds.in
--- linux/arch/arm26/boot/compressed/vmlinux.lds.in 2003/06/22 23:09:47
1.1
+++ linux/arch/arm26/boot/compressed/vmlinux.lds.in 2005/01/13 14:05:20
1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/boot/compressed/vmlinux.lds.in
+ * linux/arch/arm26/boot/compressed/vmlinux.lds.in
*
* Copyright (C) 2000 Russell King
*
diff -urN linux/arch/arm26/boot/compressed/ofw-shark.c
linux/arch/arm26/boot/compressed/ofw-shark.c
--- linux/arch/arm26/boot/compressed/Attic/ofw-shark.c Thu Jan 13 14:05:20
2005 1.1
+++ linux/arch/arm26/boot/compressed/Attic/ofw-shark.c 1970/01/01 00:00:002002
@@ -1,258 +0,0 @@
-/*
- * linux/arch/arm/boot/compressed/ofw-shark.c
- *
- * by Alexander Schulz
- *
- * This file is used to get some basic information
- * about the memory layout of the shark we are running
- * on. Memory is usually divided in blocks a 8 MB.
- * And bootargs are copied from OpenFirmware.
- */
-
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <asm/setup.h>
-#include <asm/page.h>
-
-
-asmlinkage void
-create_params (unsigned long *buffer)
-{
- /* Is there a better address? Also change in mach-shark/core.c */
- struct tag *tag = (struct tag *) 0x08003000;
- int j,i,m,k,nr_banks,size;
- unsigned char *c;
-
- /* Head of the taglist */
- tag->hdr.tag = ATAG_CORE;
- tag->hdr.size = tag_size(tag_core);
- tag->u.core.flags = FLAG_READONLY;
- tag->u.core.pagesize = PAGE_SIZE;
- tag->u.core.rootdev = 0;
-
- /* Build up one tagged block for each memory region */
- size=0;
- nr_banks=(unsigned int) buffer[0];
- for (j=0;j<nr_banks;j++){
- /* search the lowest address and put it into the next entry */
- /* not a fast sort algorithm, but there are at most 8 entries */
- /* and this is used only once anyway */
- m=0xffffffff;
- for (i=0;i<(unsigned int) buffer[0];i++){
- if (buffer[2*i+1]<m) {
- m=buffer[2*i+1];
- k=i;
- }
- }
-
- tag = tag_next(tag);
- tag->hdr.tag = ATAG_MEM;
- tag->hdr.size = tag_size(tag_mem32);
- tag->u.mem.size = buffer[2*k+2];
- tag->u.mem.start = buffer[2*k+1];
-
- size += buffer[2*k+2];
-
- buffer[2*k+1]=0xffffffff; /* mark as copied
*/
- }
-
- /* The command line */
- tag = tag_next(tag);
- tag->hdr.tag = ATAG_CMDLINE;
-
- c=(unsigned char *)(&buffer[34]);
- j=0;
- while (*c) tag->u.cmdline.cmdline[j++]=*c++;
-
- tag->u.cmdline.cmdline[j]=0;
- tag->hdr.size = (j + 7 + sizeof(struct tag_header)) >> 2;
-
- /* Hardware revision */
- tag = tag_next(tag);
- tag->hdr.tag = ATAG_REVISION;
- tag->hdr.size = tag_size(tag_revision);
- tag->u.revision.rev = ((unsigned char) buffer[33])-'0';
-
- /* End of the taglist */
- tag = tag_next(tag);
- tag->hdr.tag = 0;
- tag->hdr.size = 0;
-}
-
-
-typedef int (*ofw_handle_t)(void *);
-
-/* Everything below is called with a wrong MMU setting.
- * This means: no string constants, no initialization of
- * arrays, no global variables! This is ugly but I didn't
- * want to write this in assembler :-)
- */
-
-int
-of_decode_int(const unsigned char *p)
-{
- unsigned int i = *p++ << 8;
- i = (i + *p++) << 8;
- i = (i + *p++) << 8;
- return (i + *p);
-}
-
-int
-OF_finddevice(ofw_handle_t openfirmware, char *name)
-{
- unsigned int args[8];
- char service[12];
-
- service[0]='f';
- service[1]='i';
- service[2]='n';
- service[3]='d';
- service[4]='d';
- service[5]='e';
- service[6]='v';
- service[7]='i';
- service[8]='c';
- service[9]='e';
- service[10]='\0';
-
- args[0]=(unsigned int)service;
- args[1]=1;
- args[2]=1;
- args[3]=(unsigned int)name;
-
- if (openfirmware(args) == -1)
- return -1;
- return args[4];
-}
-
-int
-OF_getproplen(ofw_handle_t openfirmware, int handle, char *prop)
-{
- unsigned int args[8];
- char service[12];
-
- service[0]='g';
- service[1]='e';
- service[2]='t';
- service[3]='p';
- service[4]='r';
- service[5]='o';
- service[6]='p';
- service[7]='l';
- service[8]='e';
- service[9]='n';
- service[10]='\0';
-
- args[0] = (unsigned int)service;
- args[1] = 2;
- args[2] = 1;
- args[3] = (unsigned int)handle;
- args[4] = (unsigned int)prop;
-
- if (openfirmware(args) == -1)
- return -1;
- return args[5];
-}
-
-int
-OF_getprop(ofw_handle_t openfirmware, int handle, char *prop, void *buf,
unsigned int buflen)
-{
- unsigned int args[8];
- char service[8];
-
- service[0]='g';
- service[1]='e';
- service[2]='t';
- service[3]='p';
- service[4]='r';
- service[5]='o';
- service[6]='p';
- service[7]='\0';
-
- args[0] = (unsigned int)service;
- args[1] = 4;
- args[2] = 1;
- args[3] = (unsigned int)handle;
- args[4] = (unsigned int)prop;
- args[5] = (unsigned int)buf;
- args[6] = buflen;
-
- if (openfirmware(args) == -1)
- return -1;
- return args[7];
-}
-
-asmlinkage void ofw_init(ofw_handle_t o, int *nomr, int *pointer)
-{
- int phandle,i,mem_len,buffer[32];
- char temp[15];
-
- temp[0]='/';
- temp[1]='m';
- temp[2]='e';
- temp[3]='m';
- temp[4]='o';
- temp[5]='r';
- temp[6]='y';
- temp[7]='\0';
-
- phandle=OF_finddevice(o,temp);
-
- temp[0]='r';
- temp[1]='e';
- temp[2]='g';
- temp[3]='\0';
-
- mem_len = OF_getproplen(o,phandle, temp);
- OF_getprop(o,phandle, temp, buffer, mem_len);
- *nomr=mem_len >> 3;
-
- for (i=0; i<=mem_len/4; i++) pointer[i]=of_decode_int((const unsigned
char *)&buffer[i]);
-
- temp[0]='/';
- temp[1]='c';
- temp[2]='h';
- temp[3]='o';
- temp[4]='s';
- temp[5]='e';
- temp[6]='n';
- temp[7]='\0';
-
- phandle=OF_finddevice(o,temp);
-
- temp[0]='b';
- temp[1]='o';
- temp[2]='o';
- temp[3]='t';
- temp[4]='a';
- temp[5]='r';
- temp[6]='g';
- temp[7]='s';
- temp[8]='\0';
-
- mem_len = OF_getproplen(o,phandle, temp);
- OF_getprop(o,phandle, temp, buffer, mem_len);
- if (mem_len > 128) mem_len=128;
- for (i=0; i<=mem_len/4; i++) pointer[i+33]=buffer[i];
- pointer[i+33]=0;
-
- temp[0]='/';
- temp[1]='\0';
- phandle=OF_finddevice(o,temp);
- temp[0]='b';
- temp[1]='a';
- temp[2]='n';
- temp[3]='n';
- temp[4]='e';
- temp[5]='r';
- temp[6]='-';
- temp[7]='n';
- temp[8]='a';
- temp[9]='m';
- temp[10]='e';
- temp[11]='\0';
- mem_len = OF_getproplen(o,phandle, temp);
- OF_getprop(o,phandle, temp, buffer, mem_len);
- (unsigned char) pointer[32] = ((unsigned char *) buffer)[mem_len-2];
-}
diff -urN linux/arch/arm26/kernel/calls.S linux/arch/arm26/kernel/calls.S
--- linux/arch/arm26/kernel/calls.S 1970/01/01 00:00:00
+++ linux/arch/arm26/kernel/calls.S Thu Jan 13 14:05:20 2005 1.1
@@ -0,0 +1,265 @@
+/*
+ * linux/arch/arm26/kernel/calls.S
+ *
+ * Copyright (C) 2003 Ian Molton
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * FIXME
+ * This file is included twice in entry.S which may not be necessary
+ */
+
+//FIXME - clearly NR_syscalls is never defined here
+
+#ifndef NR_syscalls
+#define NR_syscalls 256
+#else
+
+__syscall_start:
+/* 0 */ .long sys_ni_syscall
+ .long sys_exit
+ .long sys_fork_wrapper
+ .long sys_read
+ .long sys_write
+/* 5 */ .long sys_open
+ .long sys_close
+ .long sys_ni_syscall /* was sys_waitpid */
+ .long sys_creat
+ .long sys_link
+/* 10 */ .long sys_unlink
+ .long sys_execve_wrapper
+ .long sys_chdir
+ .long sys_time /* used by libc4 */
+ .long sys_mknod
+/* 15 */ .long sys_chmod
+ .long sys_lchown16
+ .long sys_ni_syscall /* was sys_break */
+ .long sys_ni_syscall /* was sys_stat */
+ .long sys_lseek
+/* 20 */ .long sys_getpid
+ .long sys_mount
+ .long sys_oldumount /* used by libc4 */
+ .long sys_setuid16
+ .long sys_getuid16
+/* 25 */ .long sys_stime
+ .long sys_ptrace
+ .long sys_alarm /* used by libc4 */
+ .long sys_ni_syscall /* was sys_fstat */
+ .long sys_pause
+/* 30 */ .long sys_utime /* used by libc4 */
+ .long sys_ni_syscall /* was sys_stty */
+ .long sys_ni_syscall /* was sys_getty */
+ .long sys_access
+ .long sys_nice
+/* 35 */ .long sys_ni_syscall /* was sys_ftime */
+ .long sys_sync
+ .long sys_kill
+ .long sys_rename
+ .long sys_mkdir
+/* 40 */ .long sys_rmdir
+ .long sys_dup
+ .long sys_pipe
+ .long sys_times
+ .long sys_ni_syscall /* was sys_prof */
+/* 45 */ .long sys_brk
+ .long sys_setgid16
+ .long sys_getgid16
+ .long sys_ni_syscall /* was sys_signal */
+ .long sys_geteuid16
+/* 50 */ .long sys_getegid16
+ .long sys_acct
+ .long sys_umount
+ .long sys_ni_syscall /* was sys_lock */
+ .long sys_ioctl
+/* 55 */ .long sys_fcntl
+ .long sys_ni_syscall /* was sys_mpx */
+ .long sys_setpgid
+ .long sys_ni_syscall /* was sys_ulimit */
+ .long sys_ni_syscall /* was sys_olduname */
+/* 60 */ .long sys_umask
+ .long sys_chroot
+ .long sys_ustat
+ .long sys_dup2
+ .long sys_getppid
+/* 65 */ .long sys_getpgrp
+ .long sys_setsid
+ .long sys_sigaction
+ .long sys_ni_syscall /* was sys_sgetmask */
+ .long sys_ni_syscall /* was sys_ssetmask */
+/* 70 */ .long sys_setreuid16
+ .long sys_setregid16
+ .long sys_sigsuspend_wrapper
+ .long sys_sigpending
+ .long sys_sethostname
+/* 75 */ .long sys_setrlimit
+ .long sys_old_getrlimit /* used by libc4 */
+ .long sys_getrusage
+ .long sys_gettimeofday
+ .long sys_settimeofday
+/* 80 */ .long sys_getgroups16
+ .long sys_setgroups16
+ .long old_select /* used by libc4 */
+ .long sys_symlink
+ .long sys_ni_syscall /* was sys_lstat */
+/* 85 */ .long sys_readlink
+ .long sys_uselib
+ .long sys_swapon
+ .long sys_reboot
+ .long old_readdir /* used by libc4 */
+/* 90 */ .long old_mmap /* used by libc4 */
+ .long sys_munmap
+ .long sys_truncate
+ .long sys_ftruncate
+ .long sys_fchmod
+/* 95 */ .long sys_fchown16
+ .long sys_getpriority
+ .long sys_setpriority
+ .long sys_ni_syscall /* was sys_profil */
+ .long sys_statfs
+/* 100 */ .long sys_fstatfs
+ .long sys_ni_syscall
+ .long sys_socketcall
+ .long sys_syslog
+ .long sys_setitimer
+/* 105 */ .long sys_getitimer
+ .long sys_newstat
+ .long sys_newlstat
+ .long sys_newfstat
+ .long sys_ni_syscall /* was sys_uname */
+/* 110 */ .long sys_ni_syscall /* was sys_iopl */
+ .long sys_vhangup
+ .long sys_ni_syscall
+ .long sys_syscall /* call a syscall */
+ .long sys_wait4
+/* 115 */ .long sys_swapoff
+ .long sys_sysinfo
+ .long sys_ipc
+ .long sys_fsync
+ .long sys_sigreturn_wrapper
+/* 120 */ .long sys_clone_wapper
+ .long sys_setdomainname
+ .long sys_newuname
+ .long sys_ni_syscall
+ .long sys_adjtimex
+/* 125 */ .long sys_mprotect
+ .long sys_sigprocmask
+ .long sys_ni_syscall /* WAS: sys_create_module */
+ .long sys_init_module
+ .long sys_delete_module
+/* 130 */ .long sys_ni_syscall /* WAS: sys_get_kernel_syms */
+ .long sys_quotactl
+ .long sys_getpgid
+ .long sys_fchdir
+ .long sys_bdflush
+/* 135 */ .long sys_sysfs
+ .long sys_personality
+ .long sys_ni_syscall /* .long
_sys_afs_syscall */
+ .long sys_setfsuid16
+ .long sys_setfsgid16
+/* 140 */ .long sys_llseek
+ .long sys_getdents
+ .long sys_select
+ .long sys_flock
+ .long sys_msync
+/* 145 */ .long sys_readv
+ .long sys_writev
+ .long sys_getsid
+ .long sys_fdatasync
+ .long sys_sysctl
+/* 150 */ .long sys_mlock
+ .long sys_munlock
+ .long sys_mlockall
+ .long sys_munlockall
+ .long sys_sched_setparam
+/* 155 */ .long sys_sched_getparam
+ .long sys_sched_setscheduler
+ .long sys_sched_getscheduler
+ .long sys_sched_yield
+ .long sys_sched_get_priority_max
+/* 160 */ .long sys_sched_get_priority_min
+ .long sys_sched_rr_get_interval
+ .long sys_nanosleep
+ .long sys_arm_mremap
+ .long sys_setresuid16
+/* 165 */ .long sys_getresuid16
+ .long sys_ni_syscall
+ .long sys_ni_syscall /* WAS: sys_query_module */
+ .long sys_poll
+ .long sys_nfsservctl
+/* 170 */ .long sys_setresgid16
+ .long sys_getresgid16
+ .long sys_prctl
+ .long sys_rt_sigreturn_wrapper
+ .long sys_rt_sigaction
+/* 175 */ .long sys_rt_sigprocmask
+ .long sys_rt_sigpending
+ .long sys_rt_sigtimedwait
+ .long sys_rt_sigqueueinfo
+ .long sys_rt_sigsuspend_wrapper
+/* 180 */ .long sys_pread64
+ .long sys_pwrite64
+ .long sys_chown16
+ .long sys_getcwd
+ .long sys_capget
+/* 185 */ .long sys_capset
+ .long sys_sigaltstack_wrapper
+ .long sys_sendfile
+ .long sys_ni_syscall
+ .long sys_ni_syscall
+/* 190 */ .long sys_vfork_wrapper
+ .long sys_getrlimit
+ .long sys_mmap2
+ .long sys_truncate64
+ .long sys_ftruncate64
+/* 195 */ .long sys_stat64
+ .long sys_lstat64
+ .long sys_fstat64
+ .long sys_lchown
+ .long sys_getuid
+/* 200 */ .long sys_getgid
+ .long sys_geteuid
+ .long sys_getegid
+ .long sys_setreuid
+ .long sys_setregid
+/* 205 */ .long sys_getgroups
+ .long sys_setgroups
+ .long sys_fchown
+ .long sys_setresuid
+ .long sys_getresuid
+/* 210 */ .long sys_setresgid
+ .long sys_getresgid
+ .long sys_chown
+ .long sys_setuid
+ .long sys_setgid
+/* 215 */ .long sys_setfsuid
+ .long sys_setfsgid
+ .long sys_getdents64
+ .long sys_pivot_root
+ .long sys_mincore
+/* 220 */ .long sys_madvise
+ .long sys_fcntl64
+ .long sys_ni_syscall /* TUX */
+ .long sys_ni_syscall /* WAS: sys_security */
+ .long sys_gettid
+/* 225 */ .long sys_readahead
+ .long sys_setxattr
+ .long sys_lsetxattr
+ .long sys_fsetxattr
+ .long sys_getxattr
+/* 230 */ .long sys_lgetxattr
+ .long sys_fgetxattr
+ .long sys_listxattr
+ .long sys_llistxattr
+ .long sys_flistxattr
+/* 235 */ .long sys_removexattr
+ .long sys_lremovexattr
+ .long sys_fremovexattr
+ .long sys_tkill
+__syscall_end:
+
+ .rept NR_syscalls - (__syscall_end - __syscall_start) / 4
+ .long sys_ni_syscall
+ .endr
+#endif
diff -urN linux/arch/arm26/kernel/head.S linux/arch/arm26/kernel/head.S
--- linux/arch/arm26/kernel/head.S 1970/01/01 00:00:00
+++ linux/arch/arm26/kernel/head.S Thu Jan 13 14:05:20 2005 1.1
@@ -0,0 +1,113 @@
+/*
+ * linux/arch/arm26/kernel/head.S
+ *
+ * Copyright (C) 1994-2000 Russell King
+ * Copyright (C) 2003 Ian Molton
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * 26-bit kernel startup code
+ */
+#include <linux/config.h>
+#include <linux/linkage.h>
+#include <asm/mach-types.h>
+
+ .globl swapper_pg_dir
+ .equ swapper_pg_dir, 0x0207d000
+
+/*
+ * Entry point.
+ */
+ .section ".init.text",#alloc,#execinstr
+ENTRY(stext)
+
+__entry:
+ cmp pc, #0x02000000
+ ldrlt pc, LC0 @ if 0x01800000, call at
0x02080000
+ teq r0, #0 @ Check for old calling method
+ blne oldparams @ Move page if old
+
+ adr r0, LC0
+ ldmib r0, {r2-r5, sp} @ Setup stack (and fetch other
values)
+
+ mov r0, #0 @ Clear BSS
+1: cmp r2, r3
+ strcc r0, [r2], #4
+ bcc 1b
+
+ bl detect_proc_type
+ str r0, [r4]
+ bl detect_arch_type
+ str r0, [r5]
+
+#ifdef CONFIG_XIP_KERNEL
+ ldr r3, ETEXT @ data section copy
+ ldr r4, SDATA
+ ldr r5, EDATA
+1:
+ ldr r6, [r3], #4
+ str r6, [r4], #4
+ cmp r4, r5
+ blt 1b
+#endif
+ mov fp, #0
+ b start_kernel
+
+LC0: .word _stext
+ .word __bss_start @ r2
+ .word _end @ r3
+ .word processor_id @ r4
+ .word __machine_arch_type @ r5
+ .word init_thread_union+8192 @ sp
+#ifdef CONFIG_XIP_KERNEL
+ETEXT: .word _endtext
+SDATA: .word _sdata
+EDATA: .word __bss_start
+#endif
+
+arm2_id: .long 0x41560200 @ ARM2 and 250 dont have a CPUID
+arm250_id: .long 0x41560250 @ So we create some after probing for them
+ .align
+
+oldparams: mov r4, #0x02000000
+ add r3, r4, #0x00080000
+ add r4, r4, #0x0007c000
+1: ldmia r0!, {r5 - r12}
+ stmia r4!, {r5 - r12}
+ cmp r4, r3
+ blt 1b
+ mov pc, lr
+
+/*
+ * We need some way to automatically detect the difference between
+ * these two machines. Unfortunately, it is not possible to detect
+ * the presence of the SuperIO chip, because that will hang the old
+ * Archimedes machines solid.
+ */
+/* DAG: Outdated, these have been combined !!!!!!! */
+detect_arch_type:
+#if defined(CONFIG_ARCH_ARC)
+ mov r0, #MACH_TYPE_ARCHIMEDES
+#elif defined(CONFIG_ARCH_A5K)
+ mov r0, #MACH_TYPE_A5K
+#endif
+ mov pc, lr
+
+detect_proc_type:
+ mov ip, lr
+ mov r2, #0xea000000 @ Point undef instr to
continuation
+ adr r0, continue - 12
+ orr r0, r2, r0, lsr #2
+ mov r1, #0
+ str r0, [r1, #4]
+ ldr r0, arm2_id
+ swp r2, r2, [r1] @ check for swp (ARM2 cant)
+ ldr r0, arm250_id
+ mrc 15, 0, r3, c0, c0 @ check for CP#15 (ARM250 cant)
+ mov r0, r3
+continue: mov r2, #0xeb000000 @ Make undef vector loop
+ sub r2, r2, #2
+ str r2, [r1, #4]
+ mov pc, ip
diff -urN linux/arch/arm26/kernel/Makefile linux/arch/arm26/kernel/Makefile
--- linux/arch/arm26/kernel/Makefile 2004/08/24 15:10:04 1.4
+++ linux/arch/arm26/kernel/Makefile 2005/01/13 14:05:20 1.5
@@ -2,17 +2,16 @@
# Makefile for the linux kernel.
#
-ENTRY_OBJ = entry.o
-
# Object file lists.
-obj-y := compat.o dma.o entry.o irq.o \
- process.o ptrace.o semaphore.o setup.o signal.o sys_arm.o \
- time.o traps.o ecard.o time-acorn.o dma.o \
- ecard.o fiq.o time.o
+AFLAGS_head.o := -DTEXTADDR=$(TEXTADDR)
+
+obj-y := compat.o dma.o entry.o irq.o process.o ptrace.o \
+ semaphore.o setup.o signal.o sys_arm.o time.o traps.o \
+ ecard.o dma.o ecard.o fiq.o time.o
+
+extra-y := head.o init_task.o vmlinux.lds
obj-$(CONFIG_FIQ) += fiq.o
obj-$(CONFIG_MODULES) += armksyms.o
-extra-y := init_task.o vmlinux.lds
-
diff -urN linux/arch/arm26/kernel/armksyms.c linux/arch/arm26/kernel/armksyms.c
--- linux/arch/arm26/kernel/armksyms.c 2004/09/19 12:30:02 1.3
+++ linux/arch/arm26/kernel/armksyms.c 2005/01/13 14:05:20 1.4
@@ -7,6 +7,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
+#include <linux/module.h>
#include <linux/config.h>
#include <linux/module.h>
#include <linux/user.h>
@@ -27,8 +28,6 @@
#include <asm/elf.h>
#include <asm/io.h>
#include <asm/irq.h>
-#include <asm/pgalloc.h>
-//#include <asm/proc-fns.h>
#include <asm/processor.h>
#include <asm/semaphore.h>
#include <asm/system.h>
@@ -69,8 +68,9 @@
/*
* This has a special calling convention; it doesn't
* modify any of the usual registers, except for LR.
+ * FIXME - we used to use our own local version - looks to be in
kernel/softirq now
*/
-extern void __do_softirq(void);
+//extern void __do_softirq(void);
#define EXPORT_SYMBOL_ALIAS(sym,orig) \
const char __kstrtab_##sym[] \
@@ -95,7 +95,7 @@
EXPORT_SYMBOL(kd_mksound);
#endif
-EXPORT_SYMBOL(__do_softirq);
+//EXPORT_SYMBOL(__do_softirq);
/* platform dependent support */
EXPORT_SYMBOL(dump_thread);
@@ -213,12 +213,6 @@
EXPORT_SYMBOL(sys_exit);
EXPORT_SYMBOL(sys_wait4);
- /* semaphores */
-EXPORT_SYMBOL(__down_failed);
-EXPORT_SYMBOL(__down_interruptible_failed);
-EXPORT_SYMBOL(__down_trylock_failed);
-EXPORT_SYMBOL(__up_wakeup);
-
EXPORT_SYMBOL(get_wchan);
#ifdef CONFIG_PREEMPT
diff -urN linux/arch/arm26/kernel/compat.c linux/arch/arm26/kernel/compat.c
--- linux/arch/arm26/kernel/compat.c 2003/07/11 02:13:09 1.2
+++ linux/arch/arm26/kernel/compat.c 2005/01/13 14:05:20 1.3
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/kernel/compat.c
+ * linux/arch/arm26/kernel/compat.c
*
* Copyright (C) 2001 Russell King
* 2003 Ian Molton
diff -urN linux/arch/arm26/kernel/dma.c linux/arch/arm26/kernel/dma.c
--- linux/arch/arm26/kernel/dma.c 2003/07/11 02:13:09 1.2
+++ linux/arch/arm26/kernel/dma.c 2005/01/13 14:05:20 1.3
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/kernel/dma.c
+ * linux/arch/arm26/kernel/dma.c
*
* Copyright (C) 1995-2000 Russell King
* 2003 Ian Molton
@@ -24,8 +24,6 @@
spinlock_t dma_spin_lock = SPIN_LOCK_UNLOCKED;
-#if MAX_DMA_CHANNELS > 0
-
static dma_t dma_chan[MAX_DMA_CHANNELS];
/*
@@ -260,33 +258,6 @@
arch_dma_init(dma_chan);
}
-#else
-
-int request_dma(dmach_t channel, const char *device_id)
-{
- return -EINVAL;
-}
-
-int get_dma_residue(dmach_t channel)
-{
- return 0;
-}
-
-#define GLOBAL_ALIAS(_a,_b) asm (".set " #_a "," #_b "; .globl " #_a)
-GLOBAL_ALIAS(disable_dma, get_dma_residue);
-GLOBAL_ALIAS(enable_dma, get_dma_residue);
-GLOBAL_ALIAS(free_dma, get_dma_residue);
-GLOBAL_ALIAS(get_dma_list, get_dma_residue);
-GLOBAL_ALIAS(set_dma_mode, get_dma_residue);
-GLOBAL_ALIAS(set_dma_page, get_dma_residue);
-GLOBAL_ALIAS(set_dma_count, get_dma_residue);
-GLOBAL_ALIAS(set_dma_addr, get_dma_residue);
-GLOBAL_ALIAS(set_dma_sg, get_dma_residue);
-GLOBAL_ALIAS(set_dma_speed, get_dma_residue);
-GLOBAL_ALIAS(init_dma, get_dma_residue);
-
-#endif
-
EXPORT_SYMBOL(request_dma);
EXPORT_SYMBOL(free_dma);
EXPORT_SYMBOL(enable_dma);
diff -urN linux/arch/arm26/kernel/ecard.c linux/arch/arm26/kernel/ecard.c
--- linux/arch/arm26/kernel/ecard.c 2003/09/09 16:40:55 1.3
+++ linux/arch/arm26/kernel/ecard.c 2005/01/13 14:05:20 1.4
@@ -42,9 +42,7 @@
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/irq.h>
-#include <asm/pgalloc.h>
#include <asm/mmu_context.h>
-#include <asm/irq.h>
#include <asm/irqchip.h>
#include <asm/tlbflush.h>
@@ -137,65 +135,23 @@
unsigned int len = req->length;
unsigned int off = req->address;
- if (req->ec->slot_no == 8) {
- /*
- * The card maintains an index which increments the address
- * into a 4096-byte page on each access. We need to keep
- * track of the counter.
- */
- static unsigned int index;
- unsigned int page;
-
- page = (off >> 12) * 4;
- if (page > 256 * 4)
- return;
-
- off &= 4095;
-
- /*
- * If we are reading offset 0, or our current index is
- * greater than the offset, reset the hardware index counter.
- */
- if (off == 0 || index > off) {
- *base_addr = 0;
- index = 0;
- }
-
- /*
- * Increment the hardware index counter until we get to the
- * required offset. The read bytes are discarded.
- */
- while (index < off) {
- unsigned char byte;
- byte = base_addr[page];
- index += 1;
- }
-
+ if (!req->use_loader || !req->ec->loader) {
+ off *= 4;
while (len--) {
- *buf++ = base_addr[page];
- index += 1;
+ *buf++ = base_addr[off];
+ off += 4;
}
} else {
-
- if (!req->use_loader || !req->ec->loader) {
- off *= 4;
- while (len--) {
- *buf++ = base_addr[off];
- off += 4;
- }
- } else {
- while(len--) {
- /*
- * The following is required by some
- * expansion card loader programs.
- */
- *(unsigned long *)0x108 = 0;
- *buf++ = ecard_loader_read(off++, base_addr,
- req->ec->loader);
- }
+ while(len--) {
+ /*
+ * The following is required by some
+ * expansion card loader programs.
+ */
+ *(unsigned long *)0x108 = 0;
+ *buf++ = ecard_loader_read(off++, base_addr,
+ req->ec->loader);
}
}
-
}
static void ecard_do_request(struct ecard_request *req)
@@ -466,7 +422,7 @@
for (ec = cards; ec; ec = ec->next) {
int pending;
- if (!ec->claimed || ec->irq == NO_IRQ || ec->slot_no == 8)
+ if (!ec->claimed || ec->irq == NO_IRQ)
continue;
if (ec->ops && ec->ops->irqpending)
@@ -494,22 +450,15 @@
unsigned long address = 0;
int slot = ec->slot_no;
- if (ec->slot_no == 8)
- return 0;
-
ectcr &= ~(1 << slot);
switch (type) {
case ECARD_MEMC:
- if (slot < 4)
- address = IO_EC_MEMC_BASE + (slot << 12);
+ address = IO_EC_MEMC_BASE + (slot << 12);
break;
case ECARD_IOC:
- if (slot < 4)
- address = IO_EC_IOC_BASE + (slot << 12);
- if (address)
- address += speed << 17;
+ address = IO_EC_IOC_BASE + (slot << 12) + (speed << 17);
break;
default:
@@ -592,11 +541,9 @@
unsigned int slot = ec->slot_no;
int i;
- if (slot < 4) {
- ec_set_resource(ec, ECARD_RES_MEMC,
- PODSLOT_MEMC_BASE + (slot << 14),
- PODSLOT_MEMC_SIZE, IORESOURCE_MEM);
- }
+ ec_set_resource(ec, ECARD_RES_MEMC,
+ PODSLOT_MEMC_BASE + (slot << 14),
+ PODSLOT_MEMC_SIZE, IORESOURCE_MEM);
for (i = 0; i < ECARD_RES_IOCSYNC - ECARD_RES_IOCSLOW; i++) {
ec_set_resource(ec, i + ECARD_RES_IOCSLOW,
@@ -739,12 +686,10 @@
/*
* hook the interrupt handlers
*/
- if (slot < 8) {
- ec->irq = 32 + slot;
- set_irq_chip(ec->irq, &ecard_chip);
- set_irq_handler(ec->irq, do_level_IRQ);
- set_irq_flags(ec->irq, IRQF_VALID);
- }
+ ec->irq = 32 + slot;
+ set_irq_chip(ec->irq, &ecard_chip);
+ set_irq_handler(ec->irq, do_level_IRQ);
+ set_irq_flags(ec->irq, IRQF_VALID);
for (ecp = &cards; *ecp; ecp = &(*ecp)->next);
@@ -777,7 +722,7 @@
printk("Probing expansion cards\n");
- for (slot = 0; slot < 4; slot ++) {
+ for (slot = 0; slot < MAX_ECARDS; slot ++) {
ecard_probe(slot, ECARD_IOC);
}
diff -urN linux/arch/arm26/kernel/entry.S linux/arch/arm26/kernel/entry.S
--- linux/arch/arm26/kernel/entry.S 2003/09/30 14:27:17 1.3
+++ linux/arch/arm26/kernel/entry.S 2005/01/13 14:05:20 1.4
@@ -3,10 +3,10 @@
* Assembled from chunks of code in arch/arm
*
* Copyright (C) 2003 Ian Molton
+ * Based on the work of RMK.
*
*/
-#include <linux/config.h> /* for CONFIG_ARCH_xxxx */
#include <linux/linkage.h>
#include <asm/assembler.h>
@@ -35,8 +35,6 @@
#define BAD_IRQ 3
#define BAD_UNDEFINSTR 4
-#define PT_TRACESYS 0x00000002
-
@ OS version number used in SWIs
@ RISC OS is 0
@ RISC iX is 8
@@ -46,10 +44,12 @@
@
@ Stack format (ensured by USER_* and SVC_*)
+@ PSR and PC are comined on arm26
@
-#define S_FRAME_SIZE 72 @ FIXME: Really?
+
+#define S_OFF 8
+
#define S_OLD_R0 64
-#define S_PSR 60
#define S_PC 60
#define S_LR 56
#define S_SP 52
@@ -66,19 +66,18 @@
#define S_R2 8
#define S_R1 4
#define S_R0 0
-#define S_OFF 8
.macro save_user_regs
- str r0, [sp, #-4]!
- str lr, [sp, #-4]!
+ str r0, [sp, #-4]! @ Store SVC r0
+ str lr, [sp, #-4]! @ Store user mode PC
sub sp, sp, #15*4
- stmia sp, {r0 - lr}^
+ stmia sp, {r0 - lr}^ @ Store the other user-mode regs
mov r0, r0
.endm
.macro slow_restore_user_regs
- ldmia sp, {r0 - lr}^ @ restore the user regs
- mov r0, r0 @ no-op
+ ldmia sp, {r0 - lr}^ @ restore the user regs not including PC
+ mov r0, r0
ldr lr, [sp, #15*4] @ get user PC
add sp, sp, #15*4+8 @ free stack
movs pc, lr @ return
@@ -93,6 +92,32 @@
movs pc, lr
.endm
+ .macro save_svc_regs
+ str sp, [sp, #-16]!
+ str lr, [sp, #8]
+ str lr, [sp, #4]
+ stmfd sp!, {r0 - r12}
+ mov r0, #-1
+ str r0, [sp, #S_OLD_R0]
+ zero_fp
+ .endm
+
+ .macro save_svc_regs_irq
+ str sp, [sp, #-16]!
+ str lr, [sp, #4]
+ ldr lr, .LCirq
+ ldr lr, [lr]
+ str lr, [sp, #8]
+ stmfd sp!, {r0 - r12}
+ mov r0, #-1
+ str r0, [sp, #S_OLD_R0]
+ zero_fp
+ .endm
+
+ .macro restore_svc_regs
+ ldmfd sp, {r0 - pc}^
+ .endm
+
.macro mask_pc, rd, rm
bic \rd, \rm, #PCMASK
.endm
@@ -117,21 +142,10 @@
mov \rd, \rd, lsl #13
.endm
- /*
- * Like adr, but force SVC mode (if required)
- */
- .macro adrsvc, cond, reg, label
- adr\cond \reg, \label
- orr\cond \reg, \reg, #PSR_I_BIT | MODE_SVC26
- .endm
-
-
/*
* These are the registers used in the syscall handler, and allow us to
* have in theory up to 7 arguments to a function - r0 to r6.
*
- * r7 is reserved for the system call number for thumb mode.
- *
* Note that tbl == why is intentional.
*
* We must set at least "tsk" and "why" when calling ret_with_reschedule.
@@ -161,17 +175,6 @@
#endif
/*
- * Our do_softirq out of line code. See include/asm-arm26/hardirq.h for
- * the calling assembly.
- */
-ENTRY(__do_softirq)
- stmfd sp!, {r0 - r3, ip, lr}
- bl do_softirq
- ldmfd sp!, {r0 - r3, ip, pc}
-
- .align 5
-
-/*
* This is the fast syscall return path. We do as little as
* possible here, and this includes saving r0 back into the SVC
* stack.
@@ -228,7 +231,8 @@
bl syscall_trace
b ret_slow_syscall
-#include <asm/calls.h>
+// FIXME - is this strictly necessary?
+#include "calls.S"
/*=============================================================================
* SWI handler
@@ -258,7 +262,8 @@
tst ip, #_TIF_SYSCALL_TRACE @ are we tracing syscalls?
bne __sys_trace
- adrsvc al, lr, ret_fast_syscall @ return address
+ adral lr, ret_fast_syscall @ set return address
+ orral lr, lr, #PSR_I_BIT | MODE_SVC26 @ Force SVC mode on return
cmp scno, #NR_syscalls @ check upper syscall limit
ldrcc pc, [tbl, scno, lsl #2] @ call sys_* routine
@@ -278,7 +283,8 @@
mov r0, #0 @ trace entry [IP = 0]
bl syscall_trace
- adrsvc al, lr, __sys_trace_return @ return address
+ adral lr, __sys_trace_return @ set return address
+ orral lr, lr, #PSR_I_BIT | MODE_SVC26 @ Force SVC mode on return
add r1, sp, #S_R0 + S_OFF @ pointer to regs
cmp scno, #NR_syscalls @ check upper syscall limit
ldmccia r1, {r0 - r3} @ have to reload r0 - r3
@@ -301,7 +307,7 @@
.type sys_call_table, #object
ENTRY(sys_call_table)
-#include <asm/calls.h>
+#include "calls.S"
/*============================================================================
* Special system call wrappers
@@ -387,27 +393,22 @@
.text
- .equ ioc_base_high, IOC_BASE & 0xff000000
- .equ ioc_base_low, IOC_BASE & 0x00ff0000
- .macro disable_fiq
- mov r12, #ioc_base_high
- .if ioc_base_low
- orr r12, r12, #ioc_base_low
- .endif
- strb r12, [r12, #0x38] @ Disable FIQ register
+ .macro handle_irq
+1: mov r4, #IOC_BASE
+ ldrb r6, [r4, #0x24] @ get high priority first
+ adr r5, irq_prio_h
+ teq r6, #0
+ ldreqb r6, [r4, #0x14] @ get low priority
+ adreq r5, irq_prio_l
+
+ teq r6, #0 @ If an IRQ happened...
+ ldrneb r0, [r5, r6] @ get IRQ number
+ movne r1, sp @ get struct pt_regs
+ adrne lr, 1b @ Set return address to 1b
+ orrne lr, lr, #PSR_I_BIT | MODE_SVC26 @ (and force SVC mode)
+ bne asm_do_IRQ @ process IRQ (if asserted)
.endm
- .macro get_irqnr_and_base, irqnr, base
- mov r4, #ioc_base_high @ point at IOC
- .if ioc_base_low
- orr r4, r4, #ioc_base_low
- .endif
- ldrb \irqnr, [r4, #0x24] @ get high priority
first
- adr \base, irq_prio_h
- teq \irqnr, #0
- ldreqb \irqnr, [r4, #0x14] @ get low priority
- adreq \base, irq_prio_l
- .endm
/*
* Interrupt table (incorporates priority)
@@ -448,9 +449,9 @@
.endm
#if 1
-/* FIXME (well, ok, dont - but its easy to grep for :) */
/*
* Uncomment these if you wish to get more debugging into about data aborts.
+ * FIXME - I bet we can find a way to encode these and keep performance.
*/
#define FAULT_CODE_LDRSTRPOST 0x80
#define FAULT_CODE_LDRSTRPRE 0x40
@@ -462,29 +463,6 @@
#define FAULT_CODE_WRITE 0x02
#define FAULT_CODE_FORCECOW 0x01
-#define SVC_SAVE_ALL \
- str sp, [sp, #-16]! ;\
- str lr, [sp, #8] ;\
- str lr, [sp, #4] ;\
- stmfd sp!, {r0 - r12} ;\
- mov r0, #-1 ;\
- str r0, [sp, #S_OLD_R0] ;\
- zero_fp
-
-#define SVC_IRQ_SAVE_ALL \
- str sp, [sp, #-16]! ;\
- str lr, [sp, #4] ;\
- ldr lr, .LCirq ;\
- ldr lr, [lr] ;\
- str lr, [sp, #8] ;\
- stmfd sp!, {r0 - r12} ;\
- mov r0, #-1 ;\
- str r0, [sp, #S_OLD_R0] ;\
- zero_fp
-
-#define SVC_RESTORE_ALL \
- ldmfd sp, {r0 - pc}^
-
/*=============================================================================
* Undefined FIQs
*-----------------------------------------------------------------------------
@@ -526,13 +504,13 @@
/* FIXME - should we trap for a null pointer here? */
/* The SVC mode case */
-__und_svc: SVC_SAVE_ALL @ Non-user mode
+__und_svc: save_svc_regs @ Non-user mode
mask_pc r0, lr
and r2, lr, #3
sub r0, r0, #4
mov r1, sp
bl do_undefinstr
- SVC_RESTORE_ALL
+ restore_svc_regs
/* We get here if the FP emulator doesnt handle the undef instr.
* If the insn WAS handled, the emulator jumps to ret_from_exception by itself/
@@ -614,7 +592,7 @@
ldr lr, [sp,#S_PC] @ FIXME program to test this
on. I think its
b .Lbug_undef @ broken at the moment though!)
-__pabt_invalid: SVC_SAVE_ALL
+__pabt_invalid: save_svc_regs
mov r0, sp @ Prefetch aborts are
definitely *not*
mov r1, #BAD_PREFETCH @ allowed in non-user modes.
We cant
and r2, lr, #3 @ recover from this problem.
@@ -648,7 +626,7 @@
b ret_from_exception
Laddrexcptn_not_user:
- SVC_SAVE_ALL
+ save_svc_regs
and r2, lr, #3
teq r2, #3
bne Laddrexcptn_illegal_mode
@@ -686,56 +664,50 @@
/*=============================================================================
* Interrupt (IRQ) handler
*-----------------------------------------------------------------------------
- * Note: if in user mode, then *no* kernel routine is running, so do not have
- * to save svc lr
- * (r13 points to irq temp save area)
+ * Note: if the IRQ was taken whilst in user mode, then *no* kernel routine
+ * is running, so do not have to save svc lr.
+ *
+ * Entered in IRQ mode.
*/
-vector_IRQ: ldr r13, .LCirq @ I will leave this one
in just in case...
- sub lr, lr, #4
- str lr, [r13]
- tst lr, #3
- bne __irq_svc
- teqp pc, #PSR_I_BIT | MODE_SVC26
+vector_IRQ: ldr sp, .LCirq @ Setup some temporary stack
+ sub lr, lr, #4
+ str lr, [sp] @ push return address
+
+ tst lr, #3
+ bne __irq_non_usr
+
+__irq_usr: teqp pc, #PSR_I_BIT | MODE_SVC26 @ Enter SVC mode
mov r0, r0
+
ldr lr, .LCirq
- ldr lr, [lr]
+ ldr lr, [lr] @ Restore lr for jump back to USR
+
save_user_regs
-1: get_irqnr_and_base r6, r5
- teq r6, #0
- ldrneb r0, [r5, r6] @ get IRQ number
- movne r1, sp
- @
- @ routine called with r0 = irq number, r1 = struct pt_regs *
- @
- adr lr, 1b
- orr lr, lr, #PSR_I_BIT | MODE_SVC26 @ Force SVC
- bne asm_do_IRQ
+ handle_irq
mov why, #0
- get_thread_info tsk @ FIXME - was r5, but seemed wrong.
+ get_thread_info tsk
b ret_to_user
+@ Place the IRQ priority table here so that the handle_irq macros above
+@ and below here can access it.
+
irq_prio_table
-__irq_svc: teqp pc, #PSR_I_BIT | MODE_SVC26
+__irq_non_usr: teqp pc, #PSR_I_BIT | MODE_SVC26 @ Enter SVC mode
mov r0, r0
- SVC_IRQ_SAVE_ALL
+
+ save_svc_regs_irq
+
and r2, lr, #3
teq r2, #3
- bne __irq_invalid
-1: get_irqnr_and_base r6, r5
- teq r6, #0
- ldrneb r0, [r5, r6] @ get IRQ number
- movne r1, sp
- @
- @ routine called with r0 = irq number, r1 = struct pt_regs *
- @
- adr lr, 1b
- orr lr, lr, #PSR_I_BIT | MODE_SVC26 @ Force SVC
- bne asm_do_IRQ @ Returns to 1b
- SVC_RESTORE_ALL
+ bne __irq_invalid @ IRQ not from SVC mode
+
+ handle_irq
+
+ restore_svc_regs
__irq_invalid: mov r0, sp
mov r1, #BAD_IRQ
@@ -762,7 +734,7 @@
b ret_from_exception
Ldata_not_user:
- SVC_SAVE_ALL
+ save_svc_regs
and r2, lr, #3
teq r2, #3
bne Ldata_illegal_mode
@@ -770,7 +742,7 @@
teqeqp pc, #MODE_SVC26
mask_pc r0, lr
bl Ldata_do
- SVC_RESTORE_ALL
+ restore_svc_regs
Ldata_illegal_mode:
mov r0, sp
diff -urN linux/arch/arm26/kernel/init_task.c
linux/arch/arm26/kernel/init_task.c
--- linux/arch/arm26/kernel/init_task.c 2004/06/26 15:15:08 1.3
+++ linux/arch/arm26/kernel/init_task.c 2005/01/13 14:05:20 1.4
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/kernel/init_task.c
+ * linux/arch/arm26/kernel/init_task.c
*
* Copyright (C) 2003 Ian Molton
*
@@ -29,7 +29,9 @@
* We need to make sure that this is 8192-byte aligned due to the
* way process stacks are handled. This is done by making sure
* the linker maps this in the .text segment right after head.S,
- * and making head.S ensure the proper alignment.
+ * and making the linker scripts ensure the proper alignment.
+ *
+ * FIXME - should this be 32K alignment on arm26?
*
* The things we do for performance...
*/
diff -urN linux/arch/arm26/kernel/process.c linux/arch/arm26/kernel/process.c
--- linux/arch/arm26/kernel/process.c 2004/06/06 02:12:34 1.6
+++ linux/arch/arm26/kernel/process.c 2005/01/13 14:05:20 1.7
@@ -68,41 +68,21 @@
__setup("hlt", hlt_setup);
/*
- * The following aren't currently used.
- */
-void (*pm_idle)(void);
-void (*pm_power_off)(void);
-
-/*
* This is our default idle handler. We need to disable
* interrupts here to ensure we don't miss a wakeup call.
*/
-void default_idle(void)
-{
- local_irq_disable();
- if (!need_resched() && !hlt_counter)
- local_irq_enable();
-}
-
-/*
- * The idle thread. We try to conserve power, while trying to keep
- * overall latency low. The architecture specific idle is passed
- * a value to indicate the level of "idleness" of the system.
- */
void cpu_idle(void)
{
/* endless idle loop with no priority at all */
preempt_disable();
while (1) {
- void (*idle)(void) = pm_idle;
- if (!idle)
- idle = default_idle;
- leds_event(led_idle_start);
- while (!need_resched())
- idle();
- leds_event(led_idle_end);
- schedule();
+ while (!need_resched()) {
+ local_irq_disable();
+ if (!need_resched() && !hlt_counter)
+ local_irq_enable();
+ }
}
+ schedule();
}
static char reboot_mode = 'h';
@@ -115,20 +95,15 @@
__setup("reboot=", reboot_setup);
+/* ARM26 cant do these but we still need to define them. */
void machine_halt(void)
{
- leds_event(led_halted);
}
-
-EXPORT_SYMBOL(machine_halt);
-
void machine_power_off(void)
{
- leds_event(led_halted);
- if (pm_power_off)
- pm_power_off();
}
+EXPORT_SYMBOL(machine_halt);
EXPORT_SYMBOL(machine_power_off);
void machine_restart(char * __unused)
@@ -306,7 +281,7 @@
asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
int
-copy_thread(int nr, unsigned long clone_flags, unsigned long esp,
+copy_thread(int nr, unsigned long clone_flags, unsigned long stack_start,
unsigned long unused, struct task_struct *p, struct pt_regs *regs)
{
struct thread_info *thread = p->thread_info;
@@ -315,7 +290,7 @@
childregs = __get_user_regs(thread);
*childregs = *regs;
childregs->ARM_r0 = 0;
- childregs->ARM_sp = esp;
+ childregs->ARM_sp = stack_start;
memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save));
thread->cpu_context.sp = (unsigned long)childregs;
@@ -367,35 +342,42 @@
}
/*
- * This is the mechanism for creating a new kernel thread.
- *
- * NOTE! Only a kernel-only process(ie the swapper or direct descendants
- * who haven't done an "execve()") should use this: it will work within
- * a system call from a "real" process, but the process memory space will
- * not be free'd until both the parent and the child have exited.
- * FIXME - taken from arm32
+ * Shuffle the argument into the correct register before calling the
+ * thread function. r1 is the thread argument, r2 is the pointer to
+ * the thread function, and r3 points to the exit function.
+ * FIXME - make sure this is right - the older code used to zero fp
+ * and cause the parent to call sys_exit (do_exit in this version)
+ */
+extern void kernel_thread_helper(void);
+
+asm( ".section .text\n"
+" .align\n"
+" .type kernel_thread_helper, #function\n"
+"kernel_thread_helper:\n"
+" mov r0, r1\n"
+" mov lr, r3\n"
+" mov pc, r2\n"
+" .size kernel_thread_helper, . - kernel_thread_helper\n"
+" .previous");
+
+/*
+ * Create a kernel thread.
*/
pid_t kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
{
- register unsigned int r0 asm("r0") = flags | CLONE_VM | CLONE_UNTRACED;
- register unsigned int r1 asm("r1") = 0;
- register pid_t __ret asm("r0");
-
- __asm__ __volatile__(
- __syscall(clone)" @ kernel_thread sys_clone \n\
- movs %0, r0 @ if we are the child \n\
- bne 1f \n\
- mov fp, #0 @ ensure that fp is zero \n\
- mov r0, %4 \n\
- mov lr, pc \n\
- mov pc, %3 \n\
- b sys_exit \n\
-1: "
- : "=r" (__ret)
- : "0" (r0), "r" (r1), "r" (fn), "r" (arg)
- : "lr");
- return __ret;
+ struct pt_regs regs;
+
+ memset(®s, 0, sizeof(regs));
+
+ regs.ARM_r1 = (unsigned long)arg;
+ regs.ARM_r2 = (unsigned long)fn;
+ regs.ARM_r3 = (unsigned long)do_exit;
+ regs.ARM_pc = (unsigned long)kernel_thread_helper | MODE_SVC26;
+
+ return do_fork(flags|CLONE_VM|CLONE_UNTRACED, 0, ®s, 0, NULL, NULL);
}
+EXPORT_SYMBOL(kernel_thread);
+
unsigned long get_wchan(struct task_struct *p)
{
diff -urN linux/arch/arm26/kernel/semaphore.c
linux/arch/arm26/kernel/semaphore.c
--- linux/arch/arm26/kernel/semaphore.c 2004/04/23 15:54:06 1.2
+++ linux/arch/arm26/kernel/semaphore.c 2005/01/13 14:05:20 1.3
@@ -12,6 +12,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
+#include <linux/module.h>
#include <linux/config.h>
#include <linux/sched.h>
#include <linux/errno.h>
@@ -179,7 +180,7 @@
* registers (r0 to r3 and lr), but not ip, as we use it as a return
* value in some cases..
*/
-asm(" .section .sched.text \n\
+asm(" .section .sched.text , #alloc, #execinstr \n\
.align 5 \n\
.globl __down_failed \n\
__down_failed: \n\
@@ -215,3 +216,8 @@
ldmfd sp!, {r0 - r3, pc}^ \n\
");
+EXPORT_SYMBOL(__down_failed);
+EXPORT_SYMBOL(__down_interruptible_failed);
+EXPORT_SYMBOL(__down_trylock_failed);
+EXPORT_SYMBOL(__up_wakeup);
+
diff -urN linux/arch/arm26/kernel/setup.c linux/arch/arm26/kernel/setup.c
--- linux/arch/arm26/kernel/setup.c 2004/06/26 15:15:08 1.6
+++ linux/arch/arm26/kernel/setup.c 2005/01/13 14:05:20 1.7
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/kernel/setup.c
+ * linux/arch/arm26/kernel/setup.c
*
* Copyright (C) 1995-2001 Russell King
* Copyright (C) 2003 Ian Molton
@@ -119,7 +119,7 @@
/*
* locate processor in the list of supported processor
* types. The linker builds this table for us from the
- * entries in arch/arm/mm/proc-*.S
+ * entries in arch/arm26/mm/proc-*.S
*/
for (list = &__proc_info_begin; list < &__proc_info_end ; list++)
if ((processor_id & list->cpu_mask) == list->cpu_val)
diff -urN linux/arch/arm26/kernel/sys_arm.c linux/arch/arm26/kernel/sys_arm.c
--- linux/arch/arm26/kernel/sys_arm.c 2004/09/19 12:30:02 1.4
+++ linux/arch/arm26/kernel/sys_arm.c 2005/01/13 14:05:20 1.5
@@ -13,6 +13,7 @@
* have a non-standard calling sequence on the Linux/arm
* platform.
*/
+#include <linux/module.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/slab.h>
@@ -281,3 +282,43 @@
out:
return error;
}
+
+/* FIXME - see if this is correct for arm26 */
+long execve(const char *filename, char **argv, char **envp)
+{
+ struct pt_regs regs;
+ int ret;
+ memset(®s, 0, sizeof(struct pt_regs));
+ ret = do_execve((char *)filename, (char __user * __user *)argv,
(char __user * __user *)envp, ®s);
+ if (ret < 0)
+ goto out;
+
+ /*
+ * Save argc to the register structure for userspace.
+ */
+ regs.ARM_r0 = ret;
+
+ /*
+ * We were successful. We won't be returning to our caller, but
+ * instead to user space by manipulating the kernel stack.
+ */
+ asm( "add r0, %0, %1\n\t"
+ "mov r1, %2\n\t"
+ "mov r2, %3\n\t"
+ "bl memmove\n\t" /* copy regs to top of stack */
+ "mov r8, #0\n\t" /* not a syscall */
+ "mov r9, %0\n\t" /* thread structure */
+ "mov sp, r0\n\t" /* reposition stack pointer */
+ "b ret_to_user"
+ :
+ : "r" (current_thread_info()),
+ "Ir" (THREAD_SIZE - 8 - sizeof(regs)),
+ "r" (®s),
+ "Ir" (sizeof(regs))
+ : "r0", "r1", "r2", "r3", "ip", "memory");
+
+ out:
+ return ret;
+}
+
+EXPORT_SYMBOL(execve);
diff -urN linux/arch/arm26/kernel/time.c linux/arch/arm26/kernel/time.c
--- linux/arch/arm26/kernel/time.c 2004/10/25 20:44:12 1.6
+++ linux/arch/arm26/kernel/time.c 2005/01/13 14:05:20 1.7
@@ -32,7 +32,7 @@
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/irq.h>
-#include <asm/leds.h>
+#include <asm/ioc.h>
u64 jiffies_64 = INITIAL_JIFFIES;
@@ -56,16 +56,53 @@
*/
int (*set_rtc)(void) = dummy_set_rtc;
-static unsigned long dummy_gettimeoffset(void)
+/*
+ * Get time offset based on IOCs timer.
+ * FIXME - if this is called with interrutps off, why the shennanigans
+ * below ?
+ */
+static unsigned long gettimeoffset(void)
{
- return 0;
+ unsigned int count1, count2, status;
+ long offset;
+
+ ioc_writeb (0, IOC_T0LATCH);
+ barrier ();
+ count1 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8);
+ barrier ();
+ status = ioc_readb(IOC_IRQREQA);
+ barrier ();
+ ioc_writeb (0, IOC_T0LATCH);
+ barrier ();
+ count2 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8);
+
+ offset = count2;
+ if (count2 < count1) {
+ /*
+ * We have not had an interrupt between reading count1
+ * and count2.
+ */
+ if (status & (1 << 5))
+ offset -= LATCH;
+ } else if (count2 > count1) {
+ /*
+ * We have just had another interrupt between reading
+ * count1 and count2.
+ */
+ offset -= LATCH;
+ }
+
+ offset = (LATCH - offset) * (tick_nsec / 1000);
+ return (offset + LATCH/2) / LATCH;
}
/*
- * hook for getting the time offset. Note that it is
- * always called with interrupts disabled.
+ * Scheduler clock - returns current time in nanosec units.
*/
-unsigned long (*gettimeoffset)(void) = dummy_gettimeoffset;
+unsigned long long sched_clock(void)
+{
+ return (unsigned long long)jiffies * (1000000000 / HZ);
+}
static unsigned long next_rtc_update;
@@ -187,7 +224,10 @@
*/
void __init time_init(void)
{
- ioctime_init();
+ ioc_writeb(LATCH & 255, IOC_T0LTCHL);
+ ioc_writeb(LATCH >> 8, IOC_T0LTCHH);
+ ioc_writeb(0, IOC_T0GO);
+
setup_irq(IRQ_TIMER, &timer_irq);
}
diff -urN linux/arch/arm26/kernel/traps.c linux/arch/arm26/kernel/traps.c
--- linux/arch/arm26/kernel/traps.c 2004/04/28 13:54:52 1.4
+++ linux/arch/arm26/kernel/traps.c 2005/01/13 14:05:20 1.5
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/kernel/traps.c
+ * linux/arch/arm26/kernel/traps.c
*
* Copyright (C) 1995-2002 Russell King
* Fragments that appear the same as linux/arch/i386/kernel/traps.c (C) Linus
Torvalds
@@ -10,9 +10,11 @@
* published by the Free Software Foundation.
*
* 'traps.c' handles hardware exceptions after we have saved some state in
- * 'linux/arch/arm/lib/traps.S'. Mostly a debugging aid, but will probably
+ * 'linux/arch/arm26/lib/traps.S'. Mostly a debugging aid, but will probably
* kill the offending process.
*/
+
+#include <linux/module.h>
#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
@@ -28,7 +30,6 @@
#include <asm/atomic.h>
#include <asm/io.h>
-#include <asm/pgalloc.h>
#include <asm/pgtable.h>
#include <asm/system.h>
#include <asm/uaccess.h>
@@ -134,8 +135,6 @@
dump_mem("Stack: ", sp, 8192+(unsigned long)tsk->thread_info);
}
-EXPORT_SYMBOL(dump_stack);
-
void dump_stack(void)
{
#ifdef CONFIG_DEBUG_ERRORS
@@ -143,6 +142,8 @@
#endif
}
+EXPORT_SYMBOL(dump_stack);
+
//FIXME - was a static fn
void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
{
@@ -425,7 +426,6 @@
return 0;
case NR(usr26):
- case NR(usr32):
break;
default:
diff -urN linux/arch/arm26/kernel/vmlinux-arm26-xip.lds.in
linux/arch/arm26/kernel/vmlinux-arm26-xip.lds.in
--- linux/arch/arm26/kernel/vmlinux-arm26-xip.lds.in 2004/09/19 12:30:02
1.3
+++ linux/arch/arm26/kernel/vmlinux-arm26-xip.lds.in 2005/01/13 14:05:20
1.4
@@ -64,6 +64,7 @@
_text = .; /* Text and read-only data */
*(.text)
SCHED_TEXT
+ LOCK_TEXT /* FIXME - borrowed from arm32 - check*/
*(.fixup)
*(.gnu.warning)
*(.rodata)
@@ -91,9 +92,11 @@
_sdata = .;
.data : {
+ . = ALIGN(8192);
/*
* first, the init thread union, aligned
- * to an 8192 byte boundary.
+ * to an 8192 byte boundary. (see arm26/kernel/init_task.c)
+ * FIXME - sould this be 32K aligned on arm26?
*/
*(.init.task)
diff -urN linux/arch/arm26/kernel/vmlinux-arm26.lds.in
linux/arch/arm26/kernel/vmlinux-arm26.lds.in
--- linux/arch/arm26/kernel/vmlinux-arm26.lds.in 2004/09/19 12:30:02
1.3
+++ linux/arch/arm26/kernel/vmlinux-arm26.lds.in 2005/01/13 14:05:20
1.4
@@ -65,6 +65,7 @@
_text = .; /* Text and read-only data */
*(.text)
SCHED_TEXT
+ LOCK_TEXT
*(.fixup)
*(.gnu.warning)
*(.rodata)
@@ -90,7 +91,7 @@
.data : {
/*
* first, the init task union, aligned
- * to an 8192 byte boundary.
+ * to an 8192 byte boundary. (see arm26/kernel/init_task.c)
*/
*(.init.task)
diff -urN linux/arch/arm26/kernel/time-acorn.c
linux/arch/arm26/kernel/time-acorn.c
--- linux/arch/arm26/kernel/Attic/time-acorn.c Thu Jan 13 14:05:20 2005
1.1
+++ linux/arch/arm26/kernel/Attic/time-acorn.c 1970/01/01 00:00:002002
@@ -1,69 +0,0 @@
-/*
- * linux/arch/arm/kernel/time-acorn.c
- *
- * Copyright (c) 1996-2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Changelog:
- * 24-Sep-1996 RMK Created
- * 10-Oct-1996 RMK Brought up to date with arch-sa110eval
- * 04-Dec-1997 RMK Updated for new arch/arm/time.c
- * 13-May-2003 IM Brought over to ARM26
- */
-#include <linux/sched.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/ioc.h>
-
-extern unsigned long (*gettimeoffset)(void);
-
-static unsigned long ioctime_gettimeoffset(void)
-{
- unsigned int count1, count2, status;
- long offset;
-
- ioc_writeb (0, IOC_T0LATCH);
- barrier ();
- count1 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8);
- barrier ();
- status = ioc_readb(IOC_IRQREQA);
- barrier ();
- ioc_writeb (0, IOC_T0LATCH);
- barrier ();
- count2 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8);
-
- offset = count2;
- if (count2 < count1) {
- /*
- * We have not had an interrupt between reading count1
- * and count2.
- */
- if (status & (1 << 5))
- offset -= LATCH;
- } else if (count2 > count1) {
- /*
- * We have just had another interrupt between reading
- * count1 and count2.
- */
- offset -= LATCH;
- }
-
- offset = (LATCH - offset) * (tick_nsec / 1000);
- return (offset + LATCH/2) / LATCH;
-}
-
-void __init ioctime_init(void)
-{
- ioc_writeb(LATCH & 255, IOC_T0LTCHL);
- ioc_writeb(LATCH >> 8, IOC_T0LTCHH);
- ioc_writeb(0, IOC_T0GO);
-
- gettimeoffset = ioctime_gettimeoffset;
-}
diff -urN linux/arch/arm26/lib/io-readsl.S linux/arch/arm26/lib/io-readsl.S
--- linux/arch/arm26/lib/io-readsl.S 1970/01/01 00:00:00
+++ linux/arch/arm26/lib/io-readsl.S Thu Jan 13 14:05:21 2005 1.1
@@ -0,0 +1,78 @@
+/*
+ * linux/arch/arm26/lib/io-readsl.S
+ *
+ * Copyright (C) 1995-2000 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/hardware.h>
+
+/*
+ * Note that some reads can be aligned on half-word boundaries.
+ */
+ENTRY(__raw_readsl)
+ teq r2, #0 @ do we have to check for the zero len?
+ moveq pc, lr
+ ands ip, r1, #3
+ bne 2f
+
+1: ldr r3, [r0]
+ str r3, [r1], #4
+ subs r2, r2, #1
+ bne 1b
+ mov pc, lr
+
+2: cmp ip, #2
+ ldr ip, [r0]
+ blt 4f
+ bgt 6f
+
+ strb ip, [r1], #1
+ mov ip, ip, lsr #8
+ strb ip, [r1], #1
+ mov ip, ip, lsr #8
+3: subs r2, r2, #1
+ ldrne r3, [r0]
+ orrne ip, ip, r3, lsl #16
+ strne ip, [r1], #4
+ movne ip, r3, lsr #16
+ bne 3b
+ strb ip, [r1], #1
+ mov ip, ip, lsr #8
+ strb ip, [r1], #1
+ mov pc, lr
+
+4: strb ip, [r1], #1
+ mov ip, ip, lsr #8
+ strb ip, [r1], #1
+ mov ip, ip, lsr #8
+ strb ip, [r1], #1
+ mov ip, ip, lsr #8
+5: subs r2, r2, #1
+ ldrne r3, [r0]
+ orrne ip, ip, r3, lsl #8
+ strne ip, [r1], #4
+ movne ip, r3, lsr #24
+ bne 5b
+ strb ip, [r1], #1
+ mov pc, lr
+
+6: strb ip, [r1], #1
+ mov ip, ip, lsr #8
+7: subs r2, r2, #1
+ ldrne r3, [r0]
+ orrne ip, ip, r3, lsl #24
+ strne ip, [r1], #4
+ movne ip, r3, lsr #8
+ bne 7b
+ strb ip, [r1], #1
+ mov ip, ip, lsr #8
+ strb ip, [r1], #1
+ mov ip, ip, lsr #8
+ strb ip, [r1], #1
+ mov pc, lr
+
diff -urN linux/arch/arm26/lib/io-readsw.S linux/arch/arm26/lib/io-readsw.S
--- linux/arch/arm26/lib/io-readsw.S 1970/01/01 00:00:00
+++ linux/arch/arm26/lib/io-readsw.S Thu Jan 13 14:05:21 2005 1.1
@@ -0,0 +1,107 @@
+/*
+ * linux/arch/arm26/lib/io-readsw.S
+ *
+ * Copyright (C) 1995-2000 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/hardware.h>
+
+.insw_bad_alignment:
+ adr r0, .insw_bad_align_msg
+ mov r2, lr
+ b panic
+.insw_bad_align_msg:
+ .asciz "insw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
+ .align
+
+.insw_align: tst r1, #1
+ bne .insw_bad_alignment
+
+ ldr r3, [r0]
+ strb r3, [r1], #1
+ mov r3, r3, lsr #8
+ strb r3, [r1], #1
+
+ subs r2, r2, #1
+ RETINSTR(moveq, pc, lr)
+
+ENTRY(__raw_readsw)
+ teq r2, #0 @ do we have to check for the zero len?
+ moveq pc, lr
+ tst r1, #3
+ bne .insw_align
+
+.insw_aligned: mov ip, #0xff
+ orr ip, ip, ip, lsl #8
+ stmfd sp!, {r4, r5, r6, lr}
+
+ subs r2, r2, #8
+ bmi .no_insw_8
+
+.insw_8_lp: ldr r3, [r0]
+ and r3, r3, ip
+ ldr r4, [r0]
+ orr r3, r3, r4, lsl #16
+
+ ldr r4, [r0]
+ and r4, r4, ip
+ ldr r5, [r0]
+ orr r4, r4, r5, lsl #16
+
+ ldr r5, [r0]
+ and r5, r5, ip
+ ldr r6, [r0]
+ orr r5, r5, r6, lsl #16
+
+ ldr r6, [r0]
+ and r6, r6, ip
+ ldr lr, [r0]
+ orr r6, r6, lr, lsl #16
+
+ stmia r1!, {r3 - r6}
+
+ subs r2, r2, #8
+ bpl .insw_8_lp
+
+ tst r2, #7
+ LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
+
+.no_insw_8: tst r2, #4
+ beq .no_insw_4
+
+ ldr r3, [r0]
+ and r3, r3, ip
+ ldr r4, [r0]
+ orr r3, r3, r4, lsl #16
+
+ ldr r4, [r0]
+ and r4, r4, ip
+ ldr r5, [r0]
+ orr r4, r4, r5, lsl #16
+
+ stmia r1!, {r3, r4}
+
+.no_insw_4: tst r2, #2
+ beq .no_insw_2
+
+ ldr r3, [r0]
+ and r3, r3, ip
+ ldr r4, [r0]
+ orr r3, r3, r4, lsl #16
+
+ str r3, [r1], #4
+
+.no_insw_2: tst r2, #1
+ ldrne r3, [r0]
+ strneb r3, [r1], #1
+ movne r3, r3, lsr #8
+ strneb r3, [r1]
+
+ LOADREGS(fd, sp!, {r4, r5, r6, pc})
+
+
diff -urN linux/arch/arm26/lib/io-writesw.S linux/arch/arm26/lib/io-writesw.S
--- linux/arch/arm26/lib/io-writesw.S 1970/01/01 00:00:00
+++ linux/arch/arm26/lib/io-writesw.S Thu Jan 13 14:05:21 2005 1.1
@@ -0,0 +1,127 @@
+/*
+ * linux/arch/arm26/lib/io-writesw.S
+ *
+ * Copyright (C) 1995-2000 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/hardware.h>
+
+.outsw_bad_alignment:
+ adr r0, .outsw_bad_align_msg
+ mov r2, lr
+ b panic
+.outsw_bad_align_msg:
+ .asciz "outsw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
+ .align
+
+.outsw_align: tst r1, #1
+ bne .outsw_bad_alignment
+
+ add r1, r1, #2
+
+ ldr r3, [r1, #-4]
+ mov r3, r3, lsr #16
+ orr r3, r3, r3, lsl #16
+ str r3, [r0]
+ subs r2, r2, #1
+ RETINSTR(moveq, pc, lr)
+
+ENTRY(__raw_writesw)
+ teq r2, #0 @ do we have to check for the zero len?
+ moveq pc, lr
+ tst r1, #3
+ bne .outsw_align
+
+.outsw_aligned: stmfd sp!, {r4, r5, r6, lr}
+
+ subs r2, r2, #8
+ bmi .no_outsw_8
+
+.outsw_8_lp: ldmia r1!, {r3, r4, r5, r6}
+
+ mov ip, r3, lsl #16
+ orr ip, ip, ip, lsr #16
+ str ip, [r0]
+
+ mov ip, r3, lsr #16
+ orr ip, ip, ip, lsl #16
+ str ip, [r0]
+
+ mov ip, r4, lsl #16
+ orr ip, ip, ip, lsr #16
+ str ip, [r0]
+
+ mov ip, r4, lsr #16
+ orr ip, ip, ip, lsl #16
+ str ip, [r0]
+
+ mov ip, r5, lsl #16
+ orr ip, ip, ip, lsr #16
+ str ip, [r0]
+
+ mov ip, r5, lsr #16
+ orr ip, ip, ip, lsl #16
+ str ip, [r0]
+
+ mov ip, r6, lsl #16
+ orr ip, ip, ip, lsr #16
+ str ip, [r0]
+
+ mov ip, r6, lsr #16
+ orr ip, ip, ip, lsl #16
+ str ip, [r0]
+
+ subs r2, r2, #8
+ bpl .outsw_8_lp
+
+ tst r2, #7
+ LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
+
+.no_outsw_8: tst r2, #4
+ beq .no_outsw_4
+
+ ldmia r1!, {r3, r4}
+
+ mov ip, r3, lsl #16
+ orr ip, ip, ip, lsr #16
+ str ip, [r0]
+
+ mov ip, r3, lsr #16
+ orr ip, ip, ip, lsl #16
+ str ip, [r0]
+
+ mov ip, r4, lsl #16
+ orr ip, ip, ip, lsr #16
+ str ip, [r0]
+
+ mov ip, r4, lsr #16
+ orr ip, ip, ip, lsl #16
+ str ip, [r0]
+
+.no_outsw_4: tst r2, #2
+ beq .no_outsw_2
+
+ ldr r3, [r1], #4
+
+ mov ip, r3, lsl #16
+ orr ip, ip, ip, lsr #16
+ str ip, [r0]
+
+ mov ip, r3, lsr #16
+ orr ip, ip, ip, lsl #16
+ str ip, [r0]
+
+.no_outsw_2: tst r2, #1
+
+ ldrne r3, [r1]
+
+ movne ip, r3, lsl #16
+ orrne ip, ip, ip, lsr #16
+ strne ip, [r0]
+
+ LOADREGS(fd, sp!, {r4, r5, r6, pc})
diff -urN linux/arch/arm26/lib/Makefile linux/arch/arm26/lib/Makefile
--- linux/arch/arm26/lib/Makefile 2003/07/11 02:13:09 1.2
+++ linux/arch/arm26/lib/Makefile 2005/01/13 14:05:20 1.3
@@ -1,5 +1,5 @@
#
-# linux/arch/arm/lib/Makefile
+# linux/arch/arm26/lib/Makefile
#
# Copyright (C) 1995-2000 Russell King
#
@@ -7,15 +7,15 @@
lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \
csumpartialcopy.o csumpartialcopyuser.o clearbit.o \
copy_page.o delay.o findbit.o memchr.o memcpy.o \
- memset.o memzero.o setbit.o \
- strchr.o strrchr.o testchangebit.o \
+ memset.o memzero.o setbit.o \
+ strchr.o strrchr.o testchangebit.o \
testclearbit.o testsetbit.o getuser.o \
putuser.o ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
ucmpdi2.o udivdi3.o lib1funcs.o ecard.o io-acorn.o \
floppydma.o io-readsb.o io-writesb.o io-writesl.o \
- uaccess-kernel.o uaccess-user.o io-readsw-armv3.o \
- io-writesw-armv3.o io-readsl-armv3.o ecard.o \
- io-acorn.o floppydma.o
+ uaccess-kernel.o uaccess-user.o io-readsw.o \
+ io-writesw.o io-readsl.o ecard.o io-acorn.o \
+ floppydma.o
lib-n :=
diff -urN linux/arch/arm26/lib/backtrace.S linux/arch/arm26/lib/backtrace.S
--- linux/arch/arm26/lib/backtrace.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/backtrace.S 2005/01/13 14:05:20 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/backtrace.S
+ * linux/arch/arm26/lib/backtrace.S
*
* Copyright (C) 1995, 1996 Russell King
*
diff -urN linux/arch/arm26/lib/changebit.S linux/arch/arm26/lib/changebit.S
--- linux/arch/arm26/lib/changebit.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/changebit.S 2005/01/13 14:05:20 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/changebit.S
+ * linux/arch/arm26/lib/changebit.S
*
* Copyright (C) 1995-1996 Russell King
*
diff -urN linux/arch/arm26/lib/clearbit.S linux/arch/arm26/lib/clearbit.S
--- linux/arch/arm26/lib/clearbit.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/clearbit.S 2005/01/13 14:05:20 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/clearbit.S
+ * linux/arch/arm26/lib/clearbit.S
*
* Copyright (C) 1995-1996 Russell King
*
diff -urN linux/arch/arm26/lib/copy_page.S linux/arch/arm26/lib/copy_page.S
--- linux/arch/arm26/lib/copy_page.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/copy_page.S 2005/01/13 14:05:20 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/copypage.S
+ * linux/arch/arm26/lib/copypage.S
*
* Copyright (C) 1995-1999 Russell King
*
diff -urN linux/arch/arm26/lib/csumipv6.S linux/arch/arm26/lib/csumipv6.S
--- linux/arch/arm26/lib/csumipv6.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/csumipv6.S 2005/01/13 14:05:20 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/csumipv6.S
+ * linux/arch/arm26/lib/csumipv6.S
*
* Copyright (C) 1995-1998 Russell King
*
diff -urN linux/arch/arm26/lib/csumpartial.S linux/arch/arm26/lib/csumpartial.S
--- linux/arch/arm26/lib/csumpartial.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/csumpartial.S 2005/01/13 14:05:20 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/csumpartial.S
+ * linux/arch/arm26/lib/csumpartial.S
*
* Copyright (C) 1995-1998 Russell King
*
diff -urN linux/arch/arm26/lib/csumpartialcopy.S
linux/arch/arm26/lib/csumpartialcopy.S
--- linux/arch/arm26/lib/csumpartialcopy.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/csumpartialcopy.S 2005/01/13 14:05:20 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/csumpartialcopy.S
+ * linux/arch/arm26/lib/csumpartialcopy.S
*
* Copyright (C) 1995-1998 Russell King
*
diff -urN linux/arch/arm26/lib/csumpartialcopygeneric.S
linux/arch/arm26/lib/csumpartialcopygeneric.S
--- linux/arch/arm26/lib/csumpartialcopygeneric.S 2003/06/22 23:09:47
1.1
+++ linux/arch/arm26/lib/csumpartialcopygeneric.S 2005/01/13 14:05:21
1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/csumpartialcopygeneric.S
+ * linux/arch/arm26/lib/csumpartialcopygeneric.S
*
* Copyright (C) 1995-2001 Russell King
*
diff -urN linux/arch/arm26/lib/delay.S linux/arch/arm26/lib/delay.S
--- linux/arch/arm26/lib/delay.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/delay.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/delay.S
+ * linux/arch/arm26/lib/delay.S
*
* Copyright (C) 1995, 1996 Russell King
*
diff -urN linux/arch/arm26/lib/ecard.S linux/arch/arm26/lib/ecard.S
--- linux/arch/arm26/lib/ecard.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/ecard.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/ecard.S
+ * linux/arch/arm26/lib/ecard.S
*
* Copyright (C) 1995, 1996 Russell King
*
diff -urN linux/arch/arm26/lib/floppydma.S linux/arch/arm26/lib/floppydma.S
--- linux/arch/arm26/lib/floppydma.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/floppydma.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/floppydma.S
+ * linux/arch/arm26/lib/floppydma.S
*
* Copyright (C) 1995, 1996 Russell King
*
diff -urN linux/arch/arm26/lib/getuser.S linux/arch/arm26/lib/getuser.S
--- linux/arch/arm26/lib/getuser.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/getuser.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/getuser.S
+ * linux/arch/arm26/lib/getuser.S
*
* Copyright (C) 2001 Russell King
*
@@ -28,6 +28,7 @@
*/
#include <asm/asm_offsets.h>
#include <asm/thread_info.h>
+#include <asm/errno.h>
.global __get_user_1
__get_user_1:
@@ -98,7 +99,7 @@
mov r2, #0
__get_user_bad:
mov r1, #0
- mov r0, #-14
+ mov r0, #-EFAULT
ldmfd sp!, {pc}^
.section __ex_table, "a"
diff -urN linux/arch/arm26/lib/io-acorn.S linux/arch/arm26/lib/io-acorn.S
--- linux/arch/arm26/lib/io-acorn.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/io-acorn.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/io-acorn.S
+ * linux/arch/arm26/lib/io-acorn.S
*
* Copyright (C) 1995, 1996 Russell King
*
diff -urN linux/arch/arm26/lib/io-readsb.S linux/arch/arm26/lib/io-readsb.S
--- linux/arch/arm26/lib/io-readsb.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/io-readsb.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/io-readsb.S
+ * linux/arch/arm26/lib/io-readsb.S
*
* Copyright (C) 1995-2000 Russell King
*
diff -urN linux/arch/arm26/lib/io-writesb.S linux/arch/arm26/lib/io-writesb.S
--- linux/arch/arm26/lib/io-writesb.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/io-writesb.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/io-writesb.S
+ * linux/arch/arm26/lib/io-writesb.S
*
* Copyright (C) 1995-2000 Russell King
*
diff -urN linux/arch/arm26/lib/io-writesl.S linux/arch/arm26/lib/io-writesl.S
--- linux/arch/arm26/lib/io-writesl.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/io-writesl.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/io-writesl.S
+ * linux/arch/arm26/lib/io-writesl.S
*
* Copyright (C) 1995-2000 Russell King
*
diff -urN linux/arch/arm26/lib/memchr.S linux/arch/arm26/lib/memchr.S
--- linux/arch/arm26/lib/memchr.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/memchr.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/memchr.S
+ * linux/arch/arm26/lib/memchr.S
*
* Copyright (C) 1995-2000 Russell King
*
diff -urN linux/arch/arm26/lib/memcpy.S linux/arch/arm26/lib/memcpy.S
--- linux/arch/arm26/lib/memcpy.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/memcpy.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/memcpy.S
+ * linux/arch/arm26/lib/memcpy.S
*
* Copyright (C) 1995-1999 Russell King
*
diff -urN linux/arch/arm26/lib/memset.S linux/arch/arm26/lib/memset.S
--- linux/arch/arm26/lib/memset.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/memset.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/memset.S
+ * linux/arch/arm26/lib/memset.S
*
* Copyright (C) 1995-2000 Russell King
*
diff -urN linux/arch/arm26/lib/memzero.S linux/arch/arm26/lib/memzero.S
--- linux/arch/arm26/lib/memzero.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/memzero.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/memzero.S
+ * linux/arch/arm26/lib/memzero.S
*
* Copyright (C) 1995-2000 Russell King
*
diff -urN linux/arch/arm26/lib/putuser.S linux/arch/arm26/lib/putuser.S
--- linux/arch/arm26/lib/putuser.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/putuser.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/putuser.S
+ * linux/arch/arm26/lib/putuser.S
*
* Copyright (C) 2001 Russell King
*
@@ -28,6 +28,7 @@
*/
#include <asm/asm_offsets.h>
#include <asm/thread_info.h>
+#include <asm/errno.h>
.global __put_user_1
__put_user_1:
@@ -95,7 +96,7 @@
ldmfd sp!, {pc}^
__put_user_bad:
- mov r0, #-14
+ mov r0, #-EFAULT
mov pc, lr
.section __ex_table, "a"
diff -urN linux/arch/arm26/lib/setbit.S linux/arch/arm26/lib/setbit.S
--- linux/arch/arm26/lib/setbit.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/setbit.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/setbit.S
+ * linux/arch/arm26/lib/setbit.S
*
* Copyright (C) 1995-1996 Russell King
*
diff -urN linux/arch/arm26/lib/strchr.S linux/arch/arm26/lib/strchr.S
--- linux/arch/arm26/lib/strchr.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/strchr.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/strchr.S
+ * linux/arch/arm26/lib/strchr.S
*
* Copyright (C) 1995-2000 Russell King
*
diff -urN linux/arch/arm26/lib/strrchr.S linux/arch/arm26/lib/strrchr.S
--- linux/arch/arm26/lib/strrchr.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/strrchr.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/strrchr.S
+ * linux/arch/arm26/lib/strrchr.S
*
* Copyright (C) 1995-2000 Russell King
*
diff -urN linux/arch/arm26/lib/testchangebit.S
linux/arch/arm26/lib/testchangebit.S
--- linux/arch/arm26/lib/testchangebit.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/testchangebit.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/testchangebit.S
+ * linux/arch/arm26/lib/testchangebit.S
*
* Copyright (C) 1995-1996 Russell King
*
diff -urN linux/arch/arm26/lib/testclearbit.S
linux/arch/arm26/lib/testclearbit.S
--- linux/arch/arm26/lib/testclearbit.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/testclearbit.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/testclearbit.S
+ * linux/arch/arm26/lib/testclearbit.S
*
* Copyright (C) 1995-1996 Russell King
*
diff -urN linux/arch/arm26/lib/testsetbit.S linux/arch/arm26/lib/testsetbit.S
--- linux/arch/arm26/lib/testsetbit.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/lib/testsetbit.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/lib/testsetbit.S
+ * linux/arch/arm26/lib/testsetbit.S
*
* Copyright (C) 1995-1996 Russell King
*
diff -urN linux/arch/arm26/lib/io-readsl-armv3.S
linux/arch/arm26/lib/io-readsl-armv3.S
--- linux/arch/arm26/lib/Attic/io-readsl-armv3.S Thu Jan 13 14:05:21
2005 1.1
+++ linux/arch/arm26/lib/Attic/io-readsl-armv3.S 1970/01/01 00:00:002002
@@ -1,78 +0,0 @@
-/*
- * linux/arch/arm/lib/io-readsl-armv3.S
- *
- * Copyright (C) 1995-2000 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-#include <asm/hardware.h>
-
-/*
- * Note that some reads can be aligned on half-word boundaries.
- */
-ENTRY(__raw_readsl)
- teq r2, #0 @ do we have to check for the zero len?
- moveq pc, lr
- ands ip, r1, #3
- bne 2f
-
-1: ldr r3, [r0]
- str r3, [r1], #4
- subs r2, r2, #1
- bne 1b
- mov pc, lr
-
-2: cmp ip, #2
- ldr ip, [r0]
- blt 4f
- bgt 6f
-
- strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov ip, ip, lsr #8
-3: subs r2, r2, #1
- ldrne r3, [r0]
- orrne ip, ip, r3, lsl #16
- strne ip, [r1], #4
- movne ip, r3, lsr #16
- bne 3b
- strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov pc, lr
-
-4: strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov ip, ip, lsr #8
-5: subs r2, r2, #1
- ldrne r3, [r0]
- orrne ip, ip, r3, lsl #8
- strne ip, [r1], #4
- movne ip, r3, lsr #24
- bne 5b
- strb ip, [r1], #1
- mov pc, lr
-
-6: strb ip, [r1], #1
- mov ip, ip, lsr #8
-7: subs r2, r2, #1
- ldrne r3, [r0]
- orrne ip, ip, r3, lsl #24
- strne ip, [r1], #4
- movne ip, r3, lsr #8
- bne 7b
- strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov pc, lr
-
diff -urN linux/arch/arm26/lib/io-readsw-armv3.S
linux/arch/arm26/lib/io-readsw-armv3.S
--- linux/arch/arm26/lib/Attic/io-readsw-armv3.S Thu Jan 13 14:05:21
2005 1.1
+++ linux/arch/arm26/lib/Attic/io-readsw-armv3.S 1970/01/01 00:00:002002
@@ -1,107 +0,0 @@
-/*
- * linux/arch/arm/lib/io-readsw-armv3.S
- *
- * Copyright (C) 1995-2000 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-#include <asm/hardware.h>
-
-.insw_bad_alignment:
- adr r0, .insw_bad_align_msg
- mov r2, lr
- b panic
-.insw_bad_align_msg:
- .asciz "insw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
- .align
-
-.insw_align: tst r1, #1
- bne .insw_bad_alignment
-
- ldr r3, [r0]
- strb r3, [r1], #1
- mov r3, r3, lsr #8
- strb r3, [r1], #1
-
- subs r2, r2, #1
- RETINSTR(moveq, pc, lr)
-
-ENTRY(__raw_readsw)
- teq r2, #0 @ do we have to check for the zero len?
- moveq pc, lr
- tst r1, #3
- bne .insw_align
-
-.insw_aligned: mov ip, #0xff
- orr ip, ip, ip, lsl #8
- stmfd sp!, {r4, r5, r6, lr}
-
- subs r2, r2, #8
- bmi .no_insw_8
-
-.insw_8_lp: ldr r3, [r0]
- and r3, r3, ip
- ldr r4, [r0]
- orr r3, r3, r4, lsl #16
-
- ldr r4, [r0]
- and r4, r4, ip
- ldr r5, [r0]
- orr r4, r4, r5, lsl #16
-
- ldr r5, [r0]
- and r5, r5, ip
- ldr r6, [r0]
- orr r5, r5, r6, lsl #16
-
- ldr r6, [r0]
- and r6, r6, ip
- ldr lr, [r0]
- orr r6, r6, lr, lsl #16
-
- stmia r1!, {r3 - r6}
-
- subs r2, r2, #8
- bpl .insw_8_lp
-
- tst r2, #7
- LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
-
-.no_insw_8: tst r2, #4
- beq .no_insw_4
-
- ldr r3, [r0]
- and r3, r3, ip
- ldr r4, [r0]
- orr r3, r3, r4, lsl #16
-
- ldr r4, [r0]
- and r4, r4, ip
- ldr r5, [r0]
- orr r4, r4, r5, lsl #16
-
- stmia r1!, {r3, r4}
-
-.no_insw_4: tst r2, #2
- beq .no_insw_2
-
- ldr r3, [r0]
- and r3, r3, ip
- ldr r4, [r0]
- orr r3, r3, r4, lsl #16
-
- str r3, [r1], #4
-
-.no_insw_2: tst r2, #1
- ldrne r3, [r0]
- strneb r3, [r1], #1
- movne r3, r3, lsr #8
- strneb r3, [r1]
-
- LOADREGS(fd, sp!, {r4, r5, r6, pc})
-
-
diff -urN linux/arch/arm26/lib/io-writesw-armv3.S
linux/arch/arm26/lib/io-writesw-armv3.S
--- linux/arch/arm26/lib/Attic/io-writesw-armv3.S Thu Jan 13 14:05:21
2005 1.1
+++ linux/arch/arm26/lib/Attic/io-writesw-armv3.S 1970/01/01 00:00:002002
@@ -1,127 +0,0 @@
-/*
- * linux/arch/arm/lib/io-writesw-armv3.S
- *
- * Copyright (C) 1995-2000 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-#include <asm/hardware.h>
-
-.outsw_bad_alignment:
- adr r0, .outsw_bad_align_msg
- mov r2, lr
- b panic
-.outsw_bad_align_msg:
- .asciz "outsw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
- .align
-
-.outsw_align: tst r1, #1
- bne .outsw_bad_alignment
-
- add r1, r1, #2
-
- ldr r3, [r1, #-4]
- mov r3, r3, lsr #16
- orr r3, r3, r3, lsl #16
- str r3, [r0]
- subs r2, r2, #1
- RETINSTR(moveq, pc, lr)
-
-ENTRY(__raw_writesw)
- teq r2, #0 @ do we have to check for the zero len?
- moveq pc, lr
- tst r1, #3
- bne .outsw_align
-
-.outsw_aligned: stmfd sp!, {r4, r5, r6, lr}
-
- subs r2, r2, #8
- bmi .no_outsw_8
-
-.outsw_8_lp: ldmia r1!, {r3, r4, r5, r6}
-
- mov ip, r3, lsl #16
- orr ip, ip, ip, lsr #16
- str ip, [r0]
-
- mov ip, r3, lsr #16
- orr ip, ip, ip, lsl #16
- str ip, [r0]
-
- mov ip, r4, lsl #16
- orr ip, ip, ip, lsr #16
- str ip, [r0]
-
- mov ip, r4, lsr #16
- orr ip, ip, ip, lsl #16
- str ip, [r0]
-
- mov ip, r5, lsl #16
- orr ip, ip, ip, lsr #16
- str ip, [r0]
-
- mov ip, r5, lsr #16
- orr ip, ip, ip, lsl #16
- str ip, [r0]
-
- mov ip, r6, lsl #16
- orr ip, ip, ip, lsr #16
- str ip, [r0]
-
- mov ip, r6, lsr #16
- orr ip, ip, ip, lsl #16
- str ip, [r0]
-
- subs r2, r2, #8
- bpl .outsw_8_lp
-
- tst r2, #7
- LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
-
-.no_outsw_8: tst r2, #4
- beq .no_outsw_4
-
- ldmia r1!, {r3, r4}
-
- mov ip, r3, lsl #16
- orr ip, ip, ip, lsr #16
- str ip, [r0]
-
- mov ip, r3, lsr #16
- orr ip, ip, ip, lsl #16
- str ip, [r0]
-
- mov ip, r4, lsl #16
- orr ip, ip, ip, lsr #16
- str ip, [r0]
-
- mov ip, r4, lsr #16
- orr ip, ip, ip, lsl #16
- str ip, [r0]
-
-.no_outsw_4: tst r2, #2
- beq .no_outsw_2
-
- ldr r3, [r1], #4
-
- mov ip, r3, lsl #16
- orr ip, ip, ip, lsr #16
- str ip, [r0]
-
- mov ip, r3, lsr #16
- orr ip, ip, ip, lsl #16
- str ip, [r0]
-
-.no_outsw_2: tst r2, #1
-
- ldrne r3, [r1]
-
- movne ip, r3, lsl #16
- orrne ip, ip, ip, lsr #16
- strne ip, [r0]
-
- LOADREGS(fd, sp!, {r4, r5, r6, pc})
diff -urN linux/arch/arm26/machine/latches.c linux/arch/arm26/machine/latches.c
--- linux/arch/arm26/machine/latches.c 1970/01/01 00:00:00
+++ linux/arch/arm26/machine/latches.c Thu Jan 13 14:05:21 2005 1.1
@@ -0,0 +1,72 @@
+/*
+ * linux/arch/arm26/kernel/latches.c
+ *
+ * Copyright (C) David Alan Gilbert 1995/1996,2000
+ * Copyright (C) Ian Molton 2003
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Support for the latches on the old Archimedes which control the floppy,
+ * hard disc and printer
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+
+#include <asm/io.h>
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/oldlatches.h>
+
+static unsigned char latch_a_copy;
+static unsigned char latch_b_copy;
+
+/* newval=(oldval & ~mask)|newdata */
+void oldlatch_aupdate(unsigned char mask,unsigned char newdata)
+{
+ unsigned long flags;
+
+ BUG_ON(!machine_is_archimedes());
+
+ local_irq_save(flags); //FIXME: was local_save_flags
+ latch_a_copy = (latch_a_copy & ~mask) | newdata;
+ __raw_writeb(latch_a_copy, LATCHA_BASE);
+ local_irq_restore(flags);
+
+ printk("Latch: A = 0x%02x\n", latch_a_copy);
+}
+
+
+/* newval=(oldval & ~mask)|newdata */
+void oldlatch_bupdate(unsigned char mask,unsigned char newdata)
+{
+ unsigned long flags;
+
+ BUG_ON(!machine_is_archimedes());
+
+
+ local_irq_save(flags);//FIXME: was local_save_flags
+ latch_b_copy = (latch_b_copy & ~mask) | newdata;
+ __raw_writeb(latch_b_copy, LATCHB_BASE);
+ local_irq_restore(flags);
+
+ printk("Latch: B = 0x%02x\n", latch_b_copy);
+}
+
+static int __init oldlatch_init(void)
+{
+ if (machine_is_archimedes()) {
+ oldlatch_aupdate(0xff, 0xff);
+ /* Thats no FDC reset...*/
+ oldlatch_bupdate(0xff, LATCHB_FDCRESET);
+ }
+ return 0;
+}
+
+arch_initcall(oldlatch_init);
+
+EXPORT_SYMBOL(oldlatch_aupdate);
+EXPORT_SYMBOL(oldlatch_bupdate);
diff -urN linux/arch/arm26/machine/Makefile linux/arch/arm26/machine/Makefile
--- linux/arch/arm26/machine/Makefile 2003/07/11 02:13:09 1.2
+++ linux/arch/arm26/machine/Makefile 2005/01/13 14:05:21 1.3
@@ -4,9 +4,5 @@
# Object file lists.
-obj-y := dma.o irq.o oldlatches.o \
- small_page.o
+obj-y := dma.o irq.o latches.o
-extra-y := head.o
-
-AFLAGS_head.o := -DTEXTADDR=$(TEXTADDR)
diff -urN linux/arch/arm26/machine/dma.c linux/arch/arm26/machine/dma.c
--- linux/arch/arm26/machine/dma.c 2004/10/25 20:44:13 1.2
+++ linux/arch/arm26/machine/dma.c 2005/01/13 14:05:21 1.3
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/kernel/dma-arc.c
+ * linux/arch/arm26/kernel/dma.c
*
* Copyright (C) 1998-1999 Dave Gilbert / Russell King
* Copyright (C) 2003 Ian Molton
diff -urN linux/arch/arm26/machine/irq.c linux/arch/arm26/machine/irq.c
--- linux/arch/arm26/machine/irq.c 2003/07/11 02:13:09 1.2
+++ linux/arch/arm26/machine/irq.c 2005/01/13 14:05:21 1.3
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/mach-arc/irq.c
+ * linux/arch/arm26/mach-arc/irq.c
*
* Copyright (C) 1996 Russell King
*
diff -urN linux/arch/arm26/machine/head.S linux/arch/arm26/machine/head.S
--- linux/arch/arm26/machine/Attic/head.S Thu Jan 13 14:05:21 2005
1.2
+++ linux/arch/arm26/machine/Attic/head.S 1970/01/01 00:00:002002
@@ -1,111 +0,0 @@
-/*
- * linux/arch/arm/kernel/head-armo.S
- *
- * Copyright (C) 1994-2000 Russell King
- * Copyright (C) 2003 Ian Molton
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * 26-bit kernel startup code
- */
-#include <linux/config.h>
-#include <linux/linkage.h>
-#include <asm/mach-types.h>
-
- .globl swapper_pg_dir
- .equ swapper_pg_dir, 0x0207d000
-
-/*
- * Entry point.
- */
- .section ".init.text",#alloc,#execinstr
-ENTRY(stext)
-__entry: cmp pc, #0x02000000
- ldrlt pc, LC0 @ if 0x01800000, call at
0x02080000
- teq r0, #0 @ Check for old calling method
- blne oldparams @ Move page if old
- adr r0, LC0
- ldmib r0, {r2-r5, sp} @ Setup stack (and fetch other
values)
-
- mov r0, #0 @ Clear BSS
-1: cmp r2, r3
- strcc r0, [r2], #4
- bcc 1b
-
- bl detect_proc_type
- str r0, [r4]
- bl detect_arch_type
- str r0, [r5]
-
-#ifdef CONFIG_XIP_KERNEL
- ldr r3, ETEXT @ data section copy
- ldr r4, SDATA
- ldr r5, EDATA
-1:
- ldr r6, [r3], #4
- str r6, [r4], #4
- cmp r4, r5
- blt 1b
-#endif
-
- mov fp, #0
- b start_kernel
-
-LC0: .word _stext
- .word __bss_start @ r2
- .word _end @ r3
- .word processor_id @ r4
- .word __machine_arch_type @ r5
- .word init_thread_union+8192 @ sp
-#ifdef CONFIG_XIP_KERNEL
-ETEXT: .word _endtext
-SDATA: .word _sdata
-EDATA: .word __bss_start
-#endif
-
-arm2_id: .long 0x41560200 @ ARM2 and 250 dont have a CPUID
-arm250_id: .long 0x41560250 @ So we create some after probing for them
- .align
-
-oldparams: mov r4, #0x02000000
- add r3, r4, #0x00080000
- add r4, r4, #0x0007c000
-1: ldmia r0!, {r5 - r12}
- stmia r4!, {r5 - r12}
- cmp r4, r3
- blt 1b
- mov pc, lr
-
-/*
- * We need some way to automatically detect the difference between
- * these two machines. Unfortunately, it is not possible to detect
- * the presence of the SuperIO chip, because that will hang the old
- * Archimedes machines solid.
- */
-/* DAG: Outdated, these have been combined !!!!!!! */
-detect_arch_type:
-#if defined(CONFIG_ARCH_ARC)
- mov r0, #MACH_TYPE_ARCHIMEDES
-#elif defined(CONFIG_ARCH_A5K)
- mov r0, #MACH_TYPE_A5K
-#endif
- mov pc, lr
-
-detect_proc_type:
- mov ip, lr
- mov r2, #0xea000000 @ Point undef instr to
continuation
- adr r0, continue - 12
- orr r0, r2, r0, lsr #2
- mov r1, #0
- str r0, [r1, #4]
- ldr r0, arm2_id
- swp r2, r2, [r1] @ check for swp (ARM2 cant)
- ldr r0, arm250_id
- mrc 15, 0, r3, c0, c0 @ check for CP#15 (ARM250 cant)
- mov r0, r3
-continue: mov r2, #0xeb000000 @ Make undef vector loop
- sub r2, r2, #2
- str r2, [r1, #4]
- mov pc, ip
diff -urN linux/arch/arm26/machine/oldlatches.c
linux/arch/arm26/machine/oldlatches.c
--- linux/arch/arm26/machine/Attic/oldlatches.c Thu Jan 13 14:05:21 2005
1.1
+++ linux/arch/arm26/machine/Attic/oldlatches.c 1970/01/01 00:00:002002
@@ -1,72 +0,0 @@
-/*
- * linux/arch/arm/kernel/oldlatches.c
- *
- * Copyright (C) David Alan Gilbert 1995/1996,2000
- * Copyright (C) Ian Molton 2003
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Support for the latches on the old Archimedes which control the floppy,
- * hard disc and printer
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-
-#include <asm/io.h>
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/oldlatches.h>
-
-static unsigned char latch_a_copy;
-static unsigned char latch_b_copy;
-
-/* newval=(oldval & ~mask)|newdata */
-void oldlatch_aupdate(unsigned char mask,unsigned char newdata)
-{
- unsigned long flags;
-
- BUG_ON(!machine_is_archimedes());
-
- local_irq_save(flags); //FIXME: was local_save_flags
- latch_a_copy = (latch_a_copy & ~mask) | newdata;
- __raw_writeb(latch_a_copy, LATCHA_BASE);
- local_irq_restore(flags);
-
- printk("Latch: A = 0x%02x\n", latch_a_copy);
-}
-
-
-/* newval=(oldval & ~mask)|newdata */
-void oldlatch_bupdate(unsigned char mask,unsigned char newdata)
-{
- unsigned long flags;
-
- BUG_ON(!machine_is_archimedes());
-
-
- local_irq_save(flags);//FIXME: was local_save_flags
- latch_b_copy = (latch_b_copy & ~mask) | newdata;
- __raw_writeb(latch_b_copy, LATCHB_BASE);
- local_irq_restore(flags);
-
- printk("Latch: B = 0x%02x\n", latch_b_copy);
-}
-
-static int __init oldlatch_init(void)
-{
- if (machine_is_archimedes()) {
- oldlatch_aupdate(0xff, 0xff);
- /* Thats no FDC reset...*/
- oldlatch_bupdate(0xff, LATCHB_FDCRESET);
- }
- return 0;
-}
-
-arch_initcall(oldlatch_init);
-
-EXPORT_SYMBOL(oldlatch_aupdate);
-EXPORT_SYMBOL(oldlatch_bupdate);
diff -urN linux/arch/arm26/machine/small_page.c
linux/arch/arm26/machine/small_page.c
--- linux/arch/arm26/machine/Attic/small_page.c Thu Jan 13 14:05:21 2005
1.3
+++ linux/arch/arm26/machine/Attic/small_page.c 1970/01/01 00:00:002002
@@ -1,191 +0,0 @@
-/*
- * linux/arch/arm/mm/small_page.c
- *
- * Copyright (C) 1996 Russell King
- * Copyright (C) 2003 Ian Molton
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Changelog:
- * 26/01/1996 RMK Cleaned up various areas to make little more
generic
- * 07/02/1999 RMK Support added for 16K and 32K page sizes
- * containing 8K blocks
- */
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/swap.h>
-#include <linux/smp.h>
-#include <linux/bitops.h>
-
-#include <asm/pgtable.h>
-
-#define PEDANTIC
-
-/*
- * Requirement:
- * We need to be able to allocate naturally aligned memory of finer
- * granularity than the page size. This is typically used for the
- * second level page tables on 32-bit ARMs.
- *
- * Theory:
- * We "misuse" the Linux memory management system. We use alloc_page
- * to allocate a page and then mark it as reserved. The Linux memory
- * management system will then ignore the "offset", "next_hash" and
- * "pprev_hash" entries in the mem_map for this page.
- *
- * We then use a bitstring in the "offset" field to mark which segments
- * of the page are in use, and manipulate this as required during the
- * allocation and freeing of these small pages.
- *
- * We also maintain a queue of pages being used for this purpose using
- * the "next_hash" and "pprev_hash" entries of mem_map;
- */
-
-struct order {
- struct list_head queue;
- unsigned int mask; /* (1 << shift) - 1 */
- unsigned int shift; /* (1 << shift) size of page */
- unsigned int block_mask; /* nr_blocks - 1 */
- unsigned int all_used; /* (1 << nr_blocks) - 1 */
-};
-
-
-static struct order orders[] = {
-#if PAGE_SIZE == 32768
- { LIST_HEAD_INIT(orders[0].queue), 2047, 11, 15, 0x0000ffff },
- { LIST_HEAD_INIT(orders[1].queue), 8191, 13, 3, 0x0000000f }
-#else
-#error unsupported page size (ARGH!)
-#endif
-};
-
-#define USED_MAP(pg) ((pg)->index)
-#define TEST_AND_CLEAR_USED(pg,off) (test_and_clear_bit(off, &USED_MAP(pg)))
-#define SET_USED(pg,off) (set_bit(off, &USED_MAP(pg)))
-
-static spinlock_t small_page_lock = SPIN_LOCK_UNLOCKED;
-
-static unsigned long __get_small_page(int priority, struct order *order)
-{
- unsigned long flags;
- struct page *page;
- int offset;
-
- do {
- spin_lock_irqsave(&small_page_lock, flags);
-
- if (list_empty(&order->queue))
- goto need_new_page;
-
- page = list_entry(order->queue.next, struct page, list);
-again:
-#ifdef PEDANTIC
- if (USED_MAP(page) & ~order->all_used)
- PAGE_BUG(page);
-#endif
- offset = ffz(USED_MAP(page));
- SET_USED(page, offset);
- if (USED_MAP(page) == order->all_used)
- list_del_init(&page->lru);
- spin_unlock_irqrestore(&small_page_lock, flags);
-
- return (unsigned long) page_address(page) + (offset <<
order->shift);
-
-need_new_page:
- spin_unlock_irqrestore(&small_page_lock, flags);
- page = alloc_page(priority);
- spin_lock_irqsave(&small_page_lock, flags);
-
- if (list_empty(&order->queue)) {
- if (!page)
- goto no_page;
- SetPageReserved(page);
- USED_MAP(page) = 0;
- list_add(&page->lru, &order->queue);
- goto again;
- }
-
- spin_unlock_irqrestore(&small_page_lock, flags);
- __free_page(page);
- } while (1);
-
-no_page:
- spin_unlock_irqrestore(&small_page_lock, flags);
- return 0;
-}
-
-static void __free_small_page(unsigned long spage, struct order *order)
-{
- unsigned long flags;
- struct page *page;
-
- if (virt_addr_valid(spage)) {
- page = virt_to_page(spage);
-
- /*
- * The container-page must be marked Reserved
- */
- if (!PageReserved(page) || spage & order->mask)
- goto non_small;
-
-#ifdef PEDANTIC
- if (USED_MAP(page) & ~order->all_used)
- PAGE_BUG(page);
-#endif
-
- spage = spage >> order->shift;
- spage &= order->block_mask;
-
- /*
- * the following must be atomic wrt get_page
- */
- spin_lock_irqsave(&small_page_lock, flags);
-
- if (USED_MAP(page) == order->all_used)
- list_add(&page->lru, &order->queue);
-
- if (!TEST_AND_CLEAR_USED(page, spage))
- goto already_free;
-
- if (USED_MAP(page) == 0)
- goto free_page;
-
- spin_unlock_irqrestore(&small_page_lock, flags);
- }
- return;
-
-free_page:
- /*
- * unlink the page from the small page queue and free it
- */
- list_del_init(&page->lru);
- spin_unlock_irqrestore(&small_page_lock, flags);
- ClearPageReserved(page);
- __free_page(page);
- return;
-
-non_small:
- printk("Trying to free non-small page from %p\n",
__builtin_return_address(0));
- return;
-already_free:
- printk("Trying to free free small page from %p\n",
__builtin_return_address(0));
-}
-
-unsigned long get_page_8k(int priority)
-{
- return __get_small_page(priority, orders+1);
-}
-
-void free_page_8k(unsigned long spage)
-{
- __free_small_page(spage, orders+1);
-}
diff -urN linux/arch/arm26/mm/memc.c linux/arch/arm26/mm/memc.c
--- linux/arch/arm26/mm/memc.c 1970/01/01 00:00:00
+++ linux/arch/arm26/mm/memc.c Thu Jan 13 14:05:21 2005 1.1
@@ -0,0 +1,202 @@
+/*
+ * linux/arch/arm26/mm/memc.c
+ *
+ * Copyright (C) 1998-2000 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Page table sludge for older ARM processor architectures.
+ */
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/bootmem.h>
+
+#include <asm/pgtable.h>
+#include <asm/pgalloc.h>
+#include <asm/page.h>
+#include <asm/memory.h>
+#include <asm/hardware.h>
+
+#include <asm/map.h>
+
+#define MEMC_TABLE_SIZE (256*sizeof(unsigned long))
+
+kmem_cache_t *pte_cache, *pgd_cache;
+int page_nr;
+
+/*
+ * Allocate space for a page table and a MEMC table.
+ * Note that we place the MEMC
+ * table before the page directory. This means we can
+ * easily get to both tightly-associated data structures
+ * with a single pointer.
+ */
+static inline pgd_t *alloc_pgd_table(void)
+{
+ void *pg2k = kmem_cache_alloc(pgd_cache, GFP_KERNEL);
+
+ if (pg2k)
+ pg2k += MEMC_TABLE_SIZE;
+
+ return (pgd_t *)pg2k;
+}
+
+/*
+ * Free a page table. this function is the counterpart to get_pgd_slow
+ * below, not alloc_pgd_table above.
+ */
+void free_pgd_slow(pgd_t *pgd)
+{
+ unsigned long tbl = (unsigned long)pgd;
+
+ tbl -= MEMC_TABLE_SIZE;
+
+ kmem_cache_free(pgd_cache, (void *)tbl);
+}
+
+/*
+ * Allocate a new pgd and fill it in ready for use
+ *
+ * A new tasks pgd is completely empty (all pages !present) except for:
+ *
+ * o The machine vectors at virtual address 0x0
+ * o The vmalloc region at the top of address space
+ *
+ */
+#define FIRST_KERNEL_PGD_NR (FIRST_USER_PGD_NR + USER_PTRS_PER_PGD)
+
+pgd_t *get_pgd_slow(struct mm_struct *mm)
+{
+ pgd_t *new_pgd, *init_pgd;
+ pmd_t *new_pmd, *init_pmd;
+ pte_t *new_pte, *init_pte;
+
+ new_pgd = alloc_pgd_table();
+ if (!new_pgd)
+ goto no_pgd;
+
+ /*
+ * This lock is here just to satisfy pmd_alloc and pte_lock
+ * FIXME: I bet we could avoid taking it pretty much altogether
+ */
+ spin_lock(&mm->page_table_lock);
+
+ /*
+ * On ARM, first page must always be allocated since it contains
+ * the machine vectors.
+ */
+ new_pmd = pmd_alloc(mm, new_pgd, 0);
+ if (!new_pmd)
+ goto no_pmd;
+
+ new_pte = pte_alloc_kernel(mm, new_pmd, 0);
+ if (!new_pte)
+ goto no_pte;
+
+ init_pgd = pgd_offset(&init_mm, 0);
+ init_pmd = pmd_offset(init_pgd, 0);
+ init_pte = pte_offset(init_pmd, 0);
+
+ set_pte(new_pte, *init_pte);
+
+ /*
+ * the page table entries are zeroed
+ * when the table is created. (see the cache_ctor functions below)
+ * Now we need to plonk the kernel (vmalloc) area at the end of
+ * the address space. We copy this from the init thread, just like
+ * the init_pte we copied above...
+ */
+ memcpy(new_pgd + FIRST_KERNEL_PGD_NR, init_pgd + FIRST_KERNEL_PGD_NR,
+ (PTRS_PER_PGD - FIRST_KERNEL_PGD_NR) * sizeof(pgd_t));
+
+ spin_unlock(&mm->page_table_lock);
+
+ /* update MEMC tables */
+ cpu_memc_update_all(new_pgd);
+ return new_pgd;
+
+no_pte:
+ spin_unlock(&mm->page_table_lock);
+ pmd_free(new_pmd);
+ free_pgd_slow(new_pgd);
+ return NULL;
+
+no_pmd:
+ spin_unlock(&mm->page_table_lock);
+ free_pgd_slow(new_pgd);
+ return NULL;
+
+no_pgd:
+ return NULL;
+}
+
+/*
+ * No special code is required here.
+ */
+void setup_mm_for_reboot(char mode)
+{
+}
+
+/*
+ * This contains the code to setup the memory map on an ARM2/ARM250/ARM3
+ * o swapper_pg_dir = 0x0207d000
+ * o kernel proper starts at 0x0208000
+ * o create (allocate) a pte to contain the machine vectors
+ * o populate the pte (points to 0x02078000) (FIXME - is it zeroed?)
+ * o populate the init tasks page directory (pgd) with the new pte
+ * o zero the rest of the init tasks pgdir (FIXME - what about vmalloc?!)
+ */
+void __init memtable_init(struct meminfo *mi)
+{
+ pte_t *pte;
+ int i;
+
+ page_nr = max_low_pfn;
+
+ pte = alloc_bootmem_low_pages(PTRS_PER_PTE * sizeof(pte_t));
+ pte[0] = mk_pte_phys(PAGE_OFFSET + SCREEN_SIZE, PAGE_READONLY);
+ pmd_populate(&init_mm, pmd_offset(swapper_pg_dir, 0), pte);
+
+ for (i = 1; i < PTRS_PER_PGD; i++)
+ pgd_val(swapper_pg_dir[i]) = 0;
+}
+
+void __init iotable_init(struct map_desc *io_desc)
+{
+ /* nothing to do */
+}
+
+/*
+ * We never have holes in the memmap
+ */
+void __init create_memmap_holes(struct meminfo *mi)
+{
+}
+
+static void pte_cache_ctor(void *pte, kmem_cache_t *cache, unsigned long flags)
+{
+ memzero(pte, sizeof(pte_t) * PTRS_PER_PTE);
+}
+
+static void pgd_cache_ctor(void *pgd, kmem_cache_t *cache, unsigned long flags)
+{
+ memzero(pgd + MEMC_TABLE_SIZE, USER_PTRS_PER_PGD * sizeof(pgd_t));
+}
+
+void __init pgtable_cache_init(void)
+{
+ pte_cache = kmem_cache_create("pte-cache",
+ sizeof(pte_t) * PTRS_PER_PTE,
+ 0, 0, pte_cache_ctor, NULL);
+ if (!pte_cache)
+ BUG();
+
+ pgd_cache = kmem_cache_create("pgd-cache", MEMC_TABLE_SIZE +
+ sizeof(pgd_t) * PTRS_PER_PGD,
+ 0, 0, pgd_cache_ctor, NULL);
+ if (!pgd_cache)
+ BUG();
+}
diff -urN linux/arch/arm26/mm/small_page.c linux/arch/arm26/mm/small_page.c
--- linux/arch/arm26/mm/small_page.c 1970/01/01 00:00:00
+++ linux/arch/arm26/mm/small_page.c Thu Jan 13 14:05:21 2005 1.1
@@ -0,0 +1,194 @@
+/*
+ * linux/arch/arm26/mm/small_page.c
+ *
+ * Copyright (C) 1996 Russell King
+ * Copyright (C) 2003 Ian Molton
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Changelog:
+ * 26/01/1996 RMK Cleaned up various areas to make little more
generic
+ * 07/02/1999 RMK Support added for 16K and 32K page sizes
+ * containing 8K blocks
+ * 23/05/2004 IM Fixed to use struct page->lru (thanks wli)
+ *
+ */
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+#include <linux/mman.h>
+#include <linux/mm.h>
+#include <linux/swap.h>
+#include <linux/smp.h>
+#include <linux/bitops.h>
+
+#include <asm/pgtable.h>
+
+#define PEDANTIC
+
+/*
+ * Requirement:
+ * We need to be able to allocate naturally aligned memory of finer
+ * granularity than the page size. This is typically used for the
+ * second level page tables on 32-bit ARMs.
+ *
+ * FIXME - this comment is *out of date*
+ * Theory:
+ * We "misuse" the Linux memory management system. We use alloc_page
+ * to allocate a page and then mark it as reserved. The Linux memory
+ * management system will then ignore the "offset", "next_hash" and
+ * "pprev_hash" entries in the mem_map for this page.
+ *
+ * We then use a bitstring in the "offset" field to mark which segments
+ * of the page are in use, and manipulate this as required during the
+ * allocation and freeing of these small pages.
+ *
+ * We also maintain a queue of pages being used for this purpose using
+ * the "next_hash" and "pprev_hash" entries of mem_map;
+ */
+
+struct order {
+ struct list_head queue;
+ unsigned int mask; /* (1 << shift) - 1 */
+ unsigned int shift; /* (1 << shift) size of page */
+ unsigned int block_mask; /* nr_blocks - 1 */
+ unsigned int all_used; /* (1 << nr_blocks) - 1 */
+};
+
+
+static struct order orders[] = {
+#if PAGE_SIZE == 32768
+ { LIST_HEAD_INIT(orders[0].queue), 2047, 11, 15, 0x0000ffff },
+ { LIST_HEAD_INIT(orders[1].queue), 8191, 13, 3, 0x0000000f }
+#else
+#error unsupported page size (ARGH!)
+#endif
+};
+
+#define USED_MAP(pg) ((pg)->index)
+#define TEST_AND_CLEAR_USED(pg,off) (test_and_clear_bit(off, &USED_MAP(pg)))
+#define SET_USED(pg,off) (set_bit(off, &USED_MAP(pg)))
+
+static spinlock_t small_page_lock = SPIN_LOCK_UNLOCKED;
+
+static unsigned long __get_small_page(int priority, struct order *order)
+{
+ unsigned long flags;
+ struct page *page;
+ int offset;
+
+ do {
+ spin_lock_irqsave(&small_page_lock, flags);
+
+ if (list_empty(&order->queue))
+ goto need_new_page;
+
+ page = list_entry(order->queue.next, struct page, lru);
+again:
+#ifdef PEDANTIC
+ if (USED_MAP(page) & ~order->all_used)
+ PAGE_BUG(page);
+#endif
+ offset = ffz(USED_MAP(page));
+ SET_USED(page, offset);
+ if (USED_MAP(page) == order->all_used)
+ list_del_init(&page->lru);
+ spin_unlock_irqrestore(&small_page_lock, flags);
+
+ return (unsigned long) page_address(page) + (offset <<
order->shift);
+
+need_new_page:
+ spin_unlock_irqrestore(&small_page_lock, flags);
+ page = alloc_page(priority);
+ spin_lock_irqsave(&small_page_lock, flags);
+
+ if (list_empty(&order->queue)) {
+ if (!page)
+ goto no_page;
+ SetPageReserved(page);
+ USED_MAP(page) = 0;
+ list_add(&page->lru, &order->queue);
+ goto again;
+ }
+
+ spin_unlock_irqrestore(&small_page_lock, flags);
+ __free_page(page);
+ } while (1);
+
+no_page:
+ spin_unlock_irqrestore(&small_page_lock, flags);
+ return 0;
+}
+
+static void __free_small_page(unsigned long spage, struct order *order)
+{
+ unsigned long flags;
+ struct page *page;
+
+ if (virt_addr_valid(spage)) {
+ page = virt_to_page(spage);
+
+ /*
+ * The container-page must be marked Reserved
+ */
+ if (!PageReserved(page) || spage & order->mask)
+ goto non_small;
+
+#ifdef PEDANTIC
+ if (USED_MAP(page) & ~order->all_used)
+ PAGE_BUG(page);
+#endif
+
+ spage = spage >> order->shift;
+ spage &= order->block_mask;
+
+ /*
+ * the following must be atomic wrt get_page
+ */
+ spin_lock_irqsave(&small_page_lock, flags);
+
+ if (USED_MAP(page) == order->all_used)
+ list_add(&page->lru, &order->queue);
+
+ if (!TEST_AND_CLEAR_USED(page, spage))
+ goto already_free;
+
+ if (USED_MAP(page) == 0)
+ goto free_page;
+
+ spin_unlock_irqrestore(&small_page_lock, flags);
+ }
+ return;
+
+free_page:
+ /*
+ * unlink the page from the small page queue and free it
+ */
+ list_del_init(&page->lru);
+ spin_unlock_irqrestore(&small_page_lock, flags);
+ ClearPageReserved(page);
+ __free_page(page);
+ return;
+
+non_small:
+ printk("Trying to free non-small page from %p\n",
__builtin_return_address(0));
+ return;
+already_free:
+ printk("Trying to free free small page from %p\n",
__builtin_return_address(0));
+}
+
+unsigned long get_page_8k(int priority)
+{
+ return __get_small_page(priority, orders+1);
+}
+
+void free_page_8k(unsigned long spage)
+{
+ __free_small_page(spage, orders+1);
+}
diff -urN linux/arch/arm26/mm/Makefile linux/arch/arm26/mm/Makefile
--- linux/arch/arm26/mm/Makefile 2004/03/11 16:46:41 1.2
+++ linux/arch/arm26/mm/Makefile 2005/01/13 14:05:21 1.3
@@ -2,4 +2,5 @@
# Makefile for the linux arm26-specific parts of the memory manager.
#
-obj-y := init.o extable.o proc-funcs.o mm-memc.o fault.o
+obj-y := init.o extable.o proc-funcs.o memc.o fault.o \
+ small_page.o
diff -urN linux/arch/arm26/mm/extable.c linux/arch/arm26/mm/extable.c
--- linux/arch/arm26/mm/extable.c 2004/02/05 02:39:52 1.2
+++ linux/arch/arm26/mm/extable.c 2005/01/13 14:05:21 1.3
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/mm/extable.c
+ * linux/arch/arm26/mm/extable.c
*/
#include <linux/config.h>
@@ -11,6 +11,12 @@
const struct exception_table_entry *fixup;
fixup = search_exception_tables(instruction_pointer(regs));
+
+ /*
+ * The kernel runs in SVC mode - make sure we keep running in SVC mode
+ * by frobbing the PSR appropriately (PSR and PC are in the same reg.
+ * on ARM26)
+ */
if (fixup)
regs->ARM_pc = fixup->fixup | PSR_I_BIT | MODE_SVC26;
diff -urN linux/arch/arm26/mm/fault.c linux/arch/arm26/mm/fault.c
--- linux/arch/arm26/mm/fault.c 2003/09/09 16:40:55 1.2
+++ linux/arch/arm26/mm/fault.c 2005/01/13 14:05:21 1.3
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/mm/fault-common.c
+ * linux/arch/arm26/mm/fault.c
*
* Copyright (C) 1995 Linus Torvalds
* Modifications for ARM processor (c) 1995-2001 Russell King
@@ -212,7 +212,6 @@
tsk = current;
mm = tsk->mm;
- printk("do_page_fault: pid: %d %08x\n", tsk->pid, addr);
/*
* If we're in an interrupt or have no user
* context, we must not take the fault..
diff -urN linux/arch/arm26/mm/init.c linux/arch/arm26/mm/init.c
--- linux/arch/arm26/mm/init.c 2004/10/12 14:36:32 1.7
+++ linux/arch/arm26/mm/init.c 2005/01/13 14:05:21 1.8
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/mm/init.c
+ * linux/arch/arm26/mm/init.c
*
* Copyright (C) 1995-2002 Russell King
*
@@ -26,7 +26,6 @@
#include <asm/segment.h>
#include <asm/mach-types.h>
-#include <asm/pgalloc.h>
#include <asm/dma.h>
#include <asm/hardware.h>
#include <asm/setup.h>
@@ -84,7 +83,7 @@
else if (!page_count(page))
free++;
else
- shared += atomic_read(&page->count) - 1;
+ shared += page_count(page) - 1;
page++;
} while (page < end);
@@ -156,7 +155,8 @@
{
unsigned int memend_pfn = 0;
- numnodes = 1;
+ nodes_clear(node_online_map);
+ node_set_online(0);
np->bootmap_pages = 0;
diff -urN linux/arch/arm26/mm/proc-funcs.S linux/arch/arm26/mm/proc-funcs.S
--- linux/arch/arm26/mm/proc-funcs.S 2003/06/22 23:09:47 1.1
+++ linux/arch/arm26/mm/proc-funcs.S 2005/01/13 14:05:21 1.2
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/mm/proc-arm2,3.S
+ * linux/arch/arm26/mm/proc-arm2,3.S
*
* Copyright (C) 1997-1999 Russell King
*
diff -urN linux/arch/arm26/mm/mm-memc.c linux/arch/arm26/mm/mm-memc.c
--- linux/arch/arm26/mm/Attic/mm-memc.c Thu Jan 13 14:05:21 2005 1.2
+++ linux/arch/arm26/mm/Attic/mm-memc.c 1970/01/01 00:00:002002
@@ -1,202 +0,0 @@
-/*
- * linux/arch/arm/mm/mm-armo.c
- *
- * Copyright (C) 1998-2000 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Page table sludge for older ARM processor architectures.
- */
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-#include <linux/bootmem.h>
-
-#include <asm/pgtable.h>
-#include <asm/pgalloc.h>
-#include <asm/page.h>
-#include <asm/memory.h>
-#include <asm/hardware.h>
-
-#include <asm/map.h>
-
-#define MEMC_TABLE_SIZE (256*sizeof(unsigned long))
-
-kmem_cache_t *pte_cache, *pgd_cache;
-int page_nr;
-
-/*
- * Allocate space for a page table and a MEMC table.
- * Note that we place the MEMC
- * table before the page directory. This means we can
- * easily get to both tightly-associated data structures
- * with a single pointer.
- */
-static inline pgd_t *alloc_pgd_table(void)
-{
- void *pg2k = kmem_cache_alloc(pgd_cache, GFP_KERNEL);
-
- if (pg2k)
- pg2k += MEMC_TABLE_SIZE;
-
- return (pgd_t *)pg2k;
-}
-
-/*
- * Free a page table. this function is the counterpart to get_pgd_slow
- * below, not alloc_pgd_table above.
- */
-void free_pgd_slow(pgd_t *pgd)
-{
- unsigned long tbl = (unsigned long)pgd;
-
- tbl -= MEMC_TABLE_SIZE;
-
- kmem_cache_free(pgd_cache, (void *)tbl);
-}
-
-/*
- * Allocate a new pgd and fill it in ready for use
- *
- * A new tasks pgd is completely empty (all pages !present) except for:
- *
- * o The machine vectors at virtual address 0x0
- * o The vmalloc region at the top of address space
- *
- */
-#define FIRST_KERNEL_PGD_NR (FIRST_USER_PGD_NR + USER_PTRS_PER_PGD)
-
-pgd_t *get_pgd_slow(struct mm_struct *mm)
-{
- pgd_t *new_pgd, *init_pgd;
- pmd_t *new_pmd, *init_pmd;
- pte_t *new_pte, *init_pte;
-
- new_pgd = alloc_pgd_table();
- if (!new_pgd)
- goto no_pgd;
-
- /*
- * This lock is here just to satisfy pmd_alloc and pte_lock
- * FIXME: I bet we could avoid taking it pretty much altogether
- */
- spin_lock(&mm->page_table_lock);
-
- /*
- * On ARM, first page must always be allocated since it contains
- * the machine vectors.
- */
- new_pmd = pmd_alloc(mm, new_pgd, 0);
- if (!new_pmd)
- goto no_pmd;
-
- new_pte = pte_alloc_kernel(mm, new_pmd, 0);
- if (!new_pte)
- goto no_pte;
-
- init_pgd = pgd_offset(&init_mm, 0);
- init_pmd = pmd_offset(init_pgd, 0);
- init_pte = pte_offset(init_pmd, 0);
-
- set_pte(new_pte, *init_pte);
-
- /*
- * the page table entries are zeroed
- * when the table is created. (see the cache_ctor functions below)
- * Now we need to plonk the kernel (vmalloc) area at the end of
- * the address space. We copy this from the init thread, just like
- * the init_pte we copied above...
- */
- memcpy(new_pgd + FIRST_KERNEL_PGD_NR, init_pgd + FIRST_KERNEL_PGD_NR,
- (PTRS_PER_PGD - FIRST_KERNEL_PGD_NR) * sizeof(pgd_t));
-
- spin_unlock(&mm->page_table_lock);
-
- /* update MEMC tables */
- cpu_memc_update_all(new_pgd);
- return new_pgd;
-
-no_pte:
- spin_unlock(&mm->page_table_lock);
- pmd_free(new_pmd);
- free_pgd_slow(new_pgd);
- return NULL;
-
-no_pmd:
- spin_unlock(&mm->page_table_lock);
- free_pgd_slow(new_pgd);
- return NULL;
-
-no_pgd:
- return NULL;
-}
-
-/*
- * No special code is required here.
- */
-void setup_mm_for_reboot(char mode)
-{
-}
-
-/*
- * This contains the code to setup the memory map on an ARM2/ARM250/ARM3
- * o swapper_pg_dir = 0x0207d000
- * o kernel proper starts at 0x0208000
- * o create (allocate) a pte to contain the machine vectors
- * o populate the pte (points to 0x02078000) (FIXME - is it zeroed?)
- * o populate the init tasks page directory (pgd) with the new pte
- * o zero the rest of the init tasks pgdir (FIXME - what about vmalloc?!)
- */
-void __init memtable_init(struct meminfo *mi)
-{
- pte_t *pte;
- int i;
-
- page_nr = max_low_pfn;
-
- pte = alloc_bootmem_low_pages(PTRS_PER_PTE * sizeof(pte_t));
- pte[0] = mk_pte_phys(PAGE_OFFSET + SCREEN_SIZE, PAGE_READONLY);
- pmd_populate(&init_mm, pmd_offset(swapper_pg_dir, 0), pte);
-
- for (i = 1; i < PTRS_PER_PGD; i++)
- pgd_val(swapper_pg_dir[i]) = 0;
-}
-
-void __init iotable_init(struct map_desc *io_desc)
-{
- /* nothing to do */
-}
-
-/*
- * We never have holes in the memmap
- */
-void __init create_memmap_holes(struct meminfo *mi)
-{
-}
-
-static void pte_cache_ctor(void *pte, kmem_cache_t *cache, unsigned long flags)
-{
- memzero(pte, sizeof(pte_t) * PTRS_PER_PTE);
-}
-
-static void pgd_cache_ctor(void *pgd, kmem_cache_t *cache, unsigned long flags)
-{
- memzero(pgd + MEMC_TABLE_SIZE, USER_PTRS_PER_PGD * sizeof(pgd_t));
-}
-
-void __init pgtable_cache_init(void)
-{
- pte_cache = kmem_cache_create("pte-cache",
- sizeof(pte_t) * PTRS_PER_PTE,
- 0, 0, pte_cache_ctor, NULL);
- if (!pte_cache)
- BUG();
-
- pgd_cache = kmem_cache_create("pgd-cache", MEMC_TABLE_SIZE +
- sizeof(pgd_t) * PTRS_PER_PGD,
- 0, 0, pgd_cache_ctor, NULL);
- if (!pgd_cache)
- BUG();
-}
diff -urN linux/arch/cris/Kconfig linux/arch/cris/Kconfig
--- linux/arch/cris/Kconfig 2004/08/24 15:10:04 1.15
+++ linux/arch/cris/Kconfig 2005/01/13 14:05:21 1.16
@@ -20,6 +20,10 @@
config RWSEM_XCHGADD_ALGORITHM
bool
+config GENERIC_CALIBRATE_DELAY
+ bool
+ default y
+
config CRIS
bool
default y
diff -urN linux/arch/cris/arch-v10/kernel/fasttimer.c
linux/arch/cris/arch-v10/kernel/fasttimer.c
--- linux/arch/cris/arch-v10/kernel/fasttimer.c 2004/11/15 11:49:15 1.4
+++ linux/arch/cris/arch-v10/kernel/fasttimer.c 2005/01/13 14:05:22 1.5
@@ -599,23 +599,8 @@
#ifdef CONFIG_PROC_FS
static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0)
- ,int *eof, void *data_unused
-#else
- ,int unused
-#endif
- );
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0)
+ ,int *eof, void *data_unused);
static struct proc_dir_entry *fasttimer_proc_entry;
-#else
-static struct proc_dir_entry fasttimer_proc_entry =
-{
- 0, 9, "fasttimer",
- S_IFREG | S_IRUGO, 1, 0, 0,
- 0, NULL /* ops -- default to array */,
- &proc_fasttimer_read /* get_info */,
-};
-#endif
#endif /* CONFIG_PROC_FS */
#ifdef CONFIG_PROC_FS
@@ -624,12 +609,7 @@
#define BIG_BUF_SIZE (500 + NUM_TIMER_STATS * 300)
static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0)
- ,int *eof, void *data_unused
-#else
- ,int unused
-#endif
- )
+ ,int *eof, void *data_unused)
{
unsigned long flags;
int i = 0;
@@ -805,9 +785,7 @@
memcpy(buf, bigbuf + offset, len);
*start = buf;
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0)
*eof = 1;
-#endif
return len;
}
@@ -982,12 +960,8 @@
}
#endif
#ifdef CONFIG_PROC_FS
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0)
if ((fasttimer_proc_entry = create_proc_entry( "fasttimer", 0, 0 )))
fasttimer_proc_entry->read_proc = proc_fasttimer_read;
-#else
- proc_register_dynamic(&proc_root, &fasttimer_proc_entry);
-#endif
#endif /* PROC_FS */
if(request_irq(TIMER1_IRQ_NBR, timer1_handler, SA_SHIRQ,
"fast timer int", NULL))
diff -urN linux/arch/frv/Kconfig linux/arch/frv/Kconfig
--- linux/arch/frv/Kconfig 1970/01/01 00:00:00
+++ linux/arch/frv/Kconfig Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,501 @@
+#
+# For a description of the syntax of this configuration file,
+# see Documentation/kbuild/kconfig-language.txt.
+#
+config FRV
+ bool
+ default y
+
+config UID16
+ bool
+ default y
+
+config RWSEM_GENERIC_SPINLOCK
+ bool
+ default y
+
+config RWSEM_XCHGADD_ALGORITHM
+ bool
+
+config GENERIC_FIND_NEXT_BIT
+ bool
+ default y
+
+config GENERIC_CALIBRATE_DELAY
+ bool
+ default n
+
+config GENERIC_HARDIRQS
+ bool
+ default n
+
+mainmenu "Fujitsu FR-V Kernel Configuration"
+
+source "init/Kconfig"
+
+
+menu "Fujitsu FR-V system setup"
+
+config MMU
+ bool "MMU support"
+ help
+ This options switches on and off support for the FR-V MMU
+ (effectively switching between vmlinux and uClinux). Not all FR-V
+ CPUs support this. Currently only the FR451 has a sufficiently
+ featured MMU.
+
+config FRV_OUTOFLINE_ATOMIC_OPS
+ bool "Out-of-line the FRV atomic operations"
+ default n
+ help
+ Setting this option causes the FR-V atomic operations to be mostly
+ implemented out-of-line.
+
+ See Documentation/fujitsu/frv/atomic-ops.txt for more information.
+
+config HIGHMEM
+ bool "High memory support"
+ depends on MMU
+ default y
+ help
+ If you wish to use more than 256MB of memory with your MMU based
+ system, you will need to select this option. The kernel can only see
+ the memory between 0xC0000000 and 0xD0000000 directly... everything
+ else must be kmapped.
+
+ The arch is, however, capable of supporting up to 3GB of SDRAM.
+
+config HIGHPTE
+ bool "Allocate page tables in highmem"
+ depends on HIGHMEM
+ default y
+ help
+ The VM uses one page of memory for each page table. For systems
+ with a lot of RAM, this can be wasteful of precious low memory.
+ Setting this option will put user-space page tables in high memory.
+
+choice
+ prompt "uClinux kernel load address"
+ depends on !MMU
+ default UCPAGE_OFFSET_C0000000
+ help
+ This option sets the base address for the uClinux kernel. The kernel
+ will rearrange the SDRAM layout to start at this address, and move
+ itself to start there. It must be greater than 0, and it must be
+ sufficiently less than 0xE0000000 that the SDRAM does not intersect
+ the I/O region.
+
+ The base address must also be aligned such that the SDRAM controller
+ can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
+
+config UCPAGE_OFFSET_20000000
+ bool "0x20000000"
+
+config UCPAGE_OFFSET_40000000
+ bool "0x40000000"
+
+config UCPAGE_OFFSET_60000000
+ bool "0x60000000"
+
+config UCPAGE_OFFSET_80000000
+ bool "0x80000000"
+
+config UCPAGE_OFFSET_A0000000
+ bool "0xA0000000"
+
+config UCPAGE_OFFSET_C0000000
+ bool "0xC0000000 (Recommended)"
+
+endchoice
+
+config PROTECT_KERNEL
+ bool "Protect core kernel against userspace"
+ depends on !MMU
+ default y
+ help
+ Selecting this option causes the uClinux kernel to change the
+ permittivity of DAMPR register covering the core kernel image to
+ prevent userspace accessing the underlying memory directly.
+
+choice
+ prompt "CPU Caching mode"
+ default FRV_DEFL_CACHE_WBACK
+ help
+ This option determines the default caching mode for the kernel.
+
+ Write-Back caching mode involves the all reads and writes causing
+ the affected cacheline to be read into the cache first before being
+ operated upon. Memory is not then updated by a write until the cache
+ is filled and a cacheline needs to be displaced from the cache to
+ make room. Only at that point is it written back.
+
+ Write-Behind caching is similar to Write-Back caching, except that a
+ write won't fetch a cacheline into the cache if there isn't already
+ one there; it will write directly to memory instead.
+
+ Write-Through caching only fetches cachelines from memory on a
+ read. Writes always get written directly to memory. If the affected
+ cacheline is also in cache, it will be updated too.
+
+ The final option is to turn of caching entirely.
+
+ Note that not all CPUs support Write-Behind caching. If the CPU on
+ which the kernel is running doesn't, it'll fall back to Write-Back
+ caching.
+
+config FRV_DEFL_CACHE_WBACK
+ bool "Write-Back"
+
+config FRV_DEFL_CACHE_WBEHIND
+ bool "Write-Behind"
+
+config FRV_DEFL_CACHE_WTHRU
+ bool "Write-Through"
+
+config FRV_DEFL_CACHE_DISABLED
+ bool "Disabled"
+
+endchoice
+
+menu "CPU core support"
+
+config CPU_FR401
+ bool "Include FR401 core support"
+ depends on !MMU
+ default y
+ help
+ This enables support for the FR401, FR401A and FR403 CPUs
+
+config CPU_FR405
+ bool "Include FR405 core support"
+ depends on !MMU
+ default y
+ help
+ This enables support for the FR405 CPU
+
+config CPU_FR451
+ bool "Include FR451 core support"
+ default y
+ help
+ This enables support for the FR451 CPU
+
+config CPU_FR451_COMPILE
+ bool "Specifically compile for FR451 core"
+ depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
+ default y
+ help
+ This causes appropriate flags to be passed to the compiler to
+ optimise for the FR451 CPU
+
+config CPU_FR551
+ bool "Include FR551 core support"
+ depends on !MMU
+ default y
+ help
+ This enables support for the FR555 CPU
+
+config CPU_FR551_COMPILE
+ bool "Specifically compile for FR551 core"
+ depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
+ default y
+ help
+ This causes appropriate flags to be passed to the compiler to
+ optimise for the FR555 CPU
+
+config FRV_L1_CACHE_SHIFT
+ int
+ default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
+ default "6" if CPU_FR551
+
+endmenu
+
+choice
+ prompt "System support"
+ default MB93091_VDK
+
+config MB93091_VDK
+ bool "MB93091 CPU board with or without motherboard"
+
+config MB93093_PDK
+ bool "MB93093 PDK unit"
+
+endchoice
+
+if MB93091_VDK
+choice
+ prompt "Motherboard support"
+ default MB93090_MB00
+
+config MB93090_MB00
+ bool "Use the MB93090-MB00 motherboard"
+ help
+ Select this option if the MB93091 CPU board is going to be used with
+ a MB93090-MB00 VDK motherboard
+
+config MB93091_NO_MB
+ bool "Use standalone"
+ help
+ Select this option if the MB93091 CPU board is going to be used
+ without a motherboard
+
+endchoice
+endif
+
+choice
+ prompt "GP-Relative data support"
+ default GPREL_DATA_8
+ help
+ This option controls what data, if any, should be placed in the GP
+ relative data sections. Using this means that the compiler can
+ generate accesses to the data using GR16-relative addressing which
+ is faster than absolute instructions and saves space (2 instructions
+ per access).
+
+ However, the GPREL region is limited in size because the immediate
+ value used in the load and store instructions is limited to a 12-bit
+ signed number.
+
+ So if the linker starts complaining that accesses to GPREL data are
+ out of range, try changing this option from the default.
+
+ Note that modules will always be compiled with this feature disabled
+ as the module data will not be in range of the GP base address.
+
+config GPREL_DATA_8
+ bool "Put data objects of up to 8 bytes into GP-REL"
+
+config GPREL_DATA_4
+ bool "Put data objects of up to 4 bytes into GP-REL"
+
+config GPREL_DATA_NONE
+ bool "Don't use GP-REL"
+
+endchoice
+
+config PCI
+ bool "Use PCI"
+ depends on MB93090_MB00
+ default y
+ help
+ Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
+ onboard. If you have one of these boards and you wish to use the PCI
+ facilities, say Y here.
+
+ The PCI-HOWTO, available from
+ <http://www.tldp.org/docs.html#howto>, contains valuable
+ information about which PCI hardware does work under Linux and which
+ doesn't.
+
+config RESERVE_DMA_COHERENT
+ bool "Reserve DMA coherent memory"
+ depends on PCI && !MMU
+ default y
+ help
+ Many PCI drivers require access to uncached memory for DMA device
+ communications (such as is done with some Ethernet buffer rings). If
+ a fully featured MMU is available, this can be done through page
+ table settings, but if not, a region has to be set aside and marked
+ with a special DAMPR register.
+
+ Setting this option causes uClinux to set aside a portion of the
+ available memory for use in this manner. The memory will then be
+ unavailable for normal kernel use.
+
+source "drivers/pci/Kconfig"
+
+config PCMCIA
+ tristate "Use PCMCIA"
+ help
+ Say Y here if you want to attach PCMCIA- or PC-cards to your FR-V
+ board. These are credit-card size devices such as network cards,
+ modems or hard drives often used with laptops computers. There are
+ actually two varieties of these cards: the older 16 bit PCMCIA cards
+ and the newer 32 bit CardBus cards. If you want to use CardBus
+ cards, you need to say Y here and also to "CardBus support" below.
+
+ To use your PC-cards, you will need supporting software from David
+ Hinds pcmcia-cs package (see the file <file:Documentation/Changes>
+ for location). Please also read the PCMCIA-HOWTO, available from
+ <http://www.tldp.org/docs.html#howto>.
+
+ To compile this driver as modules, choose M here: the
+ modules will be called pcmcia_core and ds.
+
+#config MATH_EMULATION
+# bool "Math emulation support (EXPERIMENTAL)"
+# depends on EXPERIMENTAL
+# help
+# At some point in the future, this will cause floating-point math
+# instructions to be emulated by the kernel on machines that lack a
+# floating-point math coprocessor. Thrill-seekers and chronically
+# sleep-deprived psychotic hacker types can say Y now, everyone else
+# should probably wait a while.
+
+menu "Power management options"
+source kernel/power/Kconfig
+endmenu
+
+endmenu
+
+
+menu "Executable formats"
+
+source "fs/Kconfig.binfmt"
+
+endmenu
+
+source "drivers/Kconfig"
+
+source "fs/Kconfig"
+
+menu "Kernel hacking"
+
+config DEBUG_KERNEL
+ bool "Kernel debugging"
+ help
+ Say Y here if you are developing drivers or trying to debug and
+ identify kernel problems.
+
+config EARLY_PRINTK
+ bool "Early printk"
+ depends on EMBEDDED && DEBUG_KERNEL
+ default n
+ help
+ Write kernel log output directly into the VGA buffer or to a serial
+ port.
+
+ This is useful for kernel debugging when your machine crashes very
+ early before the console code is initialized. For normal operation
+ it is not recommended because it looks ugly and doesn't cooperate
+ with klogd/syslogd or the X server. You should normally N here,
+ unless you want to debug such a crash.
+
+config DEBUG_STACKOVERFLOW
+ bool "Check for stack overflows"
+ depends on DEBUG_KERNEL
+
+config DEBUG_SLAB
+ bool "Debug memory allocations"
+ depends on DEBUG_KERNEL
+ help
+ Say Y here to have the kernel do limited verification on memory
+ allocation as well as poisoning memory on free to catch use of freed
+ memory.
+
+config MAGIC_SYSRQ
+ bool "Magic SysRq key"
+ depends on DEBUG_KERNEL
+ help
+ If you say Y here, you will have some control over the system even
+ if the system crashes for example during kernel debugging (e.g., you
+ will be able to flush the buffer cache to disk, reboot the system
+ immediately or dump some status information). This is accomplished
+ by pressing various keys while holding SysRq (Alt+PrintScreen). It
+ also works on a serial console (on PC hardware at least), if you
+ send a BREAK and then within 5 seconds a command keypress. The
+ keys are documented in <file:Documentation/sysrq.txt>. Don't say Y
+ unless you really know what this hack does.
[%d lines skipped]
104diff -urN linux/arch/frv/Makefile linux/arch/frv/Makefile
--- linux/arch/frv/Makefile 1970/01/01 00:00:00
+++ linux/arch/frv/Makefile Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,118 @@
+#
+# frv/Makefile
+#
+# This file is included by the global makefile so that you can add your own
+# architecture-specific flags and dependencies. Remember to do have actions
+# for "archclean" and "archdep" for cleaning up and making dependencies for
+# this architecture
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# License. See the file "COPYING" in the main directory of this archive
+# for more details.
+#
+# Copyright (c) 2003, 2004 Red Hat Inc.
+# - Written by David Howells <dhowells@redhat.com>
+# - Derived from arch/m68knommu/Makefile,
+# Copyright (c) 1999,2001 D. Jeff Dionne <jeff@lineo.ca>,
+# Rt-Control Inc. / Lineo, Inc.
+#
+# Copyright (C) 1998,1999 D. Jeff Dionne <jeff@uclinux.org>,
+# Kenneth Albanowski <kjahds@kjahds.com>,
+#
+# Based on arch/m68k/Makefile:
+# Copyright (C) 1994 by Hamish Macdonald
+#
+
+CCSPECS := $(shell $(CC) -v 2>&1 | grep "^Reading specs from " | head
-1 | cut -c20-)
+CCDIR := $(strip $(patsubst %/specs,%,$(CCSPECS)))
+CPUCLASS := fr400
+
+# test for cross compiling
+COMPILE_ARCH = $(shell uname -m)
+
+ifdef CONFIG_MMU
+UTS_SYSNAME = -DUTS_SYSNAME=\"Linux\"
+else
+UTS_SYSNAME = -DUTS_SYSNAME=\"uClinux\"
+endif
+
+ARCHMODFLAGS += -G0 -mlong-calls
+
+ifdef CONFIG_GPREL_DATA_8
+CFLAGS += -G8
+else
+ifdef CONFIG_GPREL_DATA_4
+CFLAGS += -G4
+else
+ifdef CONFIG_GPREL_DATA_NONE
+CFLAGS += -G0
+endif
+endif
+endif
+
+#LDFLAGS_vmlinux := -Map linkmap.txt
+
+ifdef CONFIG_GC_SECTIONS
+CFLAGS += -ffunction-sections -fdata-sections
+LINKFLAGS += --gc-sections
+endif
+
+ifndef CONFIG_FRAME_POINTER
+CFLAGS += -mno-linked-fp
+endif
+
+ifdef CONFIG_CPU_FR451_COMPILE
+CFLAGS += -mcpu=fr450
+AFLAGS += -mcpu=fr450
+ASFLAGS += -mcpu=fr450
+else
+ifdef CONFIG_CPU_FR551_COMPILE
+CFLAGS += -mcpu=fr550
+AFLAGS += -mcpu=fr550
+ASFLAGS += -mcpu=fr550
+else
+CFLAGS += -mcpu=fr400
+AFLAGS += -mcpu=fr400
+ASFLAGS += -mcpu=fr400
+endif
+endif
+
+# pretend the kernel is going to run on an FR400 with no media-fp unit
+# - reserve CC3 for use with atomic ops
+# - all the extra registers are dealt with only at context switch time
+CFLAGS += -mno-fdpic -mgpr-32 -msoft-float -mno-media
+CFLAGS += -ffixed-fcc3 -ffixed-cc3 -ffixed-gr15
+AFLAGS += -mno-fdpic
+ASFLAGS += -mno-fdpic
+
+# make sure the .S files get compiled with debug info
+# and disable optimisations that are unhelpful whilst debugging
+ifdef CONFIG_DEBUG_INFO
+CFLAGS += -O1
+AFLAGS += -Wa,--gdwarf2
+ASFLAGS += -Wa,--gdwarf2
+endif
+
+head-y := arch/frv/kernel/head.o arch/frv/kernel/init_task.o
+
+core-y += arch/frv/kernel/ arch/frv/mm/
+libs-y += arch/frv/lib/
+
+core-$(CONFIG_MB93090_MB00) += arch/frv/mb93090-mb00/
+
+all: Image
+
+Image: vmlinux
+ $(Q)$(MAKE) $(build)=arch/frv/boot $@
+
+bootstrap:
+ $(Q)$(MAKEBOOT) bootstrap
+
+archmrproper:
+ $(Q)$(MAKE) -C arch/frv/boot mrproper
+
+archclean:
+ $(Q)$(MAKE) -C arch/frv/boot clean
+
+archdep: scripts/mkdep symlinks
+ $(Q)$(MAKE) -C arch/frv/boot dep
diff -urN linux/arch/frv/boot/Makefile linux/arch/frv/boot/Makefile
--- linux/arch/frv/boot/Makefile 1970/01/01 00:00:00
+++ linux/arch/frv/boot/Makefile Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,73 @@
+#
+# arch/arm/boot/Makefile
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# License. See the file "COPYING" in the main directory of this archive
+# for more details.
+#
+# Copyright (C) 1995-2000 Russell King
+#
+
+SYSTEM =$(TOPDIR)/$(LINUX)
+
+ZTEXTADDR = 0x02080000
+PARAMS_PHYS = 0x0207c000
+INITRD_PHYS = 0x02180000
+INITRD_VIRT = 0x02180000
+
+#
+# If you don't define ZRELADDR above,
+# then it defaults to ZTEXTADDR
+#
+ifeq ($(ZRELADDR),)
+ZRELADDR = $(ZTEXTADDR)
+endif
+
+export SYSTEM ZTEXTADDR ZBSSADDR ZRELADDR INITRD_PHYS INITRD_VIRT PARAMS_PHYS
+
+Image: $(obj)/Image
+
+targets: $(obj)/Image
+
+$(obj)/Image: vmlinux FORCE
+ $(OBJCOPY) -O binary -R .note -R .comment -S vmlinux $@
+
+#$(obj)/Image: $(CONFIGURE) $(SYSTEM)
+# $(OBJCOPY) -O binary -R .note -R .comment -g -S $(SYSTEM) $@
+
+bzImage: zImage
+
+zImage: $(CONFIGURE) compressed/$(LINUX)
+ $(OBJCOPY) -O binary -R .note -R .comment -S compressed/$(LINUX) $@
+
+bootpImage: bootp/bootp
+ $(OBJCOPY) -O binary -R .note -R .comment -S bootp/bootp $@
+
+compressed/$(LINUX): $(TOPDIR)/$(LINUX) dep
+ @$(MAKE) -C compressed $(LINUX)
+
+bootp/bootp: zImage initrd
+ @$(MAKE) -C bootp bootp
+
+initrd:
+ @test "$(INITRD_VIRT)" != "" || (echo This architecture does not
support INITRD; exit -1)
+ @test "$(INITRD)" != "" || (echo You must specify INITRD; exit -1)
+
+#
+# installation
+#
+install: $(CONFIGURE) Image
+ sh ./install.sh $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
Image $(TOPDIR)/System.map "$(INSTALL_PATH)"
+
+zinstall: $(CONFIGURE) zImage
+ sh ./install.sh $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
zImage $(TOPDIR)/System.map "$(INSTALL_PATH)"
+
+#
+# miscellany
+#
+mrproper clean:
+ $(RM) Image zImage bootpImage
+# @$(MAKE) -C compressed clean
+# @$(MAKE) -C bootp clean
+
+dep:
diff -urN linux/arch/frv/kernel/Makefile linux/arch/frv/kernel/Makefile
--- linux/arch/frv/kernel/Makefile 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/Makefile Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,22 @@
+#
+# Makefile for the linux kernel.
+#
+
+heads-y := head-uc-fr401.o head-uc-fr451.o
head-uc-fr555.o
+heads-$(CONFIG_MMU) := head-mmu-fr451.o
+
+extra-y:= head.o init_task.o vmlinux.lds
+
+obj-y := $(heads-y) entry.o entry-table.o break.o switch_to.o kernel_thread.o \
+ process.o traps.o ptrace.o signal.o dma.o \
+ sys_frv.o time.o semaphore.o setup.o frv_ksyms.o \
+ debug-stub.o irq.o irq-routing.o sleep.o uaccess.o
+
+obj-$(CONFIG_GDBSTUB) += gdb-stub.o gdb-io.o
+
+obj-$(CONFIG_MB93091_VDK) += irq-mb93091.o
+obj-$(CONFIG_MB93093_PDK) += irq-mb93093.o
+obj-$(CONFIG_FUJITSU_MB93493) += irq-mb93493.o
+obj-$(CONFIG_PM) += pm.o cmode.o
+obj-$(CONFIG_MB93093_PDK) += pm-mb93093.o
+obj-$(CONFIG_SYSCTL) += sysctl.o
diff -urN linux/arch/frv/kernel/break.S linux/arch/frv/kernel/break.S
--- linux/arch/frv/kernel/break.S 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/break.S Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,720 @@
+/* break.S: Break interrupt handling (kept separate from entry.S)
+ *
+ * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/sys.h>
+#include <linux/config.h>
+#include <linux/linkage.h>
+#include <asm/setup.h>
+#include <asm/segment.h>
+#include <asm/ptrace.h>
+#include <asm/spr-regs.h>
+
+#include <asm/errno.h>
+
+#
+# the break handler has its own stack
+#
+ .section .bss.stack
+ .globl __break_user_context
+ .balign 8192
+__break_stack:
+ .space (8192 - (USER_CONTEXT_SIZE + REG__DEBUG_XTRA)) & ~7
+__break_stack_tos:
+ .space REG__DEBUG_XTRA
+__break_user_context:
+ .space USER_CONTEXT_SIZE
+
+#
+# miscellaneous variables
+#
+ .section .bss
+#ifdef CONFIG_MMU
+ .globl __break_tlb_miss_real_return_info
+__break_tlb_miss_real_return_info:
+ .balign 8
+ .space 2*4 /* saved PCSR, PSR for TLB-miss
handler fixup */
+#endif
+
+__break_trace_through_exceptions:
+ .space 4
+
+#define CS2_ECS1 0xe1200000
+#define CS2_USERLED 0x4
+
+.macro LEDS val,reg
+# sethi.p %hi(CS2_ECS1+CS2_USERLED),gr30
+# setlo %lo(CS2_ECS1+CS2_USERLED),gr30
+# setlos #~\val,\reg
+# st \reg,@(gr30,gr0)
+# setlos #0x5555,\reg
+# sethi.p %hi(0xffc00100),gr30
+# setlo %lo(0xffc00100),gr30
+# sth \reg,@(gr30,gr0)
+# membar
+.endm
+
+###############################################################################
+#
+# entry point for Break Exceptions/Interrupts
+#
+###############################################################################
+ .text
+ .balign 4
+ .globl __entry_break
+__entry_break:
+#ifdef CONFIG_MMU
+ movgs gr31,scr3
+#endif
+ LEDS 0x1001,gr31
+
+ sethi.p %hi(__break_user_context),gr31
+ setlo %lo(__break_user_context),gr31
+
+ stdi gr2,@(gr31,#REG_GR(2))
+ movsg ccr,gr3
+ sti gr3,@(gr31,#REG_CCR)
+
+ # catch the return from a TLB-miss handler that had single-step disabled
+ # traps will be enabled, so we have to do this now
+#ifdef CONFIG_MMU
+ movsg bpcsr,gr3
+ sethi.p %hi(__break_tlb_miss_return_breaks_here),gr2
+ setlo %lo(__break_tlb_miss_return_breaks_here),gr2
+ subcc gr2,gr3,gr0,icc0
+ beq icc0,#2,__break_return_singlestep_tlbmiss
+#endif
+
+ # determine whether we have stepped through into an exception
+ # - we need to take special action to suspend h/w single stepping if
we've done
+ # that, so that the gdbstub doesn't get bogged down endlessly
stepping through
+ # external interrupt handling
+ movsg bpsr,gr3
+ andicc gr3,#BPSR_BET,gr0,icc0
+ bne icc0,#2,__break_maybe_userspace /* jump if PSR.ET was 1
*/
+
+ LEDS 0x1003,gr2
+
+ movsg brr,gr3
+ andicc gr3,#BRR_ST,gr0,icc0
+ andicc.p gr3,#BRR_SB,gr0,icc1
+ bne icc0,#2,__break_step /* jump if single-step
caused break */
+ beq icc1,#2,__break_continue /* jump if BREAK didn't
cause break */
+
+ LEDS 0x1007,gr2
+
+ # handle special breaks
+ movsg bpcsr,gr3
+
+ sethi.p %hi(__entry_return_singlestep_breaks_here),gr2
+ setlo %lo(__entry_return_singlestep_breaks_here),gr2
+ subcc gr2,gr3,gr0,icc0
+ beq icc0,#2,__break_return_singlestep
+
+ bra __break_continue
+
+
+###############################################################################
+#
+# handle BREAK instruction in kernel-mode exception epilogue
+#
+###############################################################################
+__break_return_singlestep:
+ LEDS 0x100f,gr2
+
+ # special break insn requests single-stepping to be turned back on
+ # HERE RETT
+ # PSR.ET 0 0
+ # PSR.PS old PSR.S ?
+ # PSR.S 1 1
+ # BPSR.ET 0 1 (can't have caused orig excep
otherwise)
+ # BPSR.BS 1 old PSR.S
+ movsg dcr,gr2
+ sethi.p %hi(DCR_SE),gr3
+ setlo %lo(DCR_SE),gr3
+ or gr2,gr3,gr2
+ movgs gr2,dcr
+
+ movsg psr,gr2
+ andi gr2,#PSR_PS,gr2
+ slli gr2,#11,gr2 /* PSR.PS -> BPSR.BS */
+ ori gr2,#BPSR_BET,gr2 /* 1 -> BPSR.BET */
+ movgs gr2,bpsr
+
+ # return to the invoker of the original kernel exception
+ movsg pcsr,gr2
+ movgs gr2,bpcsr
+
+ LEDS 0x101f,gr2
+
+ ldi @(gr31,#REG_CCR),gr3
+ movgs gr3,ccr
+ lddi.p @(gr31,#REG_GR(2)),gr2
+ xor gr31,gr31,gr31
+ movgs gr0,brr
+#ifdef CONFIG_MMU
+ movsg scr3,gr31
+#endif
+ rett #1
+
+###############################################################################
+#
+# handle BREAK instruction in TLB-miss handler return path
+#
+###############################################################################
+#ifdef CONFIG_MMU
+__break_return_singlestep_tlbmiss:
+ LEDS 0x1100,gr2
+
+ sethi.p %hi(__break_tlb_miss_real_return_info),gr3
+ setlo %lo(__break_tlb_miss_real_return_info),gr3
+ lddi @(gr3,#0),gr2
+ movgs gr2,pcsr
+ movgs gr3,psr
+
+ bra __break_return_singlestep
+#endif
+
+
+###############################################################################
+#
+# handle single stepping into an exception prologue from kernel mode
+# - we try and catch it whilst it is still in the main vector table
+# - if we catch it there, we have to jump to the fixup handler
+# - there is a fixup table that has a pointer for every 16b slot in the trap
+# table
+#
+###############################################################################
+__break_step:
+ LEDS 0x2003,gr2
+
+ # external interrupts seem to escape from the trap table before single
+ # step catches up with them
+ movsg bpcsr,gr2
+ sethi.p %hi(__entry_kernel_external_interrupt),gr3
+ setlo %lo(__entry_kernel_external_interrupt),gr3
+ subcc gr2,gr3,gr0,icc0
+ beq icc0,#2,__break_step_kernel_external_interrupt
+ sethi.p %hi(__entry_uspace_external_interrupt),gr3
+ setlo %lo(__entry_uspace_external_interrupt),gr3
+ subcc gr2,gr3,gr0,icc0
+ beq icc0,#2,__break_step_uspace_external_interrupt
+
+ LEDS 0x2007,gr2
+
+ # the two main vector tables are adjacent on one 8Kb slab
+ movsg bpcsr,gr2
+ setlos #0xffffe000,gr3
+ and gr2,gr3,gr2
+ sethi.p %hi(__trap_tables),gr3
+ setlo %lo(__trap_tables),gr3
+ subcc gr2,gr3,gr0,icc0
+ bne icc0,#2,__break_continue
+
+ LEDS 0x200f,gr2
+
+ # skip workaround if so requested by GDB
+ sethi.p %hi(__break_trace_through_exceptions),gr3
+ setlo %lo(__break_trace_through_exceptions),gr3
+ ld @(gr3,gr0),gr3
+ subcc gr3,gr0,gr0,icc0
+ bne icc0,#0,__break_continue
+
+ LEDS 0x201f,gr2
+
+ # access the fixup table - there's a 1:1 mapping between the slots in
the trap tables and
+ # the slots in the trap fixup tables allowing us to simply divide the
offset into the
+ # former by 4 to access the latter
+ sethi.p %hi(__trap_tables),gr3
+ setlo %lo(__trap_tables),gr3
+ movsg bpcsr,gr2
+ sub gr2,gr3,gr2
+ srli.p gr2,#2,gr2
+
+ sethi %hi(__trap_fixup_tables),gr3
+ setlo.p %lo(__trap_fixup_tables),gr3
+ andi gr2,#~3,gr2
+ ld @(gr2,gr3),gr2
+ jmpil @(gr2,#0)
+
+# step through an internal exception from kernel mode
+ .globl __break_step_kernel_softprog_interrupt
+__break_step_kernel_softprog_interrupt:
+ sethi.p %hi(__entry_kernel_softprog_interrupt_reentry),gr3
+ setlo %lo(__entry_kernel_softprog_interrupt_reentry),gr3
+ bra __break_return_as_kernel_prologue
+
+# step through an external interrupt from kernel mode
+ .globl __break_step_kernel_external_interrupt
+__break_step_kernel_external_interrupt:
+ sethi.p %hi(__entry_kernel_external_interrupt_reentry),gr3
+ setlo %lo(__entry_kernel_external_interrupt_reentry),gr3
+
+__break_return_as_kernel_prologue:
+ LEDS 0x203f,gr2
+
+ movgs gr3,bpcsr
+
+ # do the bit we had to skip
+#ifdef CONFIG_MMU
+ movsg ear0,gr2 /* EAR0 can get clobbered by
gdb-stub (ICI/ICEI) */
+ movgs gr2,scr2
+#endif
+
+ or.p sp,gr0,gr2 /* set up the stack pointer */
+ subi sp,#REG__END,sp
+ sti.p gr2,@(sp,#REG_SP)
+
+ setlos #REG__STATUS_STEP,gr2
+ sti gr2,@(sp,#REG__STATUS) /* record single step
status */
+
+ # cancel single-stepping mode
+ movsg dcr,gr2
+ sethi.p %hi(~DCR_SE),gr3
+ setlo %lo(~DCR_SE),gr3
+ and gr2,gr3,gr2
+ movgs gr2,dcr
+
+ LEDS 0x207f,gr2
+
+ ldi @(gr31,#REG_CCR),gr3
+ movgs gr3,ccr
+ lddi.p @(gr31,#REG_GR(2)),gr2
+ xor gr31,gr31,gr31
+ movgs gr0,brr
+#ifdef CONFIG_MMU
+ movsg scr3,gr31
+#endif
+ rett #1
+
+# step through an internal exception from uspace mode
+ .globl __break_step_uspace_softprog_interrupt
+__break_step_uspace_softprog_interrupt:
+ sethi.p %hi(__entry_uspace_softprog_interrupt_reentry),gr3
+ setlo %lo(__entry_uspace_softprog_interrupt_reentry),gr3
+ bra __break_return_as_uspace_prologue
+
+# step through an external interrupt from kernel mode
+ .globl __break_step_uspace_external_interrupt
+__break_step_uspace_external_interrupt:
+ sethi.p %hi(__entry_uspace_external_interrupt_reentry),gr3
+ setlo %lo(__entry_uspace_external_interrupt_reentry),gr3
+
+__break_return_as_uspace_prologue:
+ LEDS 0x20ff,gr2
+
+ movgs gr3,bpcsr
+
+ # do the bit we had to skip
+ sethi.p %hi(__kernel_frame0_ptr),gr28
+ setlo %lo(__kernel_frame0_ptr),gr28
+ ldi.p @(gr28,#0),gr28
+
+ setlos #REG__STATUS_STEP,gr2
+ sti gr2,@(gr28,#REG__STATUS) /* record single step
status */
+
+ # cancel single-stepping mode
+ movsg dcr,gr2
+ sethi.p %hi(~DCR_SE),gr3
+ setlo %lo(~DCR_SE),gr3
+ and gr2,gr3,gr2
+ movgs gr2,dcr
+
+ LEDS 0x20fe,gr2
+
+ ldi @(gr31,#REG_CCR),gr3
+ movgs gr3,ccr
+ lddi.p @(gr31,#REG_GR(2)),gr2
+ xor gr31,gr31,gr31
+ movgs gr0,brr
+#ifdef CONFIG_MMU
+ movsg scr3,gr31
+#endif
+ rett #1
+
+#ifdef CONFIG_MMU
+# step through an ITLB-miss handler from user mode
+ .globl __break_user_insn_tlb_miss
+__break_user_insn_tlb_miss:
+ # we'll want to try the trap stub again
+ sethi.p %hi(__trap_user_insn_tlb_miss),gr2
+ setlo %lo(__trap_user_insn_tlb_miss),gr2
+ movgs gr2,bpcsr
+
+__break_tlb_miss_common:
+ LEDS 0x2101,gr2
+
+ # cancel single-stepping mode
+ movsg dcr,gr2
+ sethi.p %hi(~DCR_SE),gr3
+ setlo %lo(~DCR_SE),gr3
+ and gr2,gr3,gr2
+ movgs gr2,dcr
+
+ # we'll swap the real return address for one with a BREAK insn so that
we can re-enable
+ # single stepping on return
+ movsg pcsr,gr2
+ sethi.p %hi(__break_tlb_miss_real_return_info),gr3
+ setlo %lo(__break_tlb_miss_real_return_info),gr3
+ sti gr2,@(gr3,#0)
+
+ sethi.p %hi(__break_tlb_miss_return_break),gr2
+ setlo %lo(__break_tlb_miss_return_break),gr2
+ movgs gr2,pcsr
+
+ # we also have to fudge PSR because the return BREAK is in kernel space
and we want
+ # to get a BREAK fault not an access violation should the return be to
userspace
+ movsg psr,gr2
+ sti.p gr2,@(gr3,#4)
+ ori gr2,#PSR_PS,gr2
+ movgs gr2,psr
+
+ LEDS 0x2102,gr2
+
+ ldi @(gr31,#REG_CCR),gr3
+ movgs gr3,ccr
+ lddi @(gr31,#REG_GR(2)),gr2
+ movsg scr3,gr31
+ movgs gr0,brr
+ rett #1
+
+# step through a DTLB-miss handler from user mode
+ .globl __break_user_data_tlb_miss
+__break_user_data_tlb_miss:
+ # we'll want to try the trap stub again
+ sethi.p %hi(__trap_user_data_tlb_miss),gr2
+ setlo %lo(__trap_user_data_tlb_miss),gr2
+ movgs gr2,bpcsr
+ bra __break_tlb_miss_common
+
+# step through an ITLB-miss handler from kernel mode
[%d lines skipped]
323diff -urN linux/arch/frv/kernel/cmode.S linux/arch/frv/kernel/cmode.S
--- linux/arch/frv/kernel/cmode.S 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/cmode.S Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,190 @@
+/* cmode.S: clock mode management
+ *
+ * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
+ * Written by David Woodhouse (dwmw2@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/sys.h>
+#include <linux/config.h>
+#include <linux/linkage.h>
+#include <asm/setup.h>
+#include <asm/segment.h>
+#include <asm/ptrace.h>
+#include <asm/errno.h>
+#include <asm/cache.h>
+#include <asm/spr-regs.h>
+
+#define __addr_MASK 0xfeff9820 /* interrupt controller mask */
+
+#define __addr_SDRAMC 0xfe000400 /* SDRAM controller regs */
+#define SDRAMC_DSTS 0x28 /* SDRAM status */
+#define SDRAMC_DSTS_SSI 0x00000001 /* indicates that the SDRAM is
in self-refresh mode */
+#define SDRAMC_DRCN 0x30 /* SDRAM refresh control */
+#define SDRAMC_DRCN_SR 0x00000001 /* transition SDRAM into self-refresh
mode */
+#define __addr_CLKC 0xfeff9a00
+#define CLKC_SWCMODE 0x00000008
+#define __addr_LEDS 0xe1200004
+
+.macro li v r
+ sethi.p %hi(\v),\r
+ setlo %lo(\v),\r
+.endm
+
+ .text
+ .balign 4
+
+
+###############################################################################
+#
+# Change CMODE
+# - void frv_change_cmode(int cmode)
+#
+###############################################################################
+ .globl frv_change_cmode
+ .type frv_change_cmode,@function
+
+.macro LEDS v
+#ifdef DEBUG_CMODE
+ setlos #~\v,gr10
+ sti gr10,@(gr11,#0)
+ membar
+#endif
+.endm
+
+frv_change_cmode:
+ movsg lr,gr9
+#ifdef DEBUG_CMODE
+ li __addr_LEDS,gr11
+#endif
+ dcef @(gr0,gr0),#1
+
+ # Shift argument left by 24 bits to fit in SWCMODE register later.
+ slli gr8,#24,gr8
+
+ # (1) Set '0' in the PSR.ET bit, and prohibit interrupts.
+ movsg psr,gr14
+ andi gr14,#~PSR_ET,gr3
+ movgs gr3,psr
+
+#if 0 // Fujitsu recommend to skip this and will update docs.
+ # (2) Set '0' to all bits of the MASK register of the interrupt
+ # controller, and mask interrupts.
+ li __addr_MASK,gr12
+ ldi @(gr12,#0),gr13
+ li 0xffff0000,gr4
+ sti gr4,@(gr12,#0)
+#endif
+
+ # (3) Stop the transfer function of DMAC. Stop all the bus masters
+ # to access SDRAM and the internal resources.
+
+ # (already done by caller)
+
+ # (4) Preload a series of following instructions to the instruction
+ # cache.
+ li #__cmode_icache_lock_start,gr3
+ li #__cmode_icache_lock_end,gr4
+
+1: icpl gr3,gr0,#1
+ addi gr3,#L1_CACHE_BYTES,gr3
+ cmp gr4,gr3,icc0
+ bhi icc0,#0,1b
+
+ # Set up addresses in regs for later steps.
+ setlos SDRAMC_DRCN_SR,gr3
+ li __addr_SDRAMC,gr4
+ li __addr_CLKC,gr5
+ ldi @(gr5,#0),gr6
+ li #0x80000000,gr7
+ or gr6,gr7,gr6
+
+ bra __cmode_icache_lock_start
+
+ .balign L1_CACHE_BYTES
+__cmode_icache_lock_start:
+
+ # (5) Flush the content of all caches by the DCEF instruction.
+ dcef @(gr0,gr0),#1
+
+ # (6) Execute loading the dummy for SDRAM.
+ ldi @(gr9,#0),gr0
+
+ # (7) Set '1' to the DRCN.SR bit, and change SDRAM to the
+ # self-refresh mode. Execute the dummy load to all memory
+ # devices set to cacheable on the external bus side in parallel
+ # with this.
+ sti gr3,@(gr4,#SDRAMC_DRCN)
+
+ # (8) Execute memory barrier instruction (MEMBAR).
+ membar
+
+ # (9) Read the DSTS register repeatedly until '1' stands in the
+ # DSTS.SSI field.
+1: ldi @(gr4,#SDRAMC_DSTS),gr3
+ andicc gr3,#SDRAMC_DSTS_SSI,gr3,icc0
+ beq icc0,#0,1b
+
+ # (10) Execute memory barrier instruction (MEMBAR).
+ membar
+
+#if 1
+ # (11) Set the value of CMODE that you want to change to
+ # SWCMODE.SWCM[3:0].
+ sti gr8,@(gr5,#CLKC_SWCMODE)
+
+ # (12) Set '1' to the CLKC.SWEN bit. In that case, do not change
+ # fields other than SWEN of the CLKC register.
+ sti gr6,@(gr5,#0)
+#endif
+ # (13) Execute the instruction just after the memory barrier
+ # instruction that executes the self-loop 256 times. (Meanwhile,
+ # the CMODE switch is done.)
+ membar
+ setlos #256,gr7
+2: subicc gr7,#1,gr7,icc0
+ bne icc0,#2,2b
+
+ LEDS 0x36
+
+ # (14) Release the self-refresh of SDRAM.
+ sti gr0,@(gr4,#SDRAMC_DRCN)
+
+ # Wait for it...
+3: ldi @(gr4,#SDRAMC_DSTS),gr3
+ andicc gr3,#SDRAMC_DSTS_SSI,gr3,icc0
+ bne icc0,#2,3b
+
+#if 0
+ li 0x0100000,gr10
+4: subicc gr10,#1,gr10,icc0
+
+ bne icc0,#0,4b
+#endif
+
+__cmode_icache_lock_end:
+
+ li #__cmode_icache_lock_start,gr3
+ li #__cmode_icache_lock_end,gr4
+
+4: icul gr3
+ addi gr3,#L1_CACHE_BYTES,gr3
+ cmp gr4,gr3,icc0
+ bhi icc0,#0,4b
+
+#if 0 // Fujitsu recommend to skip this and will update docs.
+ # (15) Release the interrupt mask setting of the MASK register of
+ # the interrupt controller if necessary.
+ sti gr13,@(gr12,#0)
+#endif
+ # (16) Set 1' in the PSR.ET bit, and permit interrupt.
+ movgs gr14,psr
+
+ bralr
+
+ .size frv_change_cmode, .-frv_change_cmode
diff -urN linux/arch/frv/kernel/debug-stub.c linux/arch/frv/kernel/debug-stub.c
--- linux/arch/frv/kernel/debug-stub.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/debug-stub.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,259 @@
+/* debug-stub.c: debug-mode stub
+ *
+ * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/serial_reg.h>
+
+#include <asm/system.h>
+#include <asm/serial-regs.h>
+#include <asm/timer-regs.h>
+#include <asm/irc-regs.h>
+#include <asm/gdb-stub.h>
+#include "gdb-io.h"
+
+/* CPU board CON5 */
+#define __UART0(X) (*(volatile uint8_t *)(UART0_BASE + (UART_##X)))
+
+#define LSR_WAIT_FOR0(STATE) \
+do { \
+} while (!(__UART0(LSR) & UART_LSR_##STATE))
+
+#define FLOWCTL_QUERY0(LINE) ({ __UART0(MSR) & UART_MSR_##LINE; })
+#define FLOWCTL_CLEAR0(LINE) do { __UART0(MCR) &= ~UART_MCR_##LINE; } while
(0)
+#define FLOWCTL_SET0(LINE) do { __UART0(MCR) |= UART_MCR_##LINE; } while
(0)
+
+#define FLOWCTL_WAIT_FOR0(LINE) \
+do { \
+ gdbstub_do_rx(); \
+} while(!FLOWCTL_QUERY(LINE))
+
+static void __init debug_stub_init(void);
+
+extern asmlinkage void __break_hijack_kernel_event(void);
+extern asmlinkage void __break_hijack_kernel_event_breaks_here(void);
+
+/*****************************************************************************/
+/*
+ * debug mode handler stub
+ * - we come here with the CPU in debug mode and with exceptions disabled
+ * - handle debugging services for userspace
+ */
+asmlinkage void debug_stub(void)
+{
+ unsigned long hsr0;
+ int type = 0;
+
+ static u8 inited = 0;
+ if (!inited) {
+ debug_stub_init();
+ type = -1;
+ inited = 1;
+ }
+
+ hsr0 = __get_HSR(0);
+ if (hsr0 & HSR0_ETMD)
+ __set_HSR(0, hsr0 & ~HSR0_ETMD);
+
+ /* disable single stepping */
+ __debug_regs->dcr &= ~DCR_SE;
+
+ /* kernel mode can propose an exception be handled in debug mode by
jumping to a special
+ * location */
+ if (__debug_frame->pc == (unsigned long)
__break_hijack_kernel_event_breaks_here) {
+ /* replace the debug frame with the kernel frame and discard
+ * the top kernel context */
+ *__debug_frame = *__frame;
+ __frame = __debug_frame->next_frame;
+ __debug_regs->brr = (__debug_frame->tbr & TBR_TT) << 12;
+ __debug_regs->brr |= BRR_EB;
+ }
+
+ if (__debug_frame->pc == (unsigned long) __debug_bug_trap + 4) {
+ __debug_frame->pc = __debug_frame->lr;
+ type = __debug_frame->gr8;
+ }
+
+#ifdef CONFIG_GDBSTUB
+ gdbstub(type);
+#endif
+
+ if (hsr0 & HSR0_ETMD)
+ __set_HSR(0, __get_HSR(0) | HSR0_ETMD);
+
+} /* end debug_stub() */
+
+/*****************************************************************************/
+/*
+ * debug stub initialisation
+ */
+static void __init debug_stub_init(void)
+{
+ __set_IRR(6, 0xff000000); /* map ERRs to NMI */
+ __set_IITMR(1, 0x20000000); /* ERR0/1, UART0/1 IRQ detect levels */
+
+ asm volatile(" movgs gr0,ibar0 \n"
+ " movgs gr0,ibar1 \n"
+ " movgs gr0,ibar2 \n"
+ " movgs gr0,ibar3 \n"
+ " movgs gr0,dbar0 \n"
+ " movgs gr0,dbmr00 \n"
+ " movgs gr0,dbmr01 \n"
+ " movgs gr0,dbdr00 \n"
+ " movgs gr0,dbdr01 \n"
+ " movgs gr0,dbar1 \n"
+ " movgs gr0,dbmr10 \n"
+ " movgs gr0,dbmr11 \n"
+ " movgs gr0,dbdr10 \n"
+ " movgs gr0,dbdr11 \n"
+ );
+
+ /* deal with debugging stub initialisation and initial pause */
+ if (__debug_frame->pc == (unsigned long) __debug_stub_init_break)
+ __debug_frame->pc = (unsigned long) start_kernel;
+
+ /* enable the debug events we want to trap */
+ __debug_regs->dcr = DCR_EBE;
+
+#ifdef CONFIG_GDBSTUB
+ gdbstub_init();
+#endif
+
+ __clr_MASK_all();
+ __clr_MASK(15);
+ __clr_RC(15);
+
+} /* end debug_stub_init() */
+
+/*****************************************************************************/
+/*
+ * kernel "exit" trap for gdb stub
+ */
+void debug_stub_exit(int status)
+{
+
+#ifdef CONFIG_GDBSTUB
+ gdbstub_exit(status);
+#endif
+
+} /* end debug_stub_exit() */
+
+/*****************************************************************************/
+/*
+ * send string to serial port
+ */
+void debug_to_serial(const char *p, int n)
+{
+ char ch;
+
+ for (; n > 0; n--) {
+ ch = *p++;
+ FLOWCTL_SET0(DTR);
+ LSR_WAIT_FOR0(THRE);
+ // FLOWCTL_WAIT_FOR(CTS);
+
+ if (ch == 0x0a) {
+ __UART0(TX) = 0x0d;
+ mb();
+ LSR_WAIT_FOR0(THRE);
+ // FLOWCTL_WAIT_FOR(CTS);
+ }
+ __UART0(TX) = ch;
+ mb();
+
+ FLOWCTL_CLEAR0(DTR);
+ }
+
+} /* end debug_to_serial() */
+
+/*****************************************************************************/
+/*
+ * send string to serial port
+ */
+void debug_to_serial2(const char *fmt, ...)
+{
+ va_list va;
+ char buf[64];
+ int n;
+
+ va_start(va, fmt);
+ n = vsprintf(buf, fmt, va);
+ va_end(va);
+
+ debug_to_serial(buf, n);
+
+} /* end debug_to_serial2() */
+
+/*****************************************************************************/
+/*
+ * set up the ttyS0 serial port baud rate timers
+ */
+void __init console_set_baud(unsigned baud)
+{
+ unsigned value, high, low;
+ u8 lcr;
+
+ /* work out the divisor to give us the nearest higher baud rate */
+ value = __serial_clock_speed_HZ / 16 / baud;
+
+ /* determine the baud rate range */
+ high = __serial_clock_speed_HZ / 16 / value;
+ low = __serial_clock_speed_HZ / 16 / (value + 1);
+
+ /* pick the nearest bound */
+ if (low + (high - low) / 2 > baud)
+ value++;
+
+ lcr = __UART0(LCR);
+ __UART0(LCR) |= UART_LCR_DLAB;
+ mb();
+ __UART0(DLL) = value & 0xff;
+ __UART0(DLM) = (value >> 8) & 0xff;
+ mb();
+ __UART0(LCR) = lcr;
+ mb();
+
+} /* end console_set_baud() */
+
+/*****************************************************************************/
+/*
+ *
+ */
+int __init console_get_baud(void)
+{
+ unsigned value;
+ u8 lcr;
+
+ lcr = __UART0(LCR);
+ __UART0(LCR) |= UART_LCR_DLAB;
+ mb();
+ value = __UART0(DLM) << 8;
+ value |= __UART0(DLL);
+ __UART0(LCR) = lcr;
+ mb();
+
+ return value;
+} /* end console_get_baud() */
+
+/*****************************************************************************/
+/*
+ * display BUG() info
+ */
+#ifndef CONFIG_NO_KERNEL_MSG
+void __debug_bug_printk(const char *file, unsigned line)
+{
+ printk("kernel BUG at %s:%d!\n", file, line);
+
+} /* end __debug_bug_printk() */
+#endif
diff -urN linux/arch/frv/kernel/dma.c linux/arch/frv/kernel/dma.c
--- linux/arch/frv/kernel/dma.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/dma.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,464 @@
+/* dma.c: DMA controller management on FR401 and the like
+ *
+ * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <asm/dma.h>
+#include <asm/gpio-regs.h>
+#include <asm/irc-regs.h>
+#include <asm/cpu-irqs.h>
+
+struct frv_dma_channel {
+ uint8_t flags;
+#define FRV_DMA_FLAGS_RESERVED 0x01
+#define FRV_DMA_FLAGS_INUSE 0x02
+#define FRV_DMA_FLAGS_PAUSED 0x04
+ uint8_t cap; /* capabilities available */
+ int irq; /* completion IRQ */
+ uint32_t dreqbit;
+ uint32_t dackbit;
+ uint32_t donebit;
+ const unsigned long ioaddr; /* DMA controller regs addr */
+ const char *devname;
+ dma_irq_handler_t handler;
+ void *data;
+};
+
+
+#define __get_DMAC(IO,X) ({ *(volatile unsigned long *)((IO) +
DMAC_##X##x); })
+
+#define __set_DMAC(IO,X,V) \
+do { \
+ *(volatile unsigned long *)((IO) + DMAC_##X##x) = (V); \
+ mb(); \
+} while(0)
+
+#define ___set_DMAC(IO,X,V) \
+do { \
+ *(volatile unsigned long *)((IO) + DMAC_##X##x) = (V); \
+} while(0)
+
+
+static struct frv_dma_channel frv_dma_channels[FRV_DMA_NCHANS] = {
+ [0] = {
+ .cap = FRV_DMA_CAP_DREQ | FRV_DMA_CAP_DACK |
FRV_DMA_CAP_DONE,
+ .irq = IRQ_CPU_DMA0,
+ .dreqbit = SIR_DREQ0_INPUT,
+ .dackbit = SOR_DACK0_OUTPUT,
+ .donebit = SOR_DONE0_OUTPUT,
+ .ioaddr = 0xfe000900,
+ },
+ [1] = {
+ .cap = FRV_DMA_CAP_DREQ | FRV_DMA_CAP_DACK |
FRV_DMA_CAP_DONE,
+ .irq = IRQ_CPU_DMA1,
+ .dreqbit = SIR_DREQ1_INPUT,
+ .dackbit = SOR_DACK1_OUTPUT,
+ .donebit = SOR_DONE1_OUTPUT,
+ .ioaddr = 0xfe000980,
+ },
+ [2] = {
+ .cap = FRV_DMA_CAP_DREQ | FRV_DMA_CAP_DACK,
+ .irq = IRQ_CPU_DMA2,
+ .dreqbit = SIR_DREQ2_INPUT,
+ .dackbit = SOR_DACK2_OUTPUT,
+ .ioaddr = 0xfe000a00,
+ },
+ [3] = {
+ .cap = FRV_DMA_CAP_DREQ | FRV_DMA_CAP_DACK,
+ .irq = IRQ_CPU_DMA3,
+ .dreqbit = SIR_DREQ3_INPUT,
+ .dackbit = SOR_DACK3_OUTPUT,
+ .ioaddr = 0xfe000a80,
+ },
+ [4] = {
+ .cap = FRV_DMA_CAP_DREQ,
+ .irq = IRQ_CPU_DMA4,
+ .dreqbit = SIR_DREQ4_INPUT,
+ .ioaddr = 0xfe001000,
+ },
+ [5] = {
+ .cap = FRV_DMA_CAP_DREQ,
+ .irq = IRQ_CPU_DMA5,
+ .dreqbit = SIR_DREQ5_INPUT,
+ .ioaddr = 0xfe001080,
+ },
+ [6] = {
+ .cap = FRV_DMA_CAP_DREQ,
+ .irq = IRQ_CPU_DMA6,
+ .dreqbit = SIR_DREQ6_INPUT,
+ .ioaddr = 0xfe001100,
+ },
+ [7] = {
+ .cap = FRV_DMA_CAP_DREQ,
+ .irq = IRQ_CPU_DMA7,
+ .dreqbit = SIR_DREQ7_INPUT,
+ .ioaddr = 0xfe001180,
+ },
+};
+
+static rwlock_t frv_dma_channels_lock = RW_LOCK_UNLOCKED;
+
+unsigned long frv_dma_inprogress;
+
+#define frv_clear_dma_inprogress(channel) \
+ atomic_clear_mask(1 << (channel), &frv_dma_inprogress);
+
+#define frv_set_dma_inprogress(channel) \
+ atomic_set_mask(1 << (channel), &frv_dma_inprogress);
+
+/*****************************************************************************/
+/*
+ * DMA irq handler - determine channel involved, grab status and call real
handler
+ */
+static irqreturn_t dma_irq_handler(int irq, void *_channel, struct pt_regs
*regs)
+{
+ struct frv_dma_channel *channel = _channel;
+
+ frv_clear_dma_inprogress(channel - frv_dma_channels);
+ return channel->handler(channel - frv_dma_channels,
+ __get_DMAC(channel->ioaddr, CSTR),
+ channel->data,
+ regs);
+
+} /* end dma_irq_handler() */
+
+/*****************************************************************************/
+/*
+ * Determine which DMA controllers are present on this CPU
+ */
+void __init frv_dma_init(void)
+{
+ unsigned long psr = __get_PSR();
+ int num_dma, i;
+
+ /* First, determine how many DMA channels are available */
+ switch (PSR_IMPLE(psr)) {
+ case PSR_IMPLE_FR405:
+ case PSR_IMPLE_FR451:
+ case PSR_IMPLE_FR501:
+ case PSR_IMPLE_FR551:
+ num_dma = FRV_DMA_8CHANS;
+ break;
+
+ case PSR_IMPLE_FR401:
+ default:
+ num_dma = FRV_DMA_4CHANS;
+ break;
+ }
+
+ /* Now mark all of the non-existent channels as reserved */
+ for(i = num_dma; i < FRV_DMA_NCHANS; i++)
+ frv_dma_channels[i].flags = FRV_DMA_FLAGS_RESERVED;
+
+} /* end frv_dma_init() */
+
+/*****************************************************************************/
+/*
+ * allocate a DMA controller channel and the IRQ associated with it
+ */
+int frv_dma_open(const char *devname,
+ unsigned long dmamask,
+ int dmacap,
+ dma_irq_handler_t handler,
+ unsigned long irq_flags,
+ void *data)
+{
+ struct frv_dma_channel *channel;
+ int dma, ret;
+ uint32_t val;
+
+ write_lock(&frv_dma_channels_lock);
+
+ ret = -ENOSPC;
+
+ for (dma = FRV_DMA_NCHANS - 1; dma >= 0; dma--) {
+ channel = &frv_dma_channels[dma];
+
+ if (!test_bit(dma, &dmamask))
+ continue;
+
+ if ((channel->cap & dmacap) != dmacap)
+ continue;
+
+ if (!frv_dma_channels[dma].flags)
+ goto found;
+ }
+
+ goto out;
+
+ found:
+ ret = request_irq(channel->irq, dma_irq_handler, irq_flags, devname,
channel);
+ if (ret < 0)
+ goto out;
+
+ /* okay, we've allocated all the resources */
+ channel = &frv_dma_channels[dma];
+
+ channel->flags |= FRV_DMA_FLAGS_INUSE;
+ channel->devname = devname;
+ channel->handler = handler;
+ channel->data = data;
+
+ /* Now make sure we are set up for DMA and not GPIO */
+ /* SIR bit must be set for DMA to work */
+ __set_SIR(channel->dreqbit | __get_SIR());
+ /* SOR bits depend on what the caller requests */
+ val = __get_SOR();
+ if(dmacap & FRV_DMA_CAP_DACK)
+ val |= channel->dackbit;
+ else
+ val &= ~channel->dackbit;
+ if(dmacap & FRV_DMA_CAP_DONE)
+ val |= channel->donebit;
+ else
+ val &= ~channel->donebit;
+ __set_SOR(val);
+
+ ret = dma;
+ out:
+ write_unlock(&frv_dma_channels_lock);
+ return ret;
+} /* end frv_dma_open() */
+
+EXPORT_SYMBOL(frv_dma_open);
+
+/*****************************************************************************/
+/*
+ * close a DMA channel and its associated interrupt
+ */
+void frv_dma_close(int dma)
+{
+ struct frv_dma_channel *channel = &frv_dma_channels[dma];
+ unsigned long flags;
+
+ write_lock_irqsave(&frv_dma_channels_lock, flags);
+
+ free_irq(channel->irq, channel);
+ frv_dma_stop(dma);
+
+ channel->flags &= ~FRV_DMA_FLAGS_INUSE;
+
+ write_unlock_irqrestore(&frv_dma_channels_lock, flags);
+} /* end frv_dma_close() */
+
+EXPORT_SYMBOL(frv_dma_close);
+
+/*****************************************************************************/
+/*
+ * set static configuration on a DMA channel
+ */
+void frv_dma_config(int dma, unsigned long ccfr, unsigned long cctr, unsigned
long apr)
+{
+ unsigned long ioaddr = frv_dma_channels[dma].ioaddr;
+
+ ___set_DMAC(ioaddr, CCFR, ccfr);
+ ___set_DMAC(ioaddr, CCTR, cctr);
+ ___set_DMAC(ioaddr, APR, apr);
+ mb();
+
+} /* end frv_dma_config() */
+
+EXPORT_SYMBOL(frv_dma_config);
+
+/*****************************************************************************/
+/*
+ * start a DMA channel
+ */
+void frv_dma_start(int dma,
+ unsigned long sba, unsigned long dba,
+ unsigned long pix, unsigned long six, unsigned long bcl)
+{
+ unsigned long ioaddr = frv_dma_channels[dma].ioaddr;
+
+ ___set_DMAC(ioaddr, SBA, sba);
+ ___set_DMAC(ioaddr, DBA, dba);
+ ___set_DMAC(ioaddr, PIX, pix);
+ ___set_DMAC(ioaddr, SIX, six);
+ ___set_DMAC(ioaddr, BCL, bcl);
+ ___set_DMAC(ioaddr, CSTR, 0);
+ mb();
+
+ __set_DMAC(ioaddr, CCTR, __get_DMAC(ioaddr, CCTR) | DMAC_CCTRx_ACT);
+ frv_set_dma_inprogress(dma);
+
+} /* end frv_dma_start() */
+
+EXPORT_SYMBOL(frv_dma_start);
+
+/*****************************************************************************/
+/*
+ * restart a DMA channel that's been stopped in circular addressing mode by
comparison-end
+ */
+void frv_dma_restart_circular(int dma, unsigned long six)
+{
+ unsigned long ioaddr = frv_dma_channels[dma].ioaddr;
+
+ ___set_DMAC(ioaddr, SIX, six);
+ ___set_DMAC(ioaddr, CSTR, __get_DMAC(ioaddr, CSTR) & ~DMAC_CSTRx_CE);
+ mb();
+
+ __set_DMAC(ioaddr, CCTR, __get_DMAC(ioaddr, CCTR) | DMAC_CCTRx_ACT);
+ frv_set_dma_inprogress(dma);
+
+} /* end frv_dma_restart_circular() */
+
+EXPORT_SYMBOL(frv_dma_restart_circular);
+
+/*****************************************************************************/
+/*
+ * stop a DMA channel
+ */
+void frv_dma_stop(int dma)
+{
+ unsigned long ioaddr = frv_dma_channels[dma].ioaddr;
+ uint32_t cctr;
+
+ ___set_DMAC(ioaddr, CSTR, 0);
+ cctr = __get_DMAC(ioaddr, CCTR);
+ cctr &= ~(DMAC_CCTRx_IE | DMAC_CCTRx_ACT);
+ cctr |= DMAC_CCTRx_FC; /* fifo clear */
+ __set_DMAC(ioaddr, CCTR, cctr);
+ __set_DMAC(ioaddr, BCL, 0);
+ frv_clear_dma_inprogress(dma);
+} /* end frv_dma_stop() */
+
+EXPORT_SYMBOL(frv_dma_stop);
+
+/*****************************************************************************/
+/*
+ * test interrupt status of DMA channel
+ */
+int is_frv_dma_interrupting(int dma)
+{
+ unsigned long ioaddr = frv_dma_channels[dma].ioaddr;
+
+ return __get_DMAC(ioaddr, CSTR) & (1 << 23);
+
+} /* end is_frv_dma_interrupting() */
+
+EXPORT_SYMBOL(is_frv_dma_interrupting);
+
+/*****************************************************************************/
+/*
+ * dump data about a DMA channel
+ */
+void frv_dma_dump(int dma)
+{
+ unsigned long ioaddr = frv_dma_channels[dma].ioaddr;
+ unsigned long cstr, pix, six, bcl;
+
+ cstr = __get_DMAC(ioaddr, CSTR);
+ pix = __get_DMAC(ioaddr, PIX);
+ six = __get_DMAC(ioaddr, SIX);
+ bcl = __get_DMAC(ioaddr, BCL);
+
+ printk("DMA[%d] cstr=%lx pix=%lx six=%lx bcl=%lx\n", dma, cstr, pix,
six, bcl);
+
+} /* end frv_dma_dump() */
+
+EXPORT_SYMBOL(frv_dma_dump);
+
+/*****************************************************************************/
+/*
+ * pause all DMA controllers
+ * - called by clock mangling routines
+ * - caller must be holding interrupts disabled
+ */
+void frv_dma_pause_all(void)
+{
+ struct frv_dma_channel *channel;
+ unsigned long ioaddr;
+ unsigned long cstr, cctr;
+ int dma;
+
+ write_lock(&frv_dma_channels_lock);
+
+ for (dma = FRV_DMA_NCHANS - 1; dma >= 0; dma--) {
+ channel = &frv_dma_channels[dma];
+
+ if (!(channel->flags & FRV_DMA_FLAGS_INUSE))
+ continue;
+
+ ioaddr = channel->ioaddr;
+ cctr = __get_DMAC(ioaddr, CCTR);
+ if (cctr & DMAC_CCTRx_ACT) {
+ cctr &= ~DMAC_CCTRx_ACT;
+ __set_DMAC(ioaddr, CCTR, cctr);
[%d lines skipped]
67diff -urN linux/arch/frv/kernel/entry-table.S
linux/arch/frv/kernel/entry-table.S
--- linux/arch/frv/kernel/entry-table.S 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/entry-table.S Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,295 @@
+/* entry-table.S: main trap vector tables and exception jump table
+ *
+ * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/sys.h>
+#include <linux/config.h>
+#include <linux/linkage.h>
+#include <asm/spr-regs.h>
+
+###############################################################################
+#
+# Declare the main trap and vector tables
+#
+# There are six tables:
+#
+# (1) The trap table for debug mode
+# (2) The trap table for kernel mode
+# (3) The trap table for user mode
+#
+# The CPU jumps to an appropriate slot in the appropriate table to perform
+# exception processing. We have three different tables for the three
+# different CPU modes because there is no hardware differentiation between
+# stack pointers for these three modes, and so we have to invent one when
+# crossing mode boundaries.
+#
+# (4) The exception handler vector table
+#
+# The user and kernel trap tables use the same prologue for normal
+# exception processing. The prologue then jumps to the handler in this
+# table, as indexed by the exception ID from the TBR.
+#
+# (5) The fixup table for kernel-trap single-step
+# (6) The fixup table for user-trap single-step
+#
+# Due to the way single-stepping works on this CPU (single-step is not
+# disabled when crossing exception boundaries, only when in debug mode),
+# we have to catch the single-step event in break.S and jump to the fixup
+# routine pointed to by this table.
+#
+# The linker script places the user mode and kernel mode trap tables on to
+# the same 8Kb page, so that break.S can be more efficient when performing
+# single-step bypass management
+#
+###############################################################################
+
+ # trap table for entry from debug mode
+ .section .trap.break,"ax"
+ .balign 256*16
+ .globl __entry_breaktrap_table
+__entry_breaktrap_table:
+
+ # trap table for entry from user mode
+ .section .trap.user,"ax"
+ .balign 256*16
+ .globl __entry_usertrap_table
+__entry_usertrap_table:
+
+ # trap table for entry from kernel mode
+ .section .trap.kernel,"ax"
+ .balign 256*16
+ .globl __entry_kerneltrap_table
+__entry_kerneltrap_table:
+
+ # exception handler jump table
+ .section .trap.vector,"ax"
+ .balign 256*4
+ .globl __entry_vector_table
+__entry_vector_table:
+
+ # trap fixup table for single-stepping in user mode
+ .section .trap.fixup.user,"a"
+ .balign 256*4
+ .globl __break_usertrap_fixup_table
+__break_usertrap_fixup_table:
+
+ # trap fixup table for single-stepping in user mode
+ .section .trap.fixup.kernel,"a"
+ .balign 256*4
+ .globl __break_kerneltrap_fixup_table
+__break_kerneltrap_fixup_table:
+
+ # handler declaration for a sofware or program interrupt
+.macro VECTOR_SOFTPROG tbr_tt, vec
+ .section .trap.user
+ .org \tbr_tt
+ bra __entry_uspace_softprog_interrupt
+ .section .trap.fixup.user
+ .org \tbr_tt >> 2
+ .long __break_step_uspace_softprog_interrupt
+ .section .trap.kernel
+ .org \tbr_tt
+ bra __entry_kernel_softprog_interrupt
+ .section .trap.fixup.kernel
+ .org \tbr_tt >> 2
+ .long __break_step_kernel_softprog_interrupt
+ .section .trap.vector
+ .org \tbr_tt >> 2
+ .long \vec
+.endm
+
+ # handler declaration for a maskable external interrupt
+.macro VECTOR_IRQ tbr_tt, vec
+ .section .trap.user
+ .org \tbr_tt
+ bra __entry_uspace_external_interrupt
+ .section .trap.fixup.user
+ .org \tbr_tt >> 2
+ .long __break_step_uspace_external_interrupt
+ .section .trap.kernel
+ .org \tbr_tt
+ bra __entry_kernel_external_interrupt
+ .section .trap.fixup.kernel
+ .org \tbr_tt >> 2
+ .long __break_step_kernel_external_interrupt
+ .section .trap.vector
+ .org \tbr_tt >> 2
+ .long \vec
+.endm
+
+ # handler declaration for an NMI external interrupt
+.macro VECTOR_NMI tbr_tt, vec
+ .section .trap.user
+ .org \tbr_tt
+ break
+ break
+ break
+ break
+ .section .trap.kernel
+ .org \tbr_tt
+ break
+ break
+ break
+ break
+ .section .trap.vector
+ .org \tbr_tt >> 2
+ .long \vec
+.endm
+
+ # handler declaration for an MMU only sofware or program interrupt
+.macro VECTOR_SP_MMU tbr_tt, vec
+#ifdef CONFIG_MMU
+ VECTOR_SOFTPROG \tbr_tt, \vec
+#else
+ VECTOR_NMI \tbr_tt, 0
+#endif
+.endm
+
+
+###############################################################################
+#
+# specification of the vectors
+# - note: each macro inserts code into multiple sections
+#
+###############################################################################
+ VECTOR_SP_MMU TBR_TT_INSTR_MMU_MISS, __entry_insn_mmu_miss
+ VECTOR_SOFTPROG TBR_TT_INSTR_ACC_ERROR, __entry_insn_access_error
+ VECTOR_SOFTPROG TBR_TT_INSTR_ACC_EXCEP, __entry_insn_access_exception
+ VECTOR_SOFTPROG TBR_TT_PRIV_INSTR, __entry_privileged_instruction
+ VECTOR_SOFTPROG TBR_TT_ILLEGAL_INSTR, __entry_illegal_instruction
+ VECTOR_SOFTPROG TBR_TT_FP_EXCEPTION, __entry_media_exception
+ VECTOR_SOFTPROG TBR_TT_MP_EXCEPTION, __entry_media_exception
+ VECTOR_SOFTPROG TBR_TT_DATA_ACC_ERROR, __entry_data_access_error
+ VECTOR_SP_MMU TBR_TT_DATA_MMU_MISS, __entry_data_mmu_miss
+ VECTOR_SOFTPROG TBR_TT_DATA_ACC_EXCEP, __entry_data_access_exception
+ VECTOR_SOFTPROG TBR_TT_DATA_STR_ERROR, __entry_data_store_error
+ VECTOR_SOFTPROG TBR_TT_DIVISION_EXCEP, __entry_division_exception
+
+#ifdef CONFIG_MMU
+ .section .trap.user
+ .org TBR_TT_INSTR_TLB_MISS
+ .globl __trap_user_insn_tlb_miss
+__trap_user_insn_tlb_miss:
+ movsg ear0,gr28 /* faulting address */
+ movsg scr0,gr31 /* get mapped PTD
coverage start address */
+ xor.p gr28,gr31,gr31 /* compare addresses */
+ bra __entry_user_insn_tlb_miss
+
+ .org TBR_TT_DATA_TLB_MISS
+ .globl __trap_user_data_tlb_miss
+__trap_user_data_tlb_miss:
+ movsg ear0,gr28 /* faulting address */
+ movsg scr1,gr31 /* get mapped PTD
coverage start address */
+ xor.p gr28,gr31,gr31 /* compare addresses */
+ bra __entry_user_data_tlb_miss
+
+ .section .trap.kernel
+ .org TBR_TT_INSTR_TLB_MISS
+ .globl __trap_kernel_insn_tlb_miss
+__trap_kernel_insn_tlb_miss:
+ movsg ear0,gr29 /* faulting address */
+ movsg scr0,gr31 /* get mapped PTD
coverage start address */
+ xor.p gr29,gr31,gr31 /* compare addresses */
+ bra __entry_kernel_insn_tlb_miss
+
+ .org TBR_TT_DATA_TLB_MISS
+ .globl __trap_kernel_data_tlb_miss
+__trap_kernel_data_tlb_miss:
+ movsg ear0,gr29 /* faulting address */
+ movsg scr1,gr31 /* get mapped PTD
coverage start address */
+ xor.p gr29,gr31,gr31 /* compare addresses */
+ bra __entry_kernel_data_tlb_miss
+
+ .section .trap.fixup.user
+ .org TBR_TT_INSTR_TLB_MISS >> 2
+ .globl __trap_fixup_user_insn_tlb_miss
+__trap_fixup_user_insn_tlb_miss:
+ .long __break_user_insn_tlb_miss
+ .org TBR_TT_DATA_TLB_MISS >> 2
+ .globl __trap_fixup_user_data_tlb_miss
+__trap_fixup_user_data_tlb_miss:
+ .long __break_user_data_tlb_miss
+
+ .section .trap.fixup.kernel
+ .org TBR_TT_INSTR_TLB_MISS >> 2
+ .globl __trap_fixup_kernel_insn_tlb_miss
+__trap_fixup_kernel_insn_tlb_miss:
+ .long __break_kernel_insn_tlb_miss
+ .org TBR_TT_DATA_TLB_MISS >> 2
+ .globl __trap_fixup_kernel_data_tlb_miss
+__trap_fixup_kernel_data_tlb_miss:
+ .long __break_kernel_data_tlb_miss
+
+ .section .trap.vector
+ .org TBR_TT_INSTR_TLB_MISS >> 2
+ .long __entry_insn_mmu_fault
+ .org TBR_TT_DATA_TLB_MISS >> 2
+ .long __entry_data_mmu_fault
+#endif
+
+ VECTOR_SP_MMU TBR_TT_DATA_DAT_EXCEP, __entry_data_dat_fault
+ VECTOR_NMI TBR_TT_DECREMENT_TIMER, __entry_do_NMI
+ VECTOR_SOFTPROG TBR_TT_COMPOUND_EXCEP, __entry_compound_exception
+ VECTOR_IRQ TBR_TT_INTERRUPT_1, __entry_do_IRQ
+ VECTOR_IRQ TBR_TT_INTERRUPT_2, __entry_do_IRQ
+ VECTOR_IRQ TBR_TT_INTERRUPT_3, __entry_do_IRQ
+ VECTOR_IRQ TBR_TT_INTERRUPT_4, __entry_do_IRQ
+ VECTOR_IRQ TBR_TT_INTERRUPT_5, __entry_do_IRQ
+ VECTOR_IRQ TBR_TT_INTERRUPT_6, __entry_do_IRQ
+ VECTOR_IRQ TBR_TT_INTERRUPT_7, __entry_do_IRQ
+ VECTOR_IRQ TBR_TT_INTERRUPT_8, __entry_do_IRQ
+ VECTOR_IRQ TBR_TT_INTERRUPT_9, __entry_do_IRQ
+ VECTOR_IRQ TBR_TT_INTERRUPT_10, __entry_do_IRQ
+ VECTOR_IRQ TBR_TT_INTERRUPT_11, __entry_do_IRQ
+ VECTOR_IRQ TBR_TT_INTERRUPT_12, __entry_do_IRQ
+ VECTOR_IRQ TBR_TT_INTERRUPT_13, __entry_do_IRQ
+ VECTOR_IRQ TBR_TT_INTERRUPT_14, __entry_do_IRQ
+ VECTOR_NMI TBR_TT_INTERRUPT_15, __entry_do_NMI
+
+ # miscellaneous user mode entry points
+ .section .trap.user
+ .org TBR_TT_TRAP0
+ .rept 127
+ bra __entry_uspace_softprog_interrupt
+ bra __break_step_uspace_softprog_interrupt
+ .long 0,0
+ .endr
+ .org TBR_TT_BREAK
+ bra __entry_break
+ .long 0,0,0
+
+ # miscellaneous kernel mode entry points
+ .section .trap.kernel
+ .org TBR_TT_TRAP0
+ .rept 127
+ bra __entry_kernel_softprog_interrupt
+ bra __break_step_kernel_softprog_interrupt
+ .long 0,0
+ .endr
+ .org TBR_TT_BREAK
+ bra __entry_break
+ .long 0,0,0
+
+ # miscellaneous debug mode entry points
+ .section .trap.break
+ .org TBR_TT_BREAK
+ movsg bpcsr,gr30
+ jmpl @(gr30,gr0)
+
+ # miscellaneous vectors
+ .section .trap.vector
+ .org TBR_TT_TRAP0 >> 2
+ .long system_call
+ .rept 126
+ .long __entry_unsupported_trap
+ .endr
+ .org TBR_TT_BREAK >> 2
+ .long __entry_debug_exception
diff -urN linux/arch/frv/kernel/entry.S linux/arch/frv/kernel/entry.S
--- linux/arch/frv/kernel/entry.S 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/entry.S Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,1431 @@
+/* entry.S: FR-V entry
+ *
+ * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ *
+ * Entry to the kernel is "interesting":
+ * (1) There are no stack pointers, not even for the kernel
+ * (2) General Registers should not be clobbered
+ * (3) There are no kernel-only data registers
+ * (4) Since all addressing modes are wrt to a General Register, no global
+ * variables can be reached
+ *
+ * We deal with this by declaring that we shall kill GR28 on entering the
+ * kernel from userspace
+ *
+ * However, since break interrupts can interrupt the CPU even when PSR.ET==0,
+ * they can't rely on GR28 to be anything useful, and so need to clobber a
+ * separate register (GR31). Break interrupts are managed in break.S
+ *
+ * GR29 _is_ saved, and holds the current task pointer globally
+ *
+ */
+
+#include <linux/sys.h>
+#include <linux/config.h>
+#include <linux/linkage.h>
+#include <asm/thread_info.h>
+#include <asm/setup.h>
+#include <asm/segment.h>
+#include <asm/ptrace.h>
+#include <asm/errno.h>
+#include <asm/cache.h>
+#include <asm/spr-regs.h>
+
+#define nr_syscalls ((syscall_table_size)/4)
+
+ .text
+ .balign 4
+
+.macro LEDS val
+# sethi.p %hi(0xe1200004),gr30
+# setlo %lo(0xe1200004),gr30
+# setlos #~\val,gr31
+# st gr31,@(gr30,gr0)
+# sethi.p %hi(0xffc00100),gr30
+# setlo %lo(0xffc00100),gr30
+# sth gr0,@(gr30,gr0)
+# membar
+.endm
+
+.macro LEDS32
+# not gr31,gr31
+# sethi.p %hi(0xe1200004),gr30
+# setlo %lo(0xe1200004),gr30
+# st.p gr31,@(gr30,gr0)
+# srli gr31,#16,gr31
+# sethi.p %hi(0xffc00100),gr30
+# setlo %lo(0xffc00100),gr30
+# sth gr31,@(gr30,gr0)
+# membar
+.endm
+
+###############################################################################
+#
+# entry point for External interrupts received whilst executing userspace code
+#
+###############################################################################
+ .globl __entry_uspace_external_interrupt
+ .type __entry_uspace_external_interrupt,@function
+__entry_uspace_external_interrupt:
+ LEDS 0x6200
+ sethi.p %hi(__kernel_frame0_ptr),gr28
+ setlo %lo(__kernel_frame0_ptr),gr28
+ ldi @(gr28,#0),gr28
+
+ # handle h/w single-step through exceptions
+ sti gr0,@(gr28,#REG__STATUS)
+
+ .globl __entry_uspace_external_interrupt_reentry
+__entry_uspace_external_interrupt_reentry:
+ LEDS 0x6201
+
+ setlos #REG__END,gr30
+ dcpl gr28,gr30,#0
+
+ # finish building the exception frame
+ sti sp, @(gr28,#REG_SP)
+ stdi gr2, @(gr28,#REG_GR(2))
+ stdi gr4, @(gr28,#REG_GR(4))
+ stdi gr6, @(gr28,#REG_GR(6))
+ stdi gr8, @(gr28,#REG_GR(8))
+ stdi gr10,@(gr28,#REG_GR(10))
+ stdi gr12,@(gr28,#REG_GR(12))
+ stdi gr14,@(gr28,#REG_GR(14))
+ stdi gr16,@(gr28,#REG_GR(16))
+ stdi gr18,@(gr28,#REG_GR(18))
+ stdi gr20,@(gr28,#REG_GR(20))
+ stdi gr22,@(gr28,#REG_GR(22))
+ stdi gr24,@(gr28,#REG_GR(24))
+ stdi gr26,@(gr28,#REG_GR(26))
+ sti gr0, @(gr28,#REG_GR(28))
+ sti gr29,@(gr28,#REG_GR(29))
+ stdi.p gr30,@(gr28,#REG_GR(30))
+
+ # set up the kernel stack pointer
+ ori gr28,0,sp
+
+ movsg tbr ,gr20
+ movsg psr ,gr22
+ movsg pcsr,gr21
+ movsg isr ,gr23
+ movsg ccr ,gr24
+ movsg cccr,gr25
+ movsg lr ,gr26
+ movsg lcr ,gr27
+
+ setlos.p #-1,gr4
+ andi gr22,#PSR_PS,gr5 /* try to rebuild
original PSR value */
+ andi.p gr22,#~(PSR_PS|PSR_S),gr6
+ slli gr5,#1,gr5
+ or gr6,gr5,gr5
+ andi gr5,#~PSR_ET,gr5
+
+ sti gr20,@(gr28,#REG_TBR)
+ sti gr21,@(gr28,#REG_PC)
+ sti gr5 ,@(gr28,#REG_PSR)
+ sti gr23,@(gr28,#REG_ISR)
+ stdi gr24,@(gr28,#REG_CCR)
+ stdi gr26,@(gr28,#REG_LR)
+ sti gr4 ,@(gr28,#REG_SYSCALLNO)
+
+ movsg iacc0h,gr4
+ movsg iacc0l,gr5
+ stdi gr4,@(gr28,#REG_IACC0)
+
+ movsg gner0,gr4
+ movsg gner1,gr5
+ stdi gr4,@(gr28,#REG_GNER0)
+
+ # set up kernel global registers
+ sethi.p %hi(__kernel_current_task),gr5
+ setlo %lo(__kernel_current_task),gr5
+ sethi.p %hi(_gp),gr16
+ setlo %lo(_gp),gr16
+ ldi @(gr5,#0),gr29
+ ldi.p @(gr29,#4),gr15 ; __current_thread_info =
current->thread_info
+
+ # make sure we (the kernel) get div-zero and misalignment exceptions
+ setlos #ISR_EDE|ISR_DTT_DIVBYZERO|ISR_EMAM_EXCEPTION,gr5
+ movgs gr5,isr
+
+ # switch to the kernel trap table
+ sethi.p %hi(__entry_kerneltrap_table),gr6
+ setlo %lo(__entry_kerneltrap_table),gr6
+ movgs gr6,tbr
+
+ # set the return address
+ sethi.p %hi(__entry_return_from_user_interrupt),gr4
+ setlo %lo(__entry_return_from_user_interrupt),gr4
+ movgs gr4,lr
+
+ # raise the minimum interrupt priority to 15 (NMI only) and enable
exceptions
+ movsg psr,gr4
+
+ ori gr4,#PSR_PIL_14,gr4
+ movgs gr4,psr
+ ori gr4,#PSR_PIL_14|PSR_ET,gr4
+ movgs gr4,psr
+
+ LEDS 0x6202
+ bra do_IRQ
+
+ .size
__entry_uspace_external_interrupt,.-__entry_uspace_external_interrupt
+
+###############################################################################
+#
+# entry point for External interrupts received whilst executing kernel code
+# - on arriving here, the following registers should already be set up:
+# GR15 - current thread_info struct pointer
+# GR16 - kernel GP-REL pointer
+# GR29 - current task struct pointer
+# TBR - kernel trap vector table
+# ISR - kernel's preferred integer controls
+#
+###############################################################################
+ .globl __entry_kernel_external_interrupt
+ .type __entry_kernel_external_interrupt,@function
+__entry_kernel_external_interrupt:
+ LEDS 0x6210
+
+ sub sp,gr15,gr31
+ LEDS32
+
+ # set up the stack pointer
+ or.p sp,gr0,gr30
+ subi sp,#REG__END,sp
+ sti gr30,@(sp,#REG_SP)
+
+ # handle h/w single-step through exceptions
+ sti gr0,@(sp,#REG__STATUS)
+
+ .globl __entry_kernel_external_interrupt_reentry
+__entry_kernel_external_interrupt_reentry:
+ LEDS 0x6211
+
+ # set up the exception frame
+ setlos #REG__END,gr30
+ dcpl sp,gr30,#0
+
+ sti.p gr28,@(sp,#REG_GR(28))
+ ori sp,0,gr28
+
+ # finish building the exception frame
+ stdi gr2,@(gr28,#REG_GR(2))
+ stdi gr4,@(gr28,#REG_GR(4))
+ stdi gr6,@(gr28,#REG_GR(6))
+ stdi gr8,@(gr28,#REG_GR(8))
+ stdi gr10,@(gr28,#REG_GR(10))
+ stdi gr12,@(gr28,#REG_GR(12))
+ stdi gr14,@(gr28,#REG_GR(14))
+ stdi gr16,@(gr28,#REG_GR(16))
+ stdi gr18,@(gr28,#REG_GR(18))
+ stdi gr20,@(gr28,#REG_GR(20))
+ stdi gr22,@(gr28,#REG_GR(22))
+ stdi gr24,@(gr28,#REG_GR(24))
+ stdi gr26,@(gr28,#REG_GR(26))
+ sti gr29,@(gr28,#REG_GR(29))
+ stdi gr30,@(gr28,#REG_GR(30))
+
+ movsg tbr ,gr20
+ movsg psr ,gr22
+ movsg pcsr,gr21
+ movsg isr ,gr23
+ movsg ccr ,gr24
+ movsg cccr,gr25
+ movsg lr ,gr26
+ movsg lcr ,gr27
+
+ setlos.p #-1,gr4
+ andi gr22,#PSR_PS,gr5 /* try to rebuild
original PSR value */
+ andi.p gr22,#~(PSR_PS|PSR_S),gr6
+ slli gr5,#1,gr5
+ or gr6,gr5,gr5
+ andi.p gr5,#~PSR_ET,gr5
+
+ # set CCCR.CC3 to Undefined to abort atomic-modify completion inside
the kernel
+ # - for an explanation of how it works, see:
Documentation/fujitsu/frv/atomic-ops.txt
+ andi gr25,#~0xc0,gr25
+
+ sti gr20,@(gr28,#REG_TBR)
+ sti gr21,@(gr28,#REG_PC)
+ sti gr5 ,@(gr28,#REG_PSR)
+ sti gr23,@(gr28,#REG_ISR)
+ stdi gr24,@(gr28,#REG_CCR)
+ stdi gr26,@(gr28,#REG_LR)
+ sti gr4 ,@(gr28,#REG_SYSCALLNO)
+
+ movsg iacc0h,gr4
+ movsg iacc0l,gr5
+ stdi gr4,@(gr28,#REG_IACC0)
+
+ movsg gner0,gr4
+ movsg gner1,gr5
+ stdi gr4,@(gr28,#REG_GNER0)
+
+ # set the return address
+ sethi.p %hi(__entry_return_from_kernel_interrupt),gr4
+ setlo %lo(__entry_return_from_kernel_interrupt),gr4
+ movgs gr4,lr
+
+ # clear power-saving mode flags
+ movsg hsr0,gr4
+ andi gr4,#~HSR0_PDM,gr4
+ movgs gr4,hsr0
+
+ # raise the minimum interrupt priority to 15 (NMI only) and enable
exceptions
+ movsg psr,gr4
+ ori gr4,#PSR_PIL_14,gr4
+ movgs gr4,psr
+ ori gr4,#PSR_ET,gr4
+ movgs gr4,psr
+
+ LEDS 0x6212
+ bra do_IRQ
+
+ .size
__entry_kernel_external_interrupt,.-__entry_kernel_external_interrupt
+
+
+###############################################################################
+#
+# entry point for Software and Progam interrupts generated whilst executing
userspace code
+#
+###############################################################################
+ .globl __entry_uspace_softprog_interrupt
+ .type __entry_uspace_softprog_interrupt,@function
+ .globl __entry_uspace_handle_mmu_fault
+__entry_uspace_softprog_interrupt:
+ LEDS 0x6000
+#ifdef CONFIG_MMU
+ movsg ear0,gr28
+__entry_uspace_handle_mmu_fault:
+ movgs gr28,scr2
+#endif
+ sethi.p %hi(__kernel_frame0_ptr),gr28
+ setlo %lo(__kernel_frame0_ptr),gr28
+ ldi @(gr28,#0),gr28
+
+ # handle h/w single-step through exceptions
+ sti gr0,@(gr28,#REG__STATUS)
+
+ .globl __entry_uspace_softprog_interrupt_reentry
+__entry_uspace_softprog_interrupt_reentry:
+ LEDS 0x6001
+
+ setlos #REG__END,gr30
+ dcpl gr28,gr30,#0
+
+ # set up the kernel stack pointer
+ sti.p sp,@(gr28,#REG_SP)
+ ori gr28,0,sp
+ sti gr0,@(gr28,#REG_GR(28))
+
+ stdi gr20,@(gr28,#REG_GR(20))
+ stdi gr22,@(gr28,#REG_GR(22))
+
+ movsg tbr,gr20
+ movsg pcsr,gr21
+ movsg psr,gr22
+
+ sethi.p %hi(__entry_return_from_user_exception),gr23
+ setlo %lo(__entry_return_from_user_exception),gr23
+ bra __entry_common
+
+ .size
__entry_uspace_softprog_interrupt,.-__entry_uspace_softprog_interrupt
+
+ # single-stepping was disabled on entry to a TLB handler that then
faulted
+#ifdef CONFIG_MMU
+ .globl __entry_uspace_handle_mmu_fault_sstep
+__entry_uspace_handle_mmu_fault_sstep:
+ movgs gr28,scr2
+ sethi.p %hi(__kernel_frame0_ptr),gr28
+ setlo %lo(__kernel_frame0_ptr),gr28
+ ldi @(gr28,#0),gr28
+
+ # flag single-step re-enablement
+ sti gr0,@(gr28,#REG__STATUS)
+ bra __entry_uspace_softprog_interrupt_reentry
+#endif
+
+
+###############################################################################
+#
+# entry point for Software and Progam interrupts generated whilst executing
kernel code
+#
+###############################################################################
+ .globl __entry_kernel_softprog_interrupt
+ .type __entry_kernel_softprog_interrupt,@function
+__entry_kernel_softprog_interrupt:
+ LEDS 0x6004
+
+#ifdef CONFIG_MMU
+ movsg ear0,gr30
+ movgs gr30,scr2
+#endif
+
+ .globl __entry_kernel_handle_mmu_fault
+__entry_kernel_handle_mmu_fault:
+ # set up the stack pointer
+ subi sp,#REG__END,sp
+ sti sp,@(sp,#REG_SP)
+ sti sp,@(sp,#REG_SP-4)
+ andi sp,#~7,sp
+
+ # handle h/w single-step through exceptions
+ sti gr0,@(sp,#REG__STATUS)
+
+ .globl __entry_kernel_softprog_interrupt_reentry
+__entry_kernel_softprog_interrupt_reentry:
+ LEDS 0x6005
+
+ setlos #REG__END,gr30
+ dcpl sp,gr30,#0
+
+ # set up the exception frame
+ sti.p gr28,@(sp,#REG_GR(28))
+ ori sp,0,gr28
+
+ stdi gr20,@(gr28,#REG_GR(20))
+ stdi gr22,@(gr28,#REG_GR(22))
+
+ ldi @(sp,#REG_SP),gr22 /* reconstruct the old
SP */
[%d lines skipped]
1034diff -urN linux/arch/frv/kernel/frv_ksyms.c
linux/arch/frv/kernel/frv_ksyms.c
--- linux/arch/frv/kernel/frv_ksyms.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/frv_ksyms.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,124 @@
+#include <linux/module.h>
+#include <linux/linkage.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/user.h>
+#include <linux/elfcore.h>
+#include <linux/in6.h>
+#include <linux/interrupt.h>
+#include <linux/config.h>
+
+#include <asm/setup.h>
+#include <asm/pgalloc.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <asm/semaphore.h>
+#include <asm/checksum.h>
+#include <asm/hardirq.h>
+#include <asm/current.h>
+
+extern void dump_thread(struct pt_regs *, struct user *);
+extern long __memcpy_user(void *dst, const void *src, size_t count);
+
+/* platform dependent support */
+
+EXPORT_SYMBOL(__ioremap);
+EXPORT_SYMBOL(iounmap);
+
+EXPORT_SYMBOL(dump_thread);
+EXPORT_SYMBOL(strnlen);
+EXPORT_SYMBOL(strrchr);
+EXPORT_SYMBOL(strstr);
+EXPORT_SYMBOL(strchr);
+EXPORT_SYMBOL(strcat);
+EXPORT_SYMBOL(strlen);
+EXPORT_SYMBOL(strcmp);
+EXPORT_SYMBOL(strncmp);
+EXPORT_SYMBOL(strncpy);
+
+EXPORT_SYMBOL(ip_fast_csum);
+
+#if 0
+EXPORT_SYMBOL(local_irq_count);
+EXPORT_SYMBOL(local_bh_count);
+#endif
+EXPORT_SYMBOL(kernel_thread);
+
+EXPORT_SYMBOL(enable_irq);
+EXPORT_SYMBOL(disable_irq);
+EXPORT_SYMBOL(__res_bus_clock_speed_HZ);
+EXPORT_SYMBOL(__page_offset);
+EXPORT_SYMBOL(__memcpy_user);
+EXPORT_SYMBOL(flush_dcache_page);
+
+#ifndef CONFIG_MMU
+EXPORT_SYMBOL(memory_start);
+EXPORT_SYMBOL(memory_end);
+#endif
+
+EXPORT_SYMBOL(__debug_bug_trap);
+
+/* Networking helper routines. */
+EXPORT_SYMBOL(csum_partial_copy);
+
+/* The following are special because they're not called
+ explicitly (the C compiler generates them). Fortunately,
+ their interface isn't gonna change any time soon now, so
+ it's OK to leave it out of version control. */
+EXPORT_SYMBOL(memcpy);
+EXPORT_SYMBOL(memset);
+EXPORT_SYMBOL(memcmp);
+EXPORT_SYMBOL(memscan);
+EXPORT_SYMBOL(memmove);
+EXPORT_SYMBOL(strtok);
+
+EXPORT_SYMBOL(get_wchan);
+
+#ifdef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
+EXPORT_SYMBOL(atomic_test_and_ANDNOT_mask);
+EXPORT_SYMBOL(atomic_test_and_OR_mask);
+EXPORT_SYMBOL(atomic_test_and_XOR_mask);
+EXPORT_SYMBOL(atomic_add_return);
+EXPORT_SYMBOL(atomic_sub_return);
+EXPORT_SYMBOL(__xchg_8);
+EXPORT_SYMBOL(__xchg_16);
+EXPORT_SYMBOL(__xchg_32);
+EXPORT_SYMBOL(__cmpxchg_8);
+EXPORT_SYMBOL(__cmpxchg_16);
+EXPORT_SYMBOL(__cmpxchg_32);
+#endif
+
+/*
+ * libgcc functions - functions that are used internally by the
+ * compiler... (prototypes are not correct though, but that
+ * doesn't really matter since they're not versioned).
+ */
+extern void __gcc_bcmp(void);
+extern void __ashldi3(void);
+extern void __ashrdi3(void);
+extern void __cmpdi2(void);
+extern void __divdi3(void);
+extern void __lshrdi3(void);
+extern void __moddi3(void);
+extern void __muldi3(void);
+extern void __negdi2(void);
+extern void __ucmpdi2(void);
+extern void __udivdi3(void);
+extern void __udivmoddi4(void);
+extern void __umoddi3(void);
+
+ /* gcc lib functions */
+//EXPORT_SYMBOL(__gcc_bcmp);
+EXPORT_SYMBOL(__ashldi3);
+EXPORT_SYMBOL(__ashrdi3);
+//EXPORT_SYMBOL(__cmpdi2);
+//EXPORT_SYMBOL(__divdi3);
+EXPORT_SYMBOL(__lshrdi3);
+//EXPORT_SYMBOL(__moddi3);
+EXPORT_SYMBOL(__muldi3);
+EXPORT_SYMBOL(__negdi2);
+//EXPORT_SYMBOL(__ucmpdi2);
+//EXPORT_SYMBOL(__udivdi3);
+//EXPORT_SYMBOL(__udivmoddi4);
+//EXPORT_SYMBOL(__umoddi3);
diff -urN linux/arch/frv/kernel/gdb-io.c linux/arch/frv/kernel/gdb-io.c
--- linux/arch/frv/kernel/gdb-io.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/gdb-io.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,216 @@
+/* gdb-io.c: FR403 GDB stub I/O
+ *
+ * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/init.h>
+#include <linux/serial_reg.h>
+
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/irc-regs.h>
+#include <asm/timer-regs.h>
+#include <asm/gdb-stub.h>
+#include "gdb-io.h"
+
+#ifdef CONFIG_GDBSTUB_UART0
+#define __UART(X) (*(volatile uint8_t *)(UART0_BASE + (UART_##X)))
+#define __UART_IRR_NMI 0xff0f0000
+#else /* CONFIG_GDBSTUB_UART1 */
+#define __UART(X) (*(volatile uint8_t *)(UART1_BASE + (UART_##X)))
+#define __UART_IRR_NMI 0xfff00000
+#endif
+
+#define LSR_WAIT_FOR(STATE) \
+do { \
+ gdbstub_do_rx(); \
+} while (!(__UART(LSR) & UART_LSR_##STATE))
+
+#define FLOWCTL_QUERY(LINE) ({ __UART(MSR) & UART_MSR_##LINE; })
+#define FLOWCTL_CLEAR(LINE) do { __UART(MCR) &= ~UART_MCR_##LINE; mb(); }
while (0)
+#define FLOWCTL_SET(LINE) do { __UART(MCR) |= UART_MCR_##LINE; mb(); }
while (0)
+
+#define FLOWCTL_WAIT_FOR(LINE) \
+do { \
+ gdbstub_do_rx(); \
+} while(!FLOWCTL_QUERY(LINE))
+
+/*****************************************************************************/
+/*
+ * initialise the GDB stub
+ * - called with PSR.ET==0, so can't incur external interrupts
+ */
+void gdbstub_io_init(void)
+{
+ /* set up the serial port */
+ __UART(LCR) = UART_LCR_WLEN8; /* 1N8 */
+ __UART(FCR) =
+ UART_FCR_ENABLE_FIFO |
+ UART_FCR_CLEAR_RCVR |
+ UART_FCR_CLEAR_XMIT |
+ UART_FCR_TRIGGER_1;
+
+ FLOWCTL_CLEAR(DTR);
+ FLOWCTL_SET(RTS);
+
+// gdbstub_set_baud(115200);
+
+ /* we want to get serial receive interrupts */
+ __UART(IER) = UART_IER_RDI | UART_IER_RLSI;
+ mb();
+
+ __set_IRR(6, __UART_IRR_NMI); /* map ERRs and UARTx to NMI */
+
+} /* end gdbstub_io_init() */
+
+/*****************************************************************************/
+/*
+ * set up the GDB stub serial port baud rate timers
+ */
+void gdbstub_set_baud(unsigned baud)
+{
+ unsigned value, high, low;
+ u8 lcr;
+
+ /* work out the divisor to give us the nearest higher baud rate */
+ value = __serial_clock_speed_HZ / 16 / baud;
+
+ /* determine the baud rate range */
+ high = __serial_clock_speed_HZ / 16 / value;
+ low = __serial_clock_speed_HZ / 16 / (value + 1);
+
+ /* pick the nearest bound */
+ if (low + (high - low) / 2 > baud)
+ value++;
+
+ lcr = __UART(LCR);
+ __UART(LCR) |= UART_LCR_DLAB;
+ mb();
+ __UART(DLL) = value & 0xff;
+ __UART(DLM) = (value >> 8) & 0xff;
+ mb();
+ __UART(LCR) = lcr;
+ mb();
+
+} /* end gdbstub_set_baud() */
+
+/*****************************************************************************/
+/*
+ * receive characters into the receive FIFO
+ */
+void gdbstub_do_rx(void)
+{
+ unsigned ix, nix;
+
+ ix = gdbstub_rx_inp;
+
+ while (__UART(LSR) & UART_LSR_DR) {
+ nix = (ix + 2) & 0xfff;
+ if (nix == gdbstub_rx_outp)
+ break;
+
+ gdbstub_rx_buffer[ix++] = __UART(LSR);
+ gdbstub_rx_buffer[ix++] = __UART(RX);
+ ix = nix;
+ }
+
+ gdbstub_rx_inp = ix;
+
+ __clr_RC(15);
+ __clr_IRL();
+
+} /* end gdbstub_do_rx() */
+
+/*****************************************************************************/
+/*
+ * wait for a character to come from the debugger
+ */
+int gdbstub_rx_char(unsigned char *_ch, int nonblock)
+{
+ unsigned ix;
+ u8 ch, st;
+
+ *_ch = 0xff;
+
+ if (gdbstub_rx_unget) {
+ *_ch = gdbstub_rx_unget;
+ gdbstub_rx_unget = 0;
+ return 0;
+ }
+
+ try_again:
+ gdbstub_do_rx();
+
+ /* pull chars out of the buffer */
+ ix = gdbstub_rx_outp;
+ if (ix == gdbstub_rx_inp) {
+ if (nonblock)
+ return -EAGAIN;
+ //watchdog_alert_counter = 0;
+ goto try_again;
+ }
+
+ st = gdbstub_rx_buffer[ix++];
+ ch = gdbstub_rx_buffer[ix++];
+ gdbstub_rx_outp = ix & 0x00000fff;
+
+ if (st & UART_LSR_BI) {
+ gdbstub_proto("### GDB Rx Break Detected ###\n");
+ return -EINTR;
+ }
+ else if (st & (UART_LSR_FE|UART_LSR_OE|UART_LSR_PE)) {
+ gdbstub_proto("### GDB Rx Error (st=%02x) ###\n",st);
+ return -EIO;
+ }
+ else {
+ gdbstub_proto("### GDB Rx %02x (st=%02x) ###\n",ch,st);
+ *_ch = ch & 0x7f;
+ return 0;
+ }
+
+} /* end gdbstub_rx_char() */
+
+/*****************************************************************************/
+/*
+ * send a character to the debugger
+ */
+void gdbstub_tx_char(unsigned char ch)
+{
+ FLOWCTL_SET(DTR);
+ LSR_WAIT_FOR(THRE);
+// FLOWCTL_WAIT_FOR(CTS);
+
+ if (ch == 0x0a) {
+ __UART(TX) = 0x0d;
+ mb();
+ LSR_WAIT_FOR(THRE);
+// FLOWCTL_WAIT_FOR(CTS);
+ }
+ __UART(TX) = ch;
+ mb();
+
+ FLOWCTL_CLEAR(DTR);
+} /* end gdbstub_tx_char() */
+
+/*****************************************************************************/
+/*
+ * send a character to the debugger
+ */
+void gdbstub_tx_flush(void)
+{
+ LSR_WAIT_FOR(TEMT);
+ LSR_WAIT_FOR(THRE);
+ FLOWCTL_CLEAR(DTR);
+} /* end gdbstub_tx_flush() */
diff -urN linux/arch/frv/kernel/gdb-io.h linux/arch/frv/kernel/gdb-io.h
--- linux/arch/frv/kernel/gdb-io.h 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/gdb-io.h Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,55 @@
+/* gdb-io.h: FR403 GDB I/O port defs
+ *
+ * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#ifndef _GDB_IO_H
+#define _GDB_IO_H
+
+#include <asm/serial-regs.h>
+
+#undef UART_RX
+#undef UART_TX
+#undef UART_DLL
+#undef UART_DLM
+#undef UART_IER
+#undef UART_IIR
+#undef UART_FCR
+#undef UART_LCR
+#undef UART_MCR
+#undef UART_LSR
+#undef UART_MSR
+#undef UART_SCR
+
+#define UART_RX 0*8 /* In: Receive buffer (DLAB=0) */
+#define UART_TX 0*8 /* Out: Transmit buffer (DLAB=0) */
+#define UART_DLL 0*8 /* Out: Divisor Latch Low (DLAB=1) */
+#define UART_DLM 1*8 /* Out: Divisor Latch High (DLAB=1) */
+#define UART_IER 1*8 /* Out: Interrupt Enable Register */
+#define UART_IIR 2*8 /* In: Interrupt ID Register */
+#define UART_FCR 2*8 /* Out: FIFO Control Register */
+#define UART_LCR 3*8 /* Out: Line Control Register */
+#define UART_MCR 4*8 /* Out: Modem Control Register */
+#define UART_LSR 5*8 /* In: Line Status Register */
+#define UART_MSR 6*8 /* In: Modem Status Register */
+#define UART_SCR 7*8 /* I/O: Scratch Register */
+
+#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
+#define UART_LCR_SBC 0x40 /* Set break control */
+#define UART_LCR_SPAR 0x20 /* Stick parity (?) */
+#define UART_LCR_EPAR 0x10 /* Even parity select */
+#define UART_LCR_PARITY 0x08 /* Parity Enable */
+#define UART_LCR_STOP 0x04 /* Stop bits: 0=1 stop bit, 1= 2 stop bits */
+#define UART_LCR_WLEN5 0x00 /* Wordlength: 5 bits */
+#define UART_LCR_WLEN6 0x01 /* Wordlength: 6 bits */
+#define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */
+#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */
+
+
+#endif /* _GDB_IO_H */
diff -urN linux/arch/frv/kernel/gdb-stub.c linux/arch/frv/kernel/gdb-stub.c
--- linux/arch/frv/kernel/gdb-stub.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/gdb-stub.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,2084 @@
+/* gdb-stub.c: FRV GDB stub
+ *
+ * Copyright (C) 2003,4 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ * - Derived from Linux/MIPS version, Copyright (C) 1995 Andreas Busse
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+/*
+ * To enable debugger support, two things need to happen. One, a
+ * call to set_debug_traps() is necessary in order to allow any breakpoints
+ * or error conditions to be properly intercepted and reported to gdb.
+ * Two, a breakpoint needs to be generated to begin communication. This
+ * is most easily accomplished by a call to breakpoint(). Breakpoint()
+ * simulates a breakpoint by executing a BREAK instruction.
+ *
+ *
+ * The following gdb commands are supported:
+ *
+ * command function Return value
+ *
+ * g return the value of the CPU registers hex data or ENN
+ * G set the value of the CPU registers OK or ENN
+ *
+ * mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN
+ * MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN
+ *
+ * c Resume at current address SNN ( signal NN)
+ * cAA..AA Continue at address AA..AA SNN
+ *
+ * s Step one instruction SNN
+ * sAA..AA Step one instruction from AA..AA SNN
+ *
+ * k kill
+ *
+ * ? What was the last sigval ? SNN (signal NN)
+ *
+ * bBB..BB Set baud rate to BB..BB OK or BNN, then sets
+ * baud rate
+ *
+ * All commands and responses are sent with a packet which includes a
+ * checksum. A packet consists of
+ *
+ * $<packet info>#<checksum>.
+ *
+ * where
+ * <packet info> :: <characters representing the command or response>
+ * <checksum> :: < two hex digits computed as modulo 256 sum of
<packetinfo>>
+ *
+ * When a packet is received, it is first acknowledged with either '+' or '-'.
+ * '+' indicates a successful transfer. '-' indicates a failed transfer.
+ *
+ * Example:
+ *
+ * Host: Reply:
+ * $m0,10#2a +$00010203040506070809101112131415#42
+ *
+ *
+ * ==============
+ * MORE EXAMPLES:
+ * ==============
+ *
+ * For reference -- the following are the steps that one
+ * company took (RidgeRun Inc) to get remote gdb debugging
+ * going. In this scenario the host machine was a PC and the
+ * target platform was a Galileo EVB64120A MIPS evaluation
+ * board.
+ *
+ * Step 1:
+ * First download gdb-5.0.tar.gz from the internet.
+ * and then build/install the package.
+ *
+ * Example:
+ * $ tar zxf gdb-5.0.tar.gz
+ * $ cd gdb-5.0
+ * $ ./configure --target=frv-elf-gdb
+ * $ make
+ * $ frv-elf-gdb
+ *
+ * Step 2:
+ * Configure linux for remote debugging and build it.
+ *
+ * Example:
+ * $ cd ~/linux
+ * $ make menuconfig <go to "Kernel Hacking" and turn on remote debugging>
+ * $ make dep; make vmlinux
+ *
+ * Step 3:
+ * Download the kernel to the remote target and start
+ * the kernel running. It will promptly halt and wait
+ * for the host gdb session to connect. It does this
+ * since the "Kernel Hacking" option has defined
+ * CONFIG_REMOTE_DEBUG which in turn enables your calls
+ * to:
+ * set_debug_traps();
+ * breakpoint();
+ *
+ * Step 4:
+ * Start the gdb session on the host.
+ *
+ * Example:
+ * $ frv-elf-gdb vmlinux
+ * (gdb) set remotebaud 115200
+ * (gdb) target remote /dev/ttyS1
+ * ...at this point you are connected to
+ * the remote target and can use gdb
+ * in the normal fasion. Setting
+ * breakpoints, single stepping,
+ * printing variables, etc.
+ *
+ */
+
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/nmi.h>
+
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/gdb-stub.h>
+
+#define LEDS(x) do { /* *(u32*)0xe1200004 = ~(x); mb(); */ } while(0)
+
+#undef GDBSTUB_DEBUG_PROTOCOL
+
+extern void debug_to_serial(const char *p, int n);
+extern void gdbstub_console_write(struct console *co, const char *p, unsigned
n);
+
+extern volatile uint32_t __break_error_detect[3]; /* ESFR1, ESR15, EAR15 */
+extern struct user_context __break_user_context;
+
+struct __debug_amr {
+ unsigned long L, P;
+} __attribute__((aligned(8)));
+
+struct __debug_mmu {
+ struct {
+ unsigned long hsr0, pcsr, esr0, ear0, epcr0;
+#ifdef CONFIG_MMU
+ unsigned long tplr, tppr, tpxr, cxnr;
+#endif
+ } regs;
+
+ struct __debug_amr iamr[16];
+ struct __debug_amr damr[16];
+
+#ifdef CONFIG_MMU
+ struct __debug_amr tlb[64*2];
+#endif
+};
+
+static struct __debug_mmu __debug_mmu;
+
+/*
+ * BUFMAX defines the maximum number of characters in inbound/outbound buffers
+ * at least NUMREGBYTES*2 are needed for register packets
+ */
+#define BUFMAX 2048
+
+#define BREAK_INSN 0x801000c0 /* use "break" as bkpt */
+
+static const char gdbstub_banner[] = "Linux/FR-V GDB Stub (c) RedHat 2003\n";
+
+volatile u8 gdbstub_rx_buffer[PAGE_SIZE]
__attribute__((aligned(PAGE_SIZE)));
+volatile u32 gdbstub_rx_inp = 0;
+volatile u32 gdbstub_rx_outp = 0;
+volatile u8 gdbstub_rx_overflow = 0;
+u8 gdbstub_rx_unget = 0;
+
+/* set with GDB whilst running to permit step through exceptions */
+extern volatile u32 __attribute__((section(".bss")))
gdbstub_trace_through_exceptions;
+
+static char input_buffer[BUFMAX];
+static char output_buffer[BUFMAX];
+
+static const char hexchars[] = "0123456789abcdef";
+
+static const char *regnames[] = {
+ "PSR ", "ISR ", "CCR ", "CCCR",
+ "LR ", "LCR ", "PC ", "_stt",
+ "sys ", "GR8*", "GNE0", "GNE1",
+ "IACH", "IACL",
+ "TBR ", "SP ", "FP ", "GR3 ",
+ "GR4 ", "GR5 ", "GR6 ", "GR7 ",
+ "GR8 ", "GR9 ", "GR10", "GR11",
+ "GR12", "GR13", "GR14", "GR15",
+ "GR16", "GR17", "GR18", "GR19",
+ "GR20", "GR21", "GR22", "GR23",
+ "GR24", "GR25", "GR26", "GR27",
+ "EFRM", "CURR", "GR30", "BFRM"
+};
+
+struct gdbstub_bkpt {
+ unsigned long addr; /* address of breakpoint */
+ unsigned len; /* size of breakpoint */
+ uint32_t originsns[7]; /* original instructions */
+};
+
+static struct gdbstub_bkpt gdbstub_bkpts[256];
+
+/*
+ * local prototypes
+ */
+
+static void gdbstub_recv_packet(char *buffer);
+static int gdbstub_send_packet(char *buffer);
+static int gdbstub_compute_signal(unsigned long tbr);
+static int hex(unsigned char ch);
+static int hexToInt(char **ptr, unsigned long *intValue);
+static unsigned char *mem2hex(const void *mem, char *buf, int count, int
may_fault);
+static char *hex2mem(const char *buf, void *_mem, int count);
+
+/*
+ * Convert ch from a hex digit to an int
+ */
+static int hex(unsigned char ch)
+{
+ if (ch >= 'a' && ch <= 'f')
+ return ch-'a'+10;
+ if (ch >= '0' && ch <= '9')
+ return ch-'0';
+ if (ch >= 'A' && ch <= 'F')
+ return ch-'A'+10;
+ return -1;
+}
+
+void gdbstub_printk(const char *fmt, ...)
+{
+ static char buf[1024];
+ va_list args;
+ int len;
+
+ /* Emit the output into the temporary buffer */
+ va_start(args, fmt);
+ len = vsnprintf(buf, sizeof(buf), fmt, args);
+ va_end(args);
+ debug_to_serial(buf, len);
+}
+
+static inline char *gdbstub_strcpy(char *dst, const char *src)
+{
+ int loop = 0;
+ while ((dst[loop] = src[loop]))
+ loop++;
+ return dst;
+}
+
+static void gdbstub_purge_cache(void)
+{
+ asm volatile(" dcef @(gr0,gr0),#1 \n"
+ " icei @(gr0,gr0),#1 \n"
+ " membar \n"
+ " bar \n"
+ );
+}
+
+/*****************************************************************************/
+/*
+ * scan for the sequence $<data>#<checksum>
+ */
+static void gdbstub_recv_packet(char *buffer)
+{
+ unsigned char checksum;
+ unsigned char xmitcsum;
+ unsigned char ch;
+ int count, i, ret, error;
+
+ for (;;) {
+ /* wait around for the start character, ignore all other
characters */
+ do {
+ gdbstub_rx_char(&ch, 0);
+ } while (ch != '$');
+
+ checksum = 0;
+ xmitcsum = -1;
+ count = 0;
+ error = 0;
+
+ /* now, read until a # or end of buffer is found */
+ while (count < BUFMAX) {
+ ret = gdbstub_rx_char(&ch, 0);
+ if (ret < 0)
+ error = ret;
+
+ if (ch == '#')
+ break;
+ checksum += ch;
+ buffer[count] = ch;
+ count++;
+ }
+
+ if (error == -EIO) {
+ gdbstub_proto("### GDB Rx Error - Skipping packet
###\n");
+ gdbstub_proto("### GDB Tx NAK\n");
+ gdbstub_tx_char('-');
+ continue;
+ }
+
+ if (count >= BUFMAX || error)
+ continue;
+
+ buffer[count] = 0;
+
+ /* read the checksum */
+ ret = gdbstub_rx_char(&ch, 0);
+ if (ret < 0)
+ error = ret;
+ xmitcsum = hex(ch) << 4;
+
+ ret = gdbstub_rx_char(&ch, 0);
+ if (ret < 0)
+ error = ret;
+ xmitcsum |= hex(ch);
+
+ if (error) {
+ if (error == -EIO)
+ gdbstub_proto("### GDB Rx Error - Skipping
packet\n");
+ gdbstub_proto("### GDB Tx NAK\n");
+ gdbstub_tx_char('-');
+ continue;
+ }
+
+ /* check the checksum */
+ if (checksum != xmitcsum) {
+ gdbstub_proto("### GDB Tx NAK\n");
+ gdbstub_tx_char('-'); /* failed checksum */
+ continue;
+ }
+
+ gdbstub_proto("### GDB Rx '$%s#%02x' ###\n", buffer, checksum);
+ gdbstub_proto("### GDB Tx ACK\n");
+ gdbstub_tx_char('+'); /* successful transfer */
+
+ /* if a sequence char is present, reply the sequence ID */
+ if (buffer[2] == ':') {
+ gdbstub_tx_char(buffer[0]);
+ gdbstub_tx_char(buffer[1]);
+
+ /* remove sequence chars from buffer */
+ count = 0;
+ while (buffer[count]) count++;
+ for (i=3; i <= count; i++)
+ buffer[i - 3] = buffer[i];
+ }
+
+ break;
+ }
+} /* end gdbstub_recv_packet() */
+
+/*****************************************************************************/
+/*
+ * send the packet in buffer.
+ * - return 0 if successfully ACK'd
+ * - return 1 if abandoned due to new incoming packet
+ */
+static int gdbstub_send_packet(char *buffer)
+{
+ unsigned char checksum;
+ int count;
+ unsigned char ch;
+
+ /* $<packet info>#<checksum> */
+ gdbstub_proto("### GDB Tx '%s' ###\n", buffer);
+
+ do {
+ gdbstub_tx_char('$');
+ checksum = 0;
+ count = 0;
+
+ while ((ch = buffer[count]) != 0) {
+ gdbstub_tx_char(ch);
+ checksum += ch;
+ count += 1;
+ }
+
+ gdbstub_tx_char('#');
+ gdbstub_tx_char(hexchars[checksum >> 4]);
+ gdbstub_tx_char(hexchars[checksum & 0xf]);
+
+ } while (gdbstub_rx_char(&ch,0),
+#ifdef GDBSTUB_DEBUG_PROTOCOL
+ ch=='-' && (gdbstub_proto("### GDB Rx NAK\n"),0),
+ ch!='-' && ch!='+' && (gdbstub_proto("### GDB Rx ???
%02x\n",ch),0),
+#endif
+ ch!='+' && ch!='$');
+
+ if (ch=='+') {
+ gdbstub_proto("### GDB Rx ACK\n");
[%d lines skipped]
1687diff -urN linux/arch/frv/kernel/head-mmu-fr451.S
linux/arch/frv/kernel/head-mmu-fr451.S
--- linux/arch/frv/kernel/head-mmu-fr451.S 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/head-mmu-fr451.S Thu Jan 13 14:05:22 2005
1.1
@@ -0,0 +1,374 @@
+/* head-mmu-fr451.S: FR451 mmu-linux specific bits of initialisation
+ *
+ * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/threads.h>
+#include <linux/linkage.h>
+#include <asm/ptrace.h>
+#include <asm/page.h>
+#include <asm/mem-layout.h>
+#include <asm/spr-regs.h>
+#include <asm/mb86943a.h>
+#include "head.inc"
+
+
+#define __400_DBR0 0xfe000e00
+#define __400_DBR1 0xfe000e08
+#define __400_DBR2 0xfe000e10
+#define __400_DBR3 0xfe000e18
+#define __400_DAM0 0xfe000f00
+#define __400_DAM1 0xfe000f08
+#define __400_DAM2 0xfe000f10
+#define __400_DAM3 0xfe000f18
+#define __400_LGCR 0xfe000010
+#define __400_LCR 0xfe000100
+#define __400_LSBR 0xfe000c00
+
+ .section .text.init,"ax"
+ .balign 4
+
+###############################################################################
+#
+# describe the position and layout of the SDRAM controller registers
+#
+# ENTRY: EXIT:
+# GR5 - cacheline size
+# GR11 - displacement of 2nd SDRAM addr reg from GR14
+# GR12 - displacement of 3rd SDRAM addr reg from GR14
+# GR13 - displacement of 4th SDRAM addr reg from GR14
+# GR14 - address of 1st SDRAM addr reg
+# GR15 - amount to shift address by to match SDRAM addr
reg
+# GR26 &__head_reference [saved]
+# GR30 LED address [saved]
+# CC0 - T if DBR0 is present
+# CC1 - T if DBR1 is present
+# CC2 - T if DBR2 is present
+# CC3 - T if DBR3 is present
+#
+###############################################################################
+ .globl __head_fr451_describe_sdram
+__head_fr451_describe_sdram:
+ sethi.p %hi(__400_DBR0),gr14
+ setlo %lo(__400_DBR0),gr14
+ setlos.p #__400_DBR1-__400_DBR0,gr11
+ setlos #__400_DBR2-__400_DBR0,gr12
+ setlos.p #__400_DBR3-__400_DBR0,gr13
+ setlos #32,gr5 ; cacheline size
+ setlos.p #0,gr15 ; amount to shift addr reg by
+ setlos #0x00ff,gr4
+ movgs gr4,cccr ; extant DARS/DAMK regs
+ bralr
+
+###############################################################################
+#
+# rearrange the bus controller registers
+#
+# ENTRY: EXIT:
+# GR26 &__head_reference [saved]
+# GR30 LED address revised LED address
+#
+###############################################################################
+ .globl __head_fr451_set_busctl
+__head_fr451_set_busctl:
+ sethi.p %hi(__400_LGCR),gr4
+ setlo %lo(__400_LGCR),gr4
+ sethi.p %hi(__400_LSBR),gr10
+ setlo %lo(__400_LSBR),gr10
+ sethi.p %hi(__400_LCR),gr11
+ setlo %lo(__400_LCR),gr11
+
+ # set the bus controller
+ ldi @(gr4,#0),gr5
+ ori gr5,#0xff,gr5 ; make sure all chip-selects
are enabled
+ sti gr5,@(gr4,#0)
+
+ sethi.p %hi(__region_CS1),gr4
+ setlo %lo(__region_CS1),gr4
+ sethi.p %hi(__region_CS1_M),gr5
+ setlo %lo(__region_CS1_M),gr5
+ sethi.p %hi(__region_CS1_C),gr6
+ setlo %lo(__region_CS1_C),gr6
+ sti gr4,@(gr10,#1*0x08)
+ sti gr5,@(gr10,#1*0x08+0x100)
+ sti gr6,@(gr11,#1*0x08)
+ sethi.p %hi(__region_CS2),gr4
+ setlo %lo(__region_CS2),gr4
+ sethi.p %hi(__region_CS2_M),gr5
+ setlo %lo(__region_CS2_M),gr5
+ sethi.p %hi(__region_CS2_C),gr6
+ setlo %lo(__region_CS2_C),gr6
+ sti gr4,@(gr10,#2*0x08)
+ sti gr5,@(gr10,#2*0x08+0x100)
+ sti gr6,@(gr11,#2*0x08)
+ sethi.p %hi(__region_CS3),gr4
+ setlo %lo(__region_CS3),gr4
+ sethi.p %hi(__region_CS3_M),gr5
+ setlo %lo(__region_CS3_M),gr5
+ sethi.p %hi(__region_CS3_C),gr6
+ setlo %lo(__region_CS3_C),gr6
+ sti gr4,@(gr10,#3*0x08)
+ sti gr5,@(gr10,#3*0x08+0x100)
+ sti gr6,@(gr11,#3*0x08)
+ sethi.p %hi(__region_CS4),gr4
+ setlo %lo(__region_CS4),gr4
+ sethi.p %hi(__region_CS4_M),gr5
+ setlo %lo(__region_CS4_M),gr5
+ sethi.p %hi(__region_CS4_C),gr6
+ setlo %lo(__region_CS4_C),gr6
+ sti gr4,@(gr10,#4*0x08)
+ sti gr5,@(gr10,#4*0x08+0x100)
+ sti gr6,@(gr11,#4*0x08)
+ sethi.p %hi(__region_CS5),gr4
+ setlo %lo(__region_CS5),gr4
+ sethi.p %hi(__region_CS5_M),gr5
+ setlo %lo(__region_CS5_M),gr5
+ sethi.p %hi(__region_CS5_C),gr6
+ setlo %lo(__region_CS5_C),gr6
+ sti gr4,@(gr10,#5*0x08)
+ sti gr5,@(gr10,#5*0x08+0x100)
+ sti gr6,@(gr11,#5*0x08)
+ sethi.p %hi(__region_CS6),gr4
+ setlo %lo(__region_CS6),gr4
+ sethi.p %hi(__region_CS6_M),gr5
+ setlo %lo(__region_CS6_M),gr5
+ sethi.p %hi(__region_CS6_C),gr6
+ setlo %lo(__region_CS6_C),gr6
+ sti gr4,@(gr10,#6*0x08)
+ sti gr5,@(gr10,#6*0x08+0x100)
+ sti gr6,@(gr11,#6*0x08)
+ sethi.p %hi(__region_CS7),gr4
+ setlo %lo(__region_CS7),gr4
+ sethi.p %hi(__region_CS7_M),gr5
+ setlo %lo(__region_CS7_M),gr5
+ sethi.p %hi(__region_CS7_C),gr6
+ setlo %lo(__region_CS7_C),gr6
+ sti gr4,@(gr10,#7*0x08)
+ sti gr5,@(gr10,#7*0x08+0x100)
+ sti gr6,@(gr11,#7*0x08)
+ membar
+ bar
+
+ # adjust LED bank address
+#ifdef CONFIG_MB93091_VDK
+ sethi.p %hi(__region_CS2 + 0x01200004),gr30
+ setlo %lo(__region_CS2 + 0x01200004),gr30
+#endif
+ bralr
+
+###############################################################################
+#
+# determine the total SDRAM size
+#
+# ENTRY: EXIT:
+# GR25 - SDRAM size
+# GR26 &__head_reference [saved]
+# GR30 LED address [saved]
+#
+###############################################################################
+ .globl __head_fr451_survey_sdram
+__head_fr451_survey_sdram:
+ sethi.p %hi(__400_DAM0),gr11
+ setlo %lo(__400_DAM0),gr11
+ sethi.p %hi(__400_DBR0),gr12
+ setlo %lo(__400_DBR0),gr12
+
+ sethi.p %hi(0xfe000000),gr17 ; unused SDRAM DBR value
+ setlo %lo(0xfe000000),gr17
+ setlos #0,gr25
+
+ ldi @(gr12,#0x00),gr4 ; DAR0
+ subcc gr4,gr17,gr0,icc0
+ beq icc0,#0,__head_no_DCS0
+ ldi @(gr11,#0x00),gr6 ; DAM0: bits 31:20
match addr 31:20
+ add gr25,gr6,gr25
+ addi gr25,#1,gr25
+__head_no_DCS0:
+
+ ldi @(gr12,#0x08),gr4 ; DAR1
+ subcc gr4,gr17,gr0,icc0
+ beq icc0,#0,__head_no_DCS1
+ ldi @(gr11,#0x08),gr6 ; DAM1: bits 31:20
match addr 31:20
+ add gr25,gr6,gr25
+ addi gr25,#1,gr25
+__head_no_DCS1:
+
+ ldi @(gr12,#0x10),gr4 ; DAR2
+ subcc gr4,gr17,gr0,icc0
+ beq icc0,#0,__head_no_DCS2
+ ldi @(gr11,#0x10),gr6 ; DAM2: bits 31:20
match addr 31:20
+ add gr25,gr6,gr25
+ addi gr25,#1,gr25
+__head_no_DCS2:
+
+ ldi @(gr12,#0x18),gr4 ; DAR3
+ subcc gr4,gr17,gr0,icc0
+ beq icc0,#0,__head_no_DCS3
+ ldi @(gr11,#0x18),gr6 ; DAM3: bits 31:20
match addr 31:20
+ add gr25,gr6,gr25
+ addi gr25,#1,gr25
+__head_no_DCS3:
+ bralr
+
+###############################################################################
+#
+# set the protection map with the I/DAMPR registers
+#
+# ENTRY: EXIT:
+# GR25 SDRAM size [saved]
+# GR26 &__head_reference [saved]
+# GR30 LED address [saved]
+#
+#
+# Using this map:
+# REGISTERS ADDRESS RANGE VIEW
+# =============== ====================== ===============================
+# IAMPR0/DAMPR0 0xC0000000-0xCFFFFFFF Cached kernel RAM Window
+# DAMPR11 0xE0000000-0xFFFFFFFF Uncached I/O
+#
+###############################################################################
+ .globl __head_fr451_set_protection
+__head_fr451_set_protection:
+ movsg lr,gr27
+
+ # set the I/O region protection registers for FR451 in MMU mode
+#define PGPROT_IO xAMPRx_L|xAMPRx_M|xAMPRx_S_KERNEL|xAMPRx_C|xAMPRx_V
+
+ sethi.p %hi(__region_IO),gr5
+ setlo %lo(__region_IO),gr5
+ setlos #PGPROT_IO|xAMPRx_SS_512Mb,gr4
+ or gr4,gr5,gr4
+ movgs gr5,damlr11 ; General I/O tile
+ movgs gr4,dampr11
+
+ # need to open a window onto at least part of the RAM for the kernel's
use
+ sethi.p %hi(__sdram_base),gr8
+ setlo %lo(__sdram_base),gr8 ; physical address
+ sethi.p %hi(__page_offset),gr9
+ setlo %lo(__page_offset),gr9 ; virtual address
+
+ setlos
#xAMPRx_L|xAMPRx_M|xAMPRx_SS_256Mb|xAMPRx_S_KERNEL|xAMPRx_V,gr11
+ or gr8,gr11,gr8
+
+ movgs gr9,iamlr0 ; mapped from real
address 0
+ movgs gr8,iampr0 ; cached kernel memory
at 0xC0000000
+ movgs gr9,damlr0
+ movgs gr8,dampr0
+
+ # set a temporary mapping for the kernel running at address 0 until
we've turned on the MMU
+ sethi.p %hi(__sdram_base),gr9
+ setlo %lo(__sdram_base),gr9 ; virtual address
+
+ and.p gr4,gr11,gr4
+ and gr5,gr11,gr5
+ or.p gr4,gr11,gr4
+ or gr5,gr11,gr5
+
+ movgs gr9,iamlr1 ; mapped from real
address 0
+ movgs gr8,iampr1 ; cached kernel memory
at 0x00000000
+ movgs gr9,damlr1
+ movgs gr8,dampr1
+
+ # we use DAMR2-10 for kmap_atomic(), cache flush and TLB management
+ # since the DAMLR regs are not going to change, we can set them now
+ # also set up IAMLR2 to the same as DAMLR5
+ sethi.p %hi(KMAP_ATOMIC_PRIMARY_FRAME),gr4
+ setlo %lo(KMAP_ATOMIC_PRIMARY_FRAME),gr4
+ sethi.p %hi(PAGE_SIZE),gr5
+ setlo %lo(PAGE_SIZE),gr5
+
+ movgs gr4,damlr2
+ movgs gr4,iamlr2
+ add gr4,gr5,gr4
+ movgs gr4,damlr3
+ add gr4,gr5,gr4
+ movgs gr4,damlr4
+ add gr4,gr5,gr4
+ movgs gr4,damlr5
+ add gr4,gr5,gr4
+ movgs gr4,damlr6
+ add gr4,gr5,gr4
+ movgs gr4,damlr7
+ add gr4,gr5,gr4
+ movgs gr4,damlr8
+ add gr4,gr5,gr4
+ movgs gr4,damlr9
+ add gr4,gr5,gr4
+ movgs gr4,damlr10
+
+ movgs gr0,dampr2
+ movgs gr0,dampr4
+ movgs gr0,dampr5
+ movgs gr0,dampr6
+ movgs gr0,dampr7
+ movgs gr0,dampr8
+ movgs gr0,dampr9
+ movgs gr0,dampr10
+
+ movgs gr0,iamlr3
+ movgs gr0,iamlr4
+ movgs gr0,iamlr5
+ movgs gr0,iamlr6
+ movgs gr0,iamlr7
+
+ movgs gr0,iampr2
+ movgs gr0,iampr3
+ movgs gr0,iampr4
+ movgs gr0,iampr5
+ movgs gr0,iampr6
+ movgs gr0,iampr7
+
+ # start in TLB context 0 with the swapper's page tables
+ movgs gr0,cxnr
+
+ sethi.p %hi(swapper_pg_dir),gr4
+ setlo %lo(swapper_pg_dir),gr4
+ sethi.p %hi(__page_offset),gr5
+ setlo %lo(__page_offset),gr5
+ sub gr4,gr5,gr4
+ movgs gr4,ttbr
+ setlos
#xAMPRx_L|xAMPRx_M|xAMPRx_SS_16Kb|xAMPRx_S|xAMPRx_C|xAMPRx_V,gr5
+ or gr4,gr5,gr4
+ movgs gr4,dampr3
+
+ # the FR451 also has an extra trap base register
+ movsg tbr,gr4
+ movgs gr4,btbr
+
+ LEDS 0x3300
+ jmpl @(gr27,gr0)
+
+###############################################################################
+#
+# finish setting up the protection registers
+#
+###############################################################################
+ .globl __head_fr451_finalise_protection
+__head_fr451_finalise_protection:
+ # turn on the timers as appropriate
+ movgs gr0,timerh
+ movgs gr0,timerl
+ movgs gr0,timerd
+ movsg hsr0,gr4
+ sethi.p %hi(HSR0_ETMI),gr5
+ setlo %lo(HSR0_ETMI),gr5
+ or gr4,gr5,gr4
+ movgs gr4,hsr0
+
+ # clear the TLB entry cache
+ movgs gr0,iamlr1
+ movgs gr0,iampr1
+ movgs gr0,damlr1
+ movgs gr0,dampr1
+
+ # clear the PGE cache
+ sethi.p %hi(__flush_tlb_all),gr4
+ setlo %lo(__flush_tlb_all),gr4
+ jmpl @(gr4,gr0)
diff -urN linux/arch/frv/kernel/head-uc-fr401.S
linux/arch/frv/kernel/head-uc-fr401.S
--- linux/arch/frv/kernel/head-uc-fr401.S 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/head-uc-fr401.S Thu Jan 13 14:05:22 2005
1.1
@@ -0,0 +1,311 @@
+/* head-uc-fr401.S: FR401/3/5 uc-linux specific bits of initialisation
+ *
+ * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/threads.h>
+#include <linux/linkage.h>
+#include <asm/ptrace.h>
+#include <asm/page.h>
+#include <asm/spr-regs.h>
+#include <asm/mb86943a.h>
+#include "head.inc"
+
+
+#define __400_DBR0 0xfe000e00
+#define __400_DBR1 0xfe000e08
+#define __400_DBR2 0xfe000e10 /* not on FR401 */
+#define __400_DBR3 0xfe000e18 /* not on FR401 */
+#define __400_DAM0 0xfe000f00
+#define __400_DAM1 0xfe000f08
+#define __400_DAM2 0xfe000f10 /* not on FR401 */
+#define __400_DAM3 0xfe000f18 /* not on FR401 */
+#define __400_LGCR 0xfe000010
+#define __400_LCR 0xfe000100
+#define __400_LSBR 0xfe000c00
+
+ .section .text.init,"ax"
+ .balign 4
+
+###############################################################################
+#
+# describe the position and layout of the SDRAM controller registers
+#
+# ENTRY: EXIT:
+# GR5 - cacheline size
+# GR11 - displacement of 2nd SDRAM addr reg from GR14
+# GR12 - displacement of 3rd SDRAM addr reg from GR14
+# GR13 - displacement of 4th SDRAM addr reg from GR14
+# GR14 - address of 1st SDRAM addr reg
+# GR15 - amount to shift address by to match SDRAM addr
reg
+# GR26 &__head_reference [saved]
+# GR30 LED address [saved]
+# CC0 - T if DBR0 is present
+# CC1 - T if DBR1 is present
+# CC2 - T if DBR2 is present (not FR401/FR401A)
+# CC3 - T if DBR3 is present (not FR401/FR401A)
+#
+###############################################################################
+ .globl __head_fr401_describe_sdram
+__head_fr401_describe_sdram:
+ sethi.p %hi(__400_DBR0),gr14
+ setlo %lo(__400_DBR0),gr14
+ setlos.p #__400_DBR1-__400_DBR0,gr11
+ setlos #__400_DBR2-__400_DBR0,gr12
+ setlos.p #__400_DBR3-__400_DBR0,gr13
+ setlos #32,gr5 ; cacheline size
+ setlos.p #0,gr15 ; amount to shift addr reg by
+
+ # specify which DBR regs are present
+ setlos #0x00ff,gr4
+ movgs gr4,cccr
+ movsg psr,gr3 ; check for FR401/FR401A
+ srli gr3,#25,gr3
+ subicc gr3,#0x20>>1,gr0,icc0
+ bnelr icc0,#1
+ setlos #0x000f,gr4
+ movgs gr4,cccr
+ bralr
+
+###############################################################################
+#
+# rearrange the bus controller registers
+#
+# ENTRY: EXIT:
+# GR26 &__head_reference [saved]
+# GR30 LED address revised LED address
+#
+###############################################################################
+ .globl __head_fr401_set_busctl
+__head_fr401_set_busctl:
+ sethi.p %hi(__400_LGCR),gr4
+ setlo %lo(__400_LGCR),gr4
+ sethi.p %hi(__400_LSBR),gr10
+ setlo %lo(__400_LSBR),gr10
+ sethi.p %hi(__400_LCR),gr11
+ setlo %lo(__400_LCR),gr11
+
+ # set the bus controller
+ ldi @(gr4,#0),gr5
+ ori gr5,#0xff,gr5 ; make sure all chip-selects
are enabled
+ sti gr5,@(gr4,#0)
+
+ sethi.p %hi(__region_CS1),gr4
+ setlo %lo(__region_CS1),gr4
+ sethi.p %hi(__region_CS1_M),gr5
+ setlo %lo(__region_CS1_M),gr5
+ sethi.p %hi(__region_CS1_C),gr6
+ setlo %lo(__region_CS1_C),gr6
+ sti gr4,@(gr10,#1*0x08)
+ sti gr5,@(gr10,#1*0x08+0x100)
+ sti gr6,@(gr11,#1*0x08)
+ sethi.p %hi(__region_CS2),gr4
+ setlo %lo(__region_CS2),gr4
+ sethi.p %hi(__region_CS2_M),gr5
+ setlo %lo(__region_CS2_M),gr5
+ sethi.p %hi(__region_CS2_C),gr6
+ setlo %lo(__region_CS2_C),gr6
+ sti gr4,@(gr10,#2*0x08)
+ sti gr5,@(gr10,#2*0x08+0x100)
+ sti gr6,@(gr11,#2*0x08)
+ sethi.p %hi(__region_CS3),gr4
+ setlo %lo(__region_CS3),gr4
+ sethi.p %hi(__region_CS3_M),gr5
+ setlo %lo(__region_CS3_M),gr5
+ sethi.p %hi(__region_CS3_C),gr6
+ setlo %lo(__region_CS3_C),gr6
+ sti gr4,@(gr10,#3*0x08)
+ sti gr5,@(gr10,#3*0x08+0x100)
+ sti gr6,@(gr11,#3*0x08)
+ sethi.p %hi(__region_CS4),gr4
+ setlo %lo(__region_CS4),gr4
+ sethi.p %hi(__region_CS4_M),gr5
+ setlo %lo(__region_CS4_M),gr5
+ sethi.p %hi(__region_CS4_C),gr6
+ setlo %lo(__region_CS4_C),gr6
+ sti gr4,@(gr10,#4*0x08)
+ sti gr5,@(gr10,#4*0x08+0x100)
+ sti gr6,@(gr11,#4*0x08)
+ sethi.p %hi(__region_CS5),gr4
+ setlo %lo(__region_CS5),gr4
+ sethi.p %hi(__region_CS5_M),gr5
+ setlo %lo(__region_CS5_M),gr5
+ sethi.p %hi(__region_CS5_C),gr6
+ setlo %lo(__region_CS5_C),gr6
+ sti gr4,@(gr10,#5*0x08)
+ sti gr5,@(gr10,#5*0x08+0x100)
+ sti gr6,@(gr11,#5*0x08)
+ sethi.p %hi(__region_CS6),gr4
+ setlo %lo(__region_CS6),gr4
+ sethi.p %hi(__region_CS6_M),gr5
+ setlo %lo(__region_CS6_M),gr5
+ sethi.p %hi(__region_CS6_C),gr6
+ setlo %lo(__region_CS6_C),gr6
+ sti gr4,@(gr10,#6*0x08)
+ sti gr5,@(gr10,#6*0x08+0x100)
+ sti gr6,@(gr11,#6*0x08)
+ sethi.p %hi(__region_CS7),gr4
+ setlo %lo(__region_CS7),gr4
+ sethi.p %hi(__region_CS7_M),gr5
+ setlo %lo(__region_CS7_M),gr5
+ sethi.p %hi(__region_CS7_C),gr6
+ setlo %lo(__region_CS7_C),gr6
+ sti gr4,@(gr10,#7*0x08)
+ sti gr5,@(gr10,#7*0x08+0x100)
+ sti gr6,@(gr11,#7*0x08)
+ membar
+ bar
+
+ # adjust LED bank address
+ sethi.p %hi(LED_ADDR - 0x20000000 +__region_CS2),gr30
+ setlo %lo(LED_ADDR - 0x20000000 +__region_CS2),gr30
+ bralr
+
+###############################################################################
+#
+# determine the total SDRAM size
+#
+# ENTRY: EXIT:
+# GR25 - SDRAM size
+# GR26 &__head_reference [saved]
+# GR30 LED address [saved]
+#
+###############################################################################
+ .globl __head_fr401_survey_sdram
+__head_fr401_survey_sdram:
+ sethi.p %hi(__400_DAM0),gr11
+ setlo %lo(__400_DAM0),gr11
+ sethi.p %hi(__400_DBR0),gr12
+ setlo %lo(__400_DBR0),gr12
+
+ sethi.p %hi(0xfe000000),gr17 ; unused SDRAM DBR value
+ setlo %lo(0xfe000000),gr17
+ setlos #0,gr25
+
+ ldi @(gr12,#0x00),gr4 ; DAR0
+ subcc gr4,gr17,gr0,icc0
+ beq icc0,#0,__head_no_DCS0
+ ldi @(gr11,#0x00),gr6 ; DAM0: bits 31:20
match addr 31:20
+ add gr25,gr6,gr25
+ addi gr25,#1,gr25
+__head_no_DCS0:
+
+ ldi @(gr12,#0x08),gr4 ; DAR1
+ subcc gr4,gr17,gr0,icc0
+ beq icc0,#0,__head_no_DCS1
+ ldi @(gr11,#0x08),gr6 ; DAM1: bits 31:20
match addr 31:20
+ add gr25,gr6,gr25
+ addi gr25,#1,gr25
+__head_no_DCS1:
+
+ # FR401/FR401A does not have DCS2/3
+ movsg psr,gr3
+ srli gr3,#25,gr3
+ subicc gr3,#0x20>>1,gr0,icc0
+ beq icc0,#0,__head_no_DCS3
+
+ ldi @(gr12,#0x10),gr4 ; DAR2
+ subcc gr4,gr17,gr0,icc0
+ beq icc0,#0,__head_no_DCS2
+ ldi @(gr11,#0x10),gr6 ; DAM2: bits 31:20
match addr 31:20
+ add gr25,gr6,gr25
+ addi gr25,#1,gr25
+__head_no_DCS2:
+
+ ldi @(gr12,#0x18),gr4 ; DAR3
+ subcc gr4,gr17,gr0,icc0
+ beq icc0,#0,__head_no_DCS3
+ ldi @(gr11,#0x18),gr6 ; DAM3: bits 31:20
match addr 31:20
+ add gr25,gr6,gr25
+ addi gr25,#1,gr25
+__head_no_DCS3:
+ bralr
+
+###############################################################################
+#
+# set the protection map with the I/DAMPR registers
+#
+# ENTRY: EXIT:
+# GR25 SDRAM size [saved]
+# GR26 &__head_reference [saved]
+# GR30 LED address [saved]
+#
+###############################################################################
+ .globl __head_fr401_set_protection
+__head_fr401_set_protection:
+ movsg lr,gr27
+
+ # set the I/O region protection registers for FR401/3/5
+ sethi.p %hi(__region_IO),gr5
+ setlo %lo(__region_IO),gr5
+ ori
gr5,#xAMPRx_SS_512Mb|xAMPRx_S_KERNEL|xAMPRx_C|xAMPRx_V,gr5
+ movgs gr0,iampr7
+ movgs gr5,dampr7 ; General I/O tile
+
+ # need to tile the remaining IAMPR/DAMPR registers to cover as much of
the RAM as possible
+ # - start with the highest numbered registers
+ sethi.p %hi(__kernel_image_end),gr8
+ setlo %lo(__kernel_image_end),gr8
+ sethi.p %hi(32768),gr4 ; allow for a maximal
allocator bitmap
+ setlo %lo(32768),gr4
+ add gr8,gr4,gr8
+ sethi.p %hi(1024*2048-1),gr4 ; round up to nearest
2MiB
+ setlo %lo(1024*2048-1),gr4
+ add.p gr8,gr4,gr8
+ not gr4,gr4
+ and gr8,gr4,gr8
+
+ sethi.p %hi(__page_offset),gr9
+ setlo %lo(__page_offset),gr9
+ add gr9,gr25,gr9
+
+ # GR8 = base of uncovered RAM
+ # GR9 = top of uncovered RAM
+
+#ifdef CONFIG_MB93093_PDK
+ sethi.p %hi(__region_CS2),gr4
+ setlo %lo(__region_CS2),gr4
+ ori gr4,#xAMPRx_SS_1Mb|xAMPRx_S_KERNEL|xAMPRx_C|xAMPRx_V,gr4
+ movgs gr4,dampr6
+ movgs gr0,iampr6
+#else
+ call __head_split_region
+ movgs gr4,iampr6
+ movgs gr5,dampr6
+#endif
+ call __head_split_region
+ movgs gr4,iampr5
+ movgs gr5,dampr5
+ call __head_split_region
+ movgs gr4,iampr4
+ movgs gr5,dampr4
+ call __head_split_region
+ movgs gr4,iampr3
+ movgs gr5,dampr3
+ call __head_split_region
+ movgs gr4,iampr2
+ movgs gr5,dampr2
+ call __head_split_region
+ movgs gr4,iampr1
+ movgs gr5,dampr1
+
+ # cover kernel core image with kernel-only segment
+ sethi.p %hi(__page_offset),gr8
+ setlo %lo(__page_offset),gr8
+ call __head_split_region
+
+#ifdef CONFIG_PROTECT_KERNEL
+ ori.p gr4,#xAMPRx_S_KERNEL,gr4
+ ori gr5,#xAMPRx_S_KERNEL,gr5
+#endif
+
+ movgs gr4,iampr0
+ movgs gr5,dampr0
+ jmpl @(gr27,gr0)
diff -urN linux/arch/frv/kernel/head-uc-fr451.S
linux/arch/frv/kernel/head-uc-fr451.S
--- linux/arch/frv/kernel/head-uc-fr451.S 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/head-uc-fr451.S Thu Jan 13 14:05:22 2005
1.1
@@ -0,0 +1,174 @@
+/* head-uc-fr451.S: FR451 uc-linux specific bits of initialisation
+ *
+ * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/threads.h>
+#include <linux/linkage.h>
+#include <asm/ptrace.h>
+#include <asm/page.h>
+#include <asm/spr-regs.h>
+#include <asm/mb86943a.h>
+#include "head.inc"
+
+
+#define __400_DBR0 0xfe000e00
+#define __400_DBR1 0xfe000e08
+#define __400_DBR2 0xfe000e10
+#define __400_DBR3 0xfe000e18
+#define __400_DAM0 0xfe000f00
+#define __400_DAM1 0xfe000f08
+#define __400_DAM2 0xfe000f10
+#define __400_DAM3 0xfe000f18
+#define __400_LGCR 0xfe000010
+#define __400_LCR 0xfe000100
+#define __400_LSBR 0xfe000c00
+
+ .section .text.init,"ax"
+ .balign 4
+
+###############################################################################
+#
+# set the protection map with the I/DAMPR registers
+#
+# ENTRY: EXIT:
+# GR25 SDRAM size [saved]
+# GR26 &__head_reference [saved]
+# GR30 LED address [saved]
+#
+###############################################################################
+ .globl __head_fr451_set_protection
+__head_fr451_set_protection:
+ movsg lr,gr27
+
+ movgs gr0,dampr10
+ movgs gr0,damlr10
+ movgs gr0,dampr9
+ movgs gr0,damlr9
+ movgs gr0,dampr8
+ movgs gr0,damlr8
+
+ # set the I/O region protection registers for FR401/3/5
+ sethi.p %hi(__region_IO),gr5
+ setlo %lo(__region_IO),gr5
+ sethi.p %hi(0x1fffffff),gr7
+ setlo %lo(0x1fffffff),gr7
+ ori
gr5,#xAMPRx_SS_512Mb|xAMPRx_S_KERNEL|xAMPRx_C|xAMPRx_V,gr5
+ movgs gr5,dampr11 ; General I/O tile
+ movgs gr7,damlr11
+
+ # need to tile the remaining IAMPR/DAMPR registers to cover as much of
the RAM as possible
+ # - start with the highest numbered registers
+ sethi.p %hi(__kernel_image_end),gr8
+ setlo %lo(__kernel_image_end),gr8
+ sethi.p %hi(32768),gr4 ; allow for a maximal
allocator bitmap
+ setlo %lo(32768),gr4
+ add gr8,gr4,gr8
+ sethi.p %hi(1024*2048-1),gr4 ; round up to nearest
2MiB
+ setlo %lo(1024*2048-1),gr4
+ add.p gr8,gr4,gr8
+ not gr4,gr4
+ and gr8,gr4,gr8
+
+ sethi.p %hi(__page_offset),gr9
+ setlo %lo(__page_offset),gr9
+ add gr9,gr25,gr9
+
+ sethi.p %hi(0xffffc000),gr11
+ setlo %lo(0xffffc000),gr11
+
+ # GR8 = base of uncovered RAM
+ # GR9 = top of uncovered RAM
+ # GR11 = xAMLR mask
+ LEDS 0x3317
+ call __head_split_region
+ movgs gr4,iampr7
+ movgs gr6,iamlr7
+ movgs gr5,dampr7
+ movgs gr7,damlr7
+
+ LEDS 0x3316
+ call __head_split_region
+ movgs gr4,iampr6
+ movgs gr6,iamlr6
+ movgs gr5,dampr6
+ movgs gr7,damlr6
+
+ LEDS 0x3315
+ call __head_split_region
+ movgs gr4,iampr5
+ movgs gr6,iamlr5
+ movgs gr5,dampr5
+ movgs gr7,damlr5
+
+ LEDS 0x3314
+ call __head_split_region
+ movgs gr4,iampr4
+ movgs gr6,iamlr4
+ movgs gr5,dampr4
+ movgs gr7,damlr4
+
+ LEDS 0x3313
+ call __head_split_region
+ movgs gr4,iampr3
+ movgs gr6,iamlr3
+ movgs gr5,dampr3
+ movgs gr7,damlr3
+
+ LEDS 0x3312
+ call __head_split_region
+ movgs gr4,iampr2
+ movgs gr6,iamlr2
+ movgs gr5,dampr2
+ movgs gr7,damlr2
+
+ LEDS 0x3311
+ call __head_split_region
+ movgs gr4,iampr1
+ movgs gr6,iamlr1
+ movgs gr5,dampr1
+ movgs gr7,damlr1
+
+ # cover kernel core image with kernel-only segment
+ LEDS 0x3310
+ sethi.p %hi(__page_offset),gr8
+ setlo %lo(__page_offset),gr8
+ call __head_split_region
+
+#ifdef CONFIG_PROTECT_KERNEL
+ ori.p gr4,#xAMPRx_S_KERNEL,gr4
+ ori gr5,#xAMPRx_S_KERNEL,gr5
+#endif
+
+ movgs gr4,iampr0
+ movgs gr6,iamlr0
+ movgs gr5,dampr0
+ movgs gr7,damlr0
+
+ # start in TLB context 0 with no page tables
+ movgs gr0,cxnr
+ movgs gr0,ttbr
+
+ # the FR451 also has an extra trap base register
+ movsg tbr,gr4
+ movgs gr4,btbr
+
+ # turn on the timers as appropriate
+ movgs gr0,timerh
+ movgs gr0,timerl
+ movgs gr0,timerd
+ movsg hsr0,gr4
+ sethi.p %hi(HSR0_ETMI),gr5
+ setlo %lo(HSR0_ETMI),gr5
+ or gr4,gr5,gr4
+ movgs gr4,hsr0
+
+ LEDS 0x3300
+ jmpl @(gr27,gr0)
diff -urN linux/arch/frv/kernel/head-uc-fr555.S
linux/arch/frv/kernel/head-uc-fr555.S
--- linux/arch/frv/kernel/head-uc-fr555.S 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/head-uc-fr555.S Thu Jan 13 14:05:22 2005
1.1
@@ -0,0 +1,347 @@
+/* head-uc-fr555.S: FR555 uc-linux specific bits of initialisation
+ *
+ * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/threads.h>
+#include <linux/linkage.h>
+#include <asm/ptrace.h>
+#include <asm/page.h>
+#include <asm/spr-regs.h>
+#include <asm/mb86943a.h>
+#include "head.inc"
+
+
+#define __551_DARS0 0xfeff0100
+#define __551_DARS1 0xfeff0104
+#define __551_DARS2 0xfeff0108
+#define __551_DARS3 0xfeff010c
+#define __551_DAMK0 0xfeff0110
+#define __551_DAMK1 0xfeff0114
+#define __551_DAMK2 0xfeff0118
+#define __551_DAMK3 0xfeff011c
+#define __551_LCR 0xfeff1100
+#define __551_LSBR 0xfeff1c00
+
+ .section .text.init,"ax"
+ .balign 4
+
+###############################################################################
+#
+# describe the position and layout of the SDRAM controller registers
+#
+# ENTRY: EXIT:
+# GR5 - cacheline size
+# GR11 - displacement of 2nd SDRAM addr reg from GR14
+# GR12 - displacement of 3rd SDRAM addr reg from GR14
+# GR13 - displacement of 4th SDRAM addr reg from GR14
+# GR14 - address of 1st SDRAM addr reg
+# GR15 - amount to shift address by to match SDRAM addr
reg
+# GR26 &__head_reference [saved]
+# GR30 LED address [saved]
+# CC0 - T if DARS0 is present
+# CC1 - T if DARS1 is present
+# CC2 - T if DARS2 is present
+# CC3 - T if DARS3 is present
+#
+###############################################################################
+ .globl __head_fr555_describe_sdram
+__head_fr555_describe_sdram:
+ sethi.p %hi(__551_DARS0),gr14
+ setlo %lo(__551_DARS0),gr14
+ setlos.p #__551_DARS1-__551_DARS0,gr11
+ setlos #__551_DARS2-__551_DARS0,gr12
+ setlos.p #__551_DARS3-__551_DARS0,gr13
+ setlos #64,gr5 ; cacheline size
+ setlos #20,gr15 ; amount to shift addr by
+ setlos #0x00ff,gr4
+ movgs gr4,cccr ; extant DARS/DAMK regs
+ bralr
+
+###############################################################################
+#
+# rearrange the bus controller registers
+#
+# ENTRY: EXIT:
+# GR26 &__head_reference [saved]
+# GR30 LED address revised LED address
+#
+###############################################################################
+ .globl __head_fr555_set_busctl
+__head_fr555_set_busctl:
+ LEDS 0x100f
+ sethi.p %hi(__551_LSBR),gr10
+ setlo %lo(__551_LSBR),gr10
+ sethi.p %hi(__551_LCR),gr11
+ setlo %lo(__551_LCR),gr11
+
+ # set the bus controller
+ sethi.p %hi(__region_CS1),gr4
+ setlo %lo(__region_CS1),gr4
+ sethi.p %hi(__region_CS1_M),gr5
+ setlo %lo(__region_CS1_M),gr5
+ sethi.p %hi(__region_CS1_C),gr6
+ setlo %lo(__region_CS1_C),gr6
+ sti gr4,@(gr10,#1*0x08)
+ sti gr5,@(gr10,#1*0x08+0x100)
+ sti gr6,@(gr11,#1*0x08)
+ sethi.p %hi(__region_CS2),gr4
+ setlo %lo(__region_CS2),gr4
+ sethi.p %hi(__region_CS2_M),gr5
+ setlo %lo(__region_CS2_M),gr5
+ sethi.p %hi(__region_CS2_C),gr6
+ setlo %lo(__region_CS2_C),gr6
+ sti gr4,@(gr10,#2*0x08)
+ sti gr5,@(gr10,#2*0x08+0x100)
+ sti gr6,@(gr11,#2*0x08)
+ sethi.p %hi(__region_CS3),gr4
+ setlo %lo(__region_CS3),gr4
+ sethi.p %hi(__region_CS3_M),gr5
+ setlo %lo(__region_CS3_M),gr5
+ sethi.p %hi(__region_CS3_C),gr6
+ setlo %lo(__region_CS3_C),gr6
+ sti gr4,@(gr10,#3*0x08)
+ sti gr5,@(gr10,#3*0x08+0x100)
+ sti gr6,@(gr11,#3*0x08)
+ sethi.p %hi(__region_CS4),gr4
+ setlo %lo(__region_CS4),gr4
+ sethi.p %hi(__region_CS4_M),gr5
+ setlo %lo(__region_CS4_M),gr5
+ sethi.p %hi(__region_CS4_C),gr6
+ setlo %lo(__region_CS4_C),gr6
+ sti gr4,@(gr10,#4*0x08)
+ sti gr5,@(gr10,#4*0x08+0x100)
+ sti gr6,@(gr11,#4*0x08)
+ sethi.p %hi(__region_CS5),gr4
+ setlo %lo(__region_CS5),gr4
+ sethi.p %hi(__region_CS5_M),gr5
+ setlo %lo(__region_CS5_M),gr5
+ sethi.p %hi(__region_CS5_C),gr6
+ setlo %lo(__region_CS5_C),gr6
+ sti gr4,@(gr10,#5*0x08)
+ sti gr5,@(gr10,#5*0x08+0x100)
+ sti gr6,@(gr11,#5*0x08)
+ sethi.p %hi(__region_CS6),gr4
+ setlo %lo(__region_CS6),gr4
+ sethi.p %hi(__region_CS6_M),gr5
+ setlo %lo(__region_CS6_M),gr5
+ sethi.p %hi(__region_CS6_C),gr6
+ setlo %lo(__region_CS6_C),gr6
+ sti gr4,@(gr10,#6*0x08)
+ sti gr5,@(gr10,#6*0x08+0x100)
+ sti gr6,@(gr11,#6*0x08)
+ sethi.p %hi(__region_CS7),gr4
+ setlo %lo(__region_CS7),gr4
+ sethi.p %hi(__region_CS7_M),gr5
+ setlo %lo(__region_CS7_M),gr5
+ sethi.p %hi(__region_CS7_C),gr6
+ setlo %lo(__region_CS7_C),gr6
+ sti gr4,@(gr10,#7*0x08)
+ sti gr5,@(gr10,#7*0x08+0x100)
+ sti gr6,@(gr11,#7*0x08)
+ membar
+ bar
+
+ # adjust LED bank address
+#ifdef CONFIG_MB93091_VDK
+ sethi.p %hi(LED_ADDR - 0x20000000 +__region_CS2),gr30
+ setlo %lo(LED_ADDR - 0x20000000 +__region_CS2),gr30
+#endif
+ bralr
+
+###############################################################################
+#
+# determine the total SDRAM size
+#
+# ENTRY: EXIT:
+# GR25 - SDRAM size
+# GR26 &__head_reference [saved]
+# GR30 LED address [saved]
+#
+###############################################################################
+ .globl __head_fr555_survey_sdram
+__head_fr555_survey_sdram:
+ sethi.p %hi(__551_DAMK0),gr11
+ setlo %lo(__551_DAMK0),gr11
+ sethi.p %hi(__551_DARS0),gr12
+ setlo %lo(__551_DARS0),gr12
+
+ sethi.p %hi(0xfff),gr17 ; unused SDRAM AMK value
+ setlo %lo(0xfff),gr17
+ setlos #0,gr25
+
+ ldi @(gr11,#0x00),gr6 ; DAMK0: bits 11:0
match addr 11:0
+ subcc gr6,gr17,gr0,icc0
+ beq icc0,#0,__head_no_DCS0
+ ldi @(gr12,#0x00),gr4 ; DARS0
+ add gr25,gr6,gr25
+ addi gr25,#1,gr25
+__head_no_DCS0:
+
+ ldi @(gr11,#0x04),gr6 ; DAMK1: bits 11:0
match addr 11:0
+ subcc gr6,gr17,gr0,icc0
+ beq icc0,#0,__head_no_DCS1
+ ldi @(gr12,#0x04),gr4 ; DARS1
+ add gr25,gr6,gr25
+ addi gr25,#1,gr25
+__head_no_DCS1:
+
+ ldi @(gr11,#0x8),gr6 ; DAMK2: bits 11:0
match addr 11:0
+ subcc gr6,gr17,gr0,icc0
+ beq icc0,#0,__head_no_DCS2
+ ldi @(gr12,#0x8),gr4 ; DARS2
+ add gr25,gr6,gr25
+ addi gr25,#1,gr25
+__head_no_DCS2:
+
+ ldi @(gr11,#0xc),gr6 ; DAMK3: bits 11:0
match addr 11:0
+ subcc gr6,gr17,gr0,icc0
+ beq icc0,#0,__head_no_DCS3
+ ldi @(gr12,#0xc),gr4 ; DARS3
+ add gr25,gr6,gr25
+ addi gr25,#1,gr25
+__head_no_DCS3:
+
+ slli gr25,#20,gr25 ; shift [11:0] ->
[31:20]
+ bralr
+
+###############################################################################
+#
+# set the protection map with the I/DAMPR registers
+#
+# ENTRY: EXIT:
+# GR25 SDRAM size saved
+# GR30 LED address saved
+#
+###############################################################################
+ .globl __head_fr555_set_protection
+__head_fr555_set_protection:
+ movsg lr,gr27
+
+ sethi.p %hi(0xfff00000),gr11
+ setlo %lo(0xfff00000),gr11
+
+ # set the I/O region protection registers for FR555
+ sethi.p %hi(__region_IO),gr7
+ setlo %lo(__region_IO),gr7
+ ori
gr7,#xAMPRx_SS_512Mb|xAMPRx_S_KERNEL|xAMPRx_C|xAMPRx_V,gr5
+ movgs gr0,iampr15
+ movgs gr0,iamlr15
+ movgs gr5,dampr15
+ movgs gr7,damlr15
+
+ # need to tile the remaining IAMPR/DAMPR registers to cover as much of
the RAM as possible
+ # - start with the highest numbered registers
+ sethi.p %hi(__kernel_image_end),gr8
+ setlo %lo(__kernel_image_end),gr8
+ sethi.p %hi(32768),gr4 ; allow for a maximal
allocator bitmap
+ setlo %lo(32768),gr4
+ add gr8,gr4,gr8
+ sethi.p %hi(1024*2048-1),gr4 ; round up to nearest
2MiB
+ setlo %lo(1024*2048-1),gr4
+ add.p gr8,gr4,gr8
+ not gr4,gr4
+ and gr8,gr4,gr8
+
+ sethi.p %hi(__page_offset),gr9
+ setlo %lo(__page_offset),gr9
+ add gr9,gr25,gr9
+
+ # GR8 = base of uncovered RAM
+ # GR9 = top of uncovered RAM
+ # GR11 - mask for DAMLR/IAMLR regs
+ #
+ call __head_split_region
+ movgs gr4,iampr14
+ movgs gr6,iamlr14
+ movgs gr5,dampr14
+ movgs gr7,damlr14
+ call __head_split_region
+ movgs gr4,iampr13
+ movgs gr6,iamlr13
+ movgs gr5,dampr13
+ movgs gr7,damlr13
+ call __head_split_region
+ movgs gr4,iampr12
+ movgs gr6,iamlr12
+ movgs gr5,dampr12
+ movgs gr7,damlr12
+ call __head_split_region
+ movgs gr4,iampr11
+ movgs gr6,iamlr11
+ movgs gr5,dampr11
+ movgs gr7,damlr11
+ call __head_split_region
+ movgs gr4,iampr10
+ movgs gr6,iamlr10
+ movgs gr5,dampr10
+ movgs gr7,damlr10
+ call __head_split_region
+ movgs gr4,iampr9
+ movgs gr6,iamlr9
+ movgs gr5,dampr9
+ movgs gr7,damlr9
+ call __head_split_region
+ movgs gr4,iampr8
+ movgs gr6,iamlr8
+ movgs gr5,dampr8
+ movgs gr7,damlr8
+
+ call __head_split_region
+ movgs gr4,iampr7
+ movgs gr6,iamlr7
+ movgs gr5,dampr7
+ movgs gr7,damlr7
+ call __head_split_region
+ movgs gr4,iampr6
+ movgs gr6,iamlr6
+ movgs gr5,dampr6
+ movgs gr7,damlr6
+ call __head_split_region
+ movgs gr4,iampr5
+ movgs gr6,iamlr5
+ movgs gr5,dampr5
+ movgs gr7,damlr5
+ call __head_split_region
+ movgs gr4,iampr4
+ movgs gr6,iamlr4
+ movgs gr5,dampr4
+ movgs gr7,damlr4
+ call __head_split_region
+ movgs gr4,iampr3
+ movgs gr6,iamlr3
+ movgs gr5,dampr3
+ movgs gr7,damlr3
+ call __head_split_region
+ movgs gr4,iampr2
+ movgs gr6,iamlr2
+ movgs gr5,dampr2
+ movgs gr7,damlr2
+ call __head_split_region
+ movgs gr4,iampr1
+ movgs gr6,iamlr1
+ movgs gr5,dampr1
+ movgs gr7,damlr1
+
+ # cover kernel core image with kernel-only segment
+ sethi.p %hi(__page_offset),gr8
+ setlo %lo(__page_offset),gr8
+ call __head_split_region
+
+#ifdef CONFIG_PROTECT_KERNEL
+ ori.p gr4,#xAMPRx_S_KERNEL,gr4
+ ori gr5,#xAMPRx_S_KERNEL,gr5
+#endif
+
+ movgs gr4,iampr0
+ movgs gr6,iamlr0
+ movgs gr5,dampr0
+ movgs gr7,damlr0
+ jmpl @(gr27,gr0)
diff -urN linux/arch/frv/kernel/head.S linux/arch/frv/kernel/head.S
--- linux/arch/frv/kernel/head.S 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/head.S Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,639 @@
+/* head.S: kernel entry point for FR-V kernel
+ *
+ * Copyright (C) 2003, 2004 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/threads.h>
+#include <linux/linkage.h>
+#include <asm/ptrace.h>
+#include <asm/page.h>
+#include <asm/spr-regs.h>
+#include <asm/mb86943a.h>
+#include <asm/cache.h>
+#include "head.inc"
+
+###############################################################################
+#
+# void _boot(unsigned long magic, char *command_line) __attribute__((noreturn))
+#
+# - if magic is 0xdead1eaf, then command_line is assumed to point to the kernel
+# command line string
+#
+###############################################################################
+ .section .text.head,"ax"
+ .balign 4
+
+ .globl _boot, __head_reference
+ .type _boot,@function
+_boot:
+__head_reference:
+ sethi.p %hi(LED_ADDR),gr30
+ setlo %lo(LED_ADDR),gr30
+
+ LEDS 0x0000
+
+ # calculate reference address for PC-relative stuff
+ call 0f
+0: movsg lr,gr26
+ addi gr26,#__head_reference-0b,gr26
+
+ # invalidate and disable both of the caches and turn off the memory
access checking
+ dcef @(gr0,gr0),1
+ bar
+
+ sethi.p
%hi(~(HSR0_ICE|HSR0_DCE|HSR0_CBM|HSR0_EIMMU|HSR0_EDMMU)),gr4
+ setlo
%lo(~(HSR0_ICE|HSR0_DCE|HSR0_CBM|HSR0_EIMMU|HSR0_EDMMU)),gr4
+ movsg hsr0,gr5
+ and gr4,gr5,gr5
+ movgs gr5,hsr0
+ movsg hsr0,gr5
+
+ LEDS 0x0001
+
+ icei @(gr0,gr0),1
+ dcei @(gr0,gr0),1
+ bar
+
+ # turn the instruction cache back on
+ sethi.p %hi(HSR0_ICE),gr4
+ setlo %lo(HSR0_ICE),gr4
+ movsg hsr0,gr5
+ or gr4,gr5,gr5
+ movgs gr5,hsr0
+ movsg hsr0,gr5
+
+ bar
+
+ LEDS 0x0002
+
+ # retrieve the parameters (including command line) before we overwrite
them
+ sethi.p %hi(0xdead1eaf),gr7
+ setlo %lo(0xdead1eaf),gr7
+ subcc gr7,gr8,gr0,icc0
+ bne icc0,#0,__head_no_parameters
+
+ sethi.p %hi(redboot_command_line-1),gr6
+ setlo %lo(redboot_command_line-1),gr6
+ sethi.p %hi(__head_reference),gr4
+ setlo %lo(__head_reference),gr4
+ sub gr6,gr4,gr6
+ add.p gr6,gr26,gr6
+ subi gr9,#1,gr9
+ setlos.p #511,gr4
+ setlos #1,gr5
+
+__head_copy_cmdline:
+ ldubu.p @(gr9,gr5),gr16
+ subicc gr4,#1,gr4,icc0
+ stbu.p gr16,@(gr6,gr5)
+ subicc gr16,#0,gr0,icc1
+ bls icc0,#0,__head_end_cmdline
+ bne icc1,#1,__head_copy_cmdline
+__head_end_cmdline:
+ stbu gr0,@(gr6,gr5)
+__head_no_parameters:
+
+###############################################################################
+#
+# we need to relocate the SDRAM to 0x00000000 (linux) or 0xC0000000 (uClinux)
+# - note that we're going to have to run entirely out of the icache whilst
+# fiddling with the SDRAM controller registers
+#
+###############################################################################
+#ifdef CONFIG_MMU
+ call __head_fr451_describe_sdram
+
+#else
+ movsg psr,gr5
+ srli gr5,#28,gr5
+ subicc gr5,#3,gr0,icc0
+ beq icc0,#0,__head_fr551_sdram
+
+ call __head_fr401_describe_sdram
+ bra __head_do_sdram
+
+__head_fr551_sdram:
+ call __head_fr555_describe_sdram
+ LEDS 0x000d
+
+__head_do_sdram:
+#endif
+
+ # preload the registers with invalid values in case any DBR/DARS are
marked not present
+ sethi.p %hi(0xfe000000),gr17 ; unused SDRAM DBR value
+ setlo %lo(0xfe000000),gr17
+ or.p gr17,gr0,gr20
+ or gr17,gr0,gr21
+ or.p gr17,gr0,gr22
+ or gr17,gr0,gr23
+
+ # consult the SDRAM controller CS address registers
+ cld @(gr14,gr0 ),gr20, cc0,#1 ; DBR0 / DARS0
+ cld @(gr14,gr11),gr21, cc1,#1 ; DBR1 / DARS1
+ cld @(gr14,gr12),gr22, cc2,#1 ; DBR2 / DARS2
+ cld.p @(gr14,gr13),gr23, cc3,#1 ; DBR3 / DARS3
+
+ sll gr20,gr15,gr20 ; shift values up for
FR551
+ sll gr21,gr15,gr21
+ sll gr22,gr15,gr22
+ sll gr23,gr15,gr23
+
+ LEDS 0x0003
+
+ # assume the lowest valid CS line to be the SDRAM base and get its
address
+ subcc gr20,gr17,gr0,icc0
+ subcc.p gr21,gr17,gr0,icc1
+ subcc gr22,gr17,gr0,icc2
+ subcc.p gr23,gr17,gr0,icc3
+ ckne icc0,cc4 ; T if DBR0 !=
0xfe000000
+ ckne icc1,cc5
+ ckne icc2,cc6
+ ckne icc3,cc7
+ cor gr23,gr0,gr24, cc7,#1 ; GR24 = SDRAM base
+ cor gr22,gr0,gr24, cc6,#1
+ cor gr21,gr0,gr24, cc5,#1
+ cor gr20,gr0,gr24, cc4,#1
+
+ # calculate the displacement required to get the SDRAM into the right
place in memory
+ sethi.p %hi(__sdram_base),gr16
+ setlo %lo(__sdram_base),gr16
+ sub gr16,gr24,gr16 ; delta = __sdram_base
- DBRx
+
+ # calculate the new values to go in the controller regs
+ cadd.p gr20,gr16,gr20, cc4,#1 ; DCS#0 (new) = DCS#0
(old) + delta
+ cadd gr21,gr16,gr21, cc5,#1
+ cadd.p gr22,gr16,gr22, cc6,#1
+ cadd gr23,gr16,gr23, cc7,#1
+
+ srl gr20,gr15,gr20 ; shift values down for
FR551
+ srl gr21,gr15,gr21
+ srl gr22,gr15,gr22
+ srl gr23,gr15,gr23
+
+ # work out the address at which the reg updater resides and lock it
into icache
+ # also work out the address the updater will jump to when finished
+ sethi.p %hi(__head_move_sdram-__head_reference),gr18
+ setlo %lo(__head_move_sdram-__head_reference),gr18
+ sethi.p %hi(__head_sdram_moved-__head_reference),gr19
+ setlo %lo(__head_sdram_moved-__head_reference),gr19
+ add.p gr18,gr26,gr18
+ add gr19,gr26,gr19
+ add.p gr19,gr16,gr19 ; moved = addr +
(__sdram_base - DBRx)
+ add gr18,gr5,gr4 ; two cachelines
probably required
+
+ icpl gr18,gr0,#1 ; load and lock the
cachelines
+ icpl gr4,gr0,#1
+ LEDS 0x0004
+ membar
+ bar
+ jmpl @(gr18,gr0)
+
+ .balign L1_CACHE_BYTES
+__head_move_sdram:
+ cst gr20,@(gr14,gr0 ), cc4,#1
+ cst gr21,@(gr14,gr11), cc5,#1
+ cst gr22,@(gr14,gr12), cc6,#1
+ cst gr23,@(gr14,gr13), cc7,#1
+ cld @(gr14,gr0 ),gr20, cc4,#1
+ cld @(gr14,gr11),gr21, cc5,#1
+ cld @(gr14,gr12),gr22, cc4,#1
+ cld @(gr14,gr13),gr23, cc7,#1
+ bar
+ membar
+ jmpl @(gr19,gr0)
+
+ .balign L1_CACHE_BYTES
+__head_sdram_moved:
+ icul gr18
+ add gr18,gr5,gr4
+ icul gr4
+ icei @(gr0,gr0),1
+ dcei @(gr0,gr0),1
+
+ LEDS 0x0005
+
+ # recalculate reference address
+ call 0f
+0: movsg lr,gr26
+ addi gr26,#__head_reference-0b,gr26
+
+
+###############################################################################
+#
+# move the kernel image down to the bottom of the SDRAM
+#
+###############################################################################
+ sethi.p %hi(__kernel_image_size_no_bss+15),gr4
+ setlo %lo(__kernel_image_size_no_bss+15),gr4
+ srli.p gr4,#4,gr4 ; count
+ or gr26,gr26,gr16 ; source
+
+ sethi.p %hi(__sdram_base),gr17 ; destination
+ setlo %lo(__sdram_base),gr17
+
+ setlos #8,gr5
+ sub.p gr16,gr5,gr16 ; adjust src for LDDU
+ sub gr17,gr5,gr17 ; adjust dst for LDDU
+
+ sethi.p %hi(__head_move_kernel-__head_reference),gr18
+ setlo %lo(__head_move_kernel-__head_reference),gr18
+ sethi.p
%hi(__head_kernel_moved-__head_reference+__sdram_base),gr19
+ setlo
%lo(__head_kernel_moved-__head_reference+__sdram_base),gr19
+ add gr18,gr26,gr18
+ icpl gr18,gr0,#1
+ jmpl @(gr18,gr0)
+
+ .balign 32
+__head_move_kernel:
+ lddu @(gr16,gr5),gr10
+ lddu @(gr16,gr5),gr12
+ stdu.p gr10,@(gr17,gr5)
+ subicc gr4,#1,gr4,icc0
+ stdu.p gr12,@(gr17,gr5)
+ bhi icc0,#0,__head_move_kernel
+ jmpl @(gr19,gr0)
+
+ .balign 32
+__head_kernel_moved:
+ icul gr18
+ icei @(gr0,gr0),1
+ dcei @(gr0,gr0),1
+
+ LEDS 0x0006
+
+ # recalculate reference address
+ call 0f
+0: movsg lr,gr26
+ addi gr26,#__head_reference-0b,gr26
+
+
+###############################################################################
+#
+# rearrange the iomem map and set the protection registers
+#
+###############################################################################
+
+#ifdef CONFIG_MMU
+ LEDS 0x3301
+ call __head_fr451_set_busctl
+ LEDS 0x3303
+ call __head_fr451_survey_sdram
+ LEDS 0x3305
+ call __head_fr451_set_protection
+
+#else
+ movsg psr,gr5
+ srli gr5,#PSR_IMPLE_SHIFT,gr5
+ subicc gr5,#PSR_IMPLE_FR551,gr0,icc0
+ beq icc0,#0,__head_fr555_memmap
+ subicc gr5,#PSR_IMPLE_FR451,gr0,icc0
+ beq icc0,#0,__head_fr451_memmap
+
+ LEDS 0x3101
+ call __head_fr401_set_busctl
+ LEDS 0x3103
+ call __head_fr401_survey_sdram
+ LEDS 0x3105
+ call __head_fr401_set_protection
+ bra __head_done_memmap
+
+__head_fr451_memmap:
+ LEDS 0x3301
+ call __head_fr401_set_busctl
+ LEDS 0x3303
+ call __head_fr401_survey_sdram
+ LEDS 0x3305
+ call __head_fr451_set_protection
+ bra __head_done_memmap
+
+__head_fr555_memmap:
+ LEDS 0x3501
+ call __head_fr555_set_busctl
+ LEDS 0x3503
+ call __head_fr555_survey_sdram
+ LEDS 0x3505
+ call __head_fr555_set_protection
+
+__head_done_memmap:
+#endif
+ LEDS 0x0007
+
+###############################################################################
+#
+# turn the data cache and MMU on
+# - for the FR451 this'll mean that the window through which the kernel is
+# viewed will change
+#
+###############################################################################
+
+#ifdef CONFIG_MMU
+#define MMUMODE
HSR0_EIMMU|HSR0_EDMMU|HSR0_EXMMU|HSR0_EDAT|HSR0_XEDAT
+#else
+#define MMUMODE HSR0_EIMMU|HSR0_EDMMU
+#endif
+
+ movsg hsr0,gr5
+
+ sethi.p %hi(MMUMODE),gr4
+ setlo %lo(MMUMODE),gr4
+ or gr4,gr5,gr5
+
+#if defined(CONFIG_FRV_DEFL_CACHE_WTHRU)
+ sethi.p %hi(HSR0_DCE|HSR0_CBM_WRITE_THRU),gr4
+ setlo %lo(HSR0_DCE|HSR0_CBM_WRITE_THRU),gr4
+#elif defined(CONFIG_FRV_DEFL_CACHE_WBACK)
+ sethi.p %hi(HSR0_DCE|HSR0_CBM_COPY_BACK),gr4
+ setlo %lo(HSR0_DCE|HSR0_CBM_COPY_BACK),gr4
+#elif defined(CONFIG_FRV_DEFL_CACHE_WBEHIND)
+ sethi.p %hi(HSR0_DCE|HSR0_CBM_COPY_BACK),gr4
+ setlo %lo(HSR0_DCE|HSR0_CBM_COPY_BACK),gr4
+
+ movsg psr,gr6
+ srli gr6,#24,gr6
+ cmpi gr6,#0x50,icc0 // FR451
+ beq icc0,#0,0f
+ cmpi gr6,#0x40,icc0 // FR405
+ bne icc0,#0,1f
+0:
+ # turn off write-allocate
+ sethi.p %hi(HSR0_NWA),gr6
+ setlo %lo(HSR0_NWA),gr6
+ or gr4,gr6,gr4
+1:
+
+#else
+#error No default cache configuration set
+#endif
+
+ or gr4,gr5,gr5
+ movgs gr5,hsr0
+ bar
+
+ LEDS 0x0008
+
+ sethi.p %hi(__head_mmu_enabled),gr19
+ setlo %lo(__head_mmu_enabled),gr19
+ jmpl @(gr19,gr0)
+
+__head_mmu_enabled:
+ icei @(gr0,gr0),#1
+ dcei @(gr0,gr0),#1
+
+ LEDS 0x0009
+
+#ifdef CONFIG_MMU
+ call __head_fr451_finalise_protection
+#endif
+
+ LEDS 0x000a
+
+###############################################################################
[%d lines skipped]
242diff -urN linux/arch/frv/kernel/head.inc linux/arch/frv/kernel/head.inc
--- linux/arch/frv/kernel/head.inc 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/head.inc Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,50 @@
+/* head.inc: head common definitions -*- asm -*-
+ *
+ * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+
+#if defined(CONFIG_MB93090_MB00)
+#define LED_ADDR (0x21200000+4)
+
+.macro LEDS val
+ sethi.p %hi(0xFFC00030),gr3
+ setlo %lo(0xFFC00030),gr3
+ lduh @(gr3,gr0),gr3
+ andicc gr3,#0x100,gr0,icc0
+ bne icc0,0,999f
+
+ setlos #~\val,gr3
+ st gr3,@(gr30,gr0)
+ membar
+ dcf @(gr30,gr0)
+ 999:
+.endm
+
+#elif defined(CONFIG_MB93093_PDK)
+#define LED_ADDR (0x20000023)
+
+.macro LEDS val
+ setlos #\val,gr3
+ stb gr3,@(gr30,gr0)
+ membar
+.endm
+
+#else
+#define LED_ADDR 0
+
+.macro LEDS val
+.endm
+#endif
+
+#ifdef CONFIG_MMU
+__sdram_base = 0x00000000 /* base address to which SDRAM
relocated */
+#else
+__sdram_base = 0xc0000000 /* base address to which SDRAM
relocated */
+#endif
diff -urN linux/arch/frv/kernel/init_task.c linux/arch/frv/kernel/init_task.c
--- linux/arch/frv/kernel/init_task.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/init_task.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,39 @@
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/init_task.h>
+#include <linux/fs.h>
+#include <linux/mqueue.h>
+
+#include <asm/uaccess.h>
+#include <asm/pgtable.h>
+
+
+static struct fs_struct init_fs = INIT_FS;
+static struct files_struct init_files = INIT_FILES;
+static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
+static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
+struct mm_struct init_mm = INIT_MM(init_mm);
+
+EXPORT_SYMBOL(init_mm);
+
+/*
+ * Initial thread structure.
+ *
+ * We need to make sure that this is THREAD_SIZE aligned due to the
+ * way process stacks are handled. This is done by having a special
+ * "init_task" linker map entry..
+ */
+union thread_union init_thread_union
+ __attribute__((__section__(".data.init_task"))) =
+ { INIT_THREAD_INFO(init_task) };
+
+/*
+ * Initial task structure.
+ *
+ * All other task structs will be allocated on slabs in fork.c
+ */
+struct task_struct init_task = INIT_TASK(init_task);
+
+EXPORT_SYMBOL(init_task);
diff -urN linux/arch/frv/kernel/irq-mb93091.c
linux/arch/frv/kernel/irq-mb93091.c
--- linux/arch/frv/kernel/irq-mb93091.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/irq-mb93091.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,116 @@
+/* irq-mb93091.c: MB93091 FPGA interrupt handling
+ *
+ * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/ptrace.h>
+#include <linux/errno.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+
+#include <asm/io.h>
+#include <asm/system.h>
+#include <asm/bitops.h>
+#include <asm/delay.h>
+#include <asm/irq.h>
+#include <asm/irc-regs.h>
+#include <asm/irq-routing.h>
+
+#define __reg16(ADDR) (*(volatile unsigned short *)(ADDR))
+
+#define __get_IMR() ({ __reg16(0xffc00004); })
+#define __set_IMR(M) do { __reg16(0xffc00004) = (M); wmb(); } while(0)
+#define __get_IFR() ({ __reg16(0xffc0000c); })
+#define __clr_IFR(M) do { __reg16(0xffc0000c) = ~(M); wmb(); } while(0)
+
+static void frv_fpga_doirq(struct irq_source *source);
+static void frv_fpga_control(struct irq_group *group, int irq, int on);
+
+/*****************************************************************************/
+/*
+ * FPGA IRQ multiplexor
+ */
+static struct irq_source frv_fpga[4] = {
+#define __FPGA(X, M) \
+ [X] = { \
+ .muxname = "fpga."#X, \
+ .irqmask = M, \
+ .doirq = frv_fpga_doirq, \
+ }
+
+ __FPGA(0, 0x0028),
+ __FPGA(1, 0x0050),
+ __FPGA(2, 0x1c00),
+ __FPGA(3, 0x6386),
+};
+
+static struct irq_group frv_fpga_irqs = {
+ .first_irq = IRQ_BASE_FPGA,
+ .control = frv_fpga_control,
+ .sources = {
+ [ 1] = &frv_fpga[3],
+ [ 2] = &frv_fpga[3],
+ [ 3] = &frv_fpga[0],
+ [ 4] = &frv_fpga[1],
+ [ 5] = &frv_fpga[0],
+ [ 6] = &frv_fpga[1],
+ [ 7] = &frv_fpga[3],
+ [ 8] = &frv_fpga[3],
+ [ 9] = &frv_fpga[3],
+ [10] = &frv_fpga[2],
+ [11] = &frv_fpga[2],
+ [12] = &frv_fpga[2],
+ [13] = &frv_fpga[3],
+ [14] = &frv_fpga[3],
+ },
+};
+
+
+static void frv_fpga_control(struct irq_group *group, int index, int on)
+{
+ uint16_t imr = __get_IMR();
+
+ if (on)
+ imr &= ~(1 << index);
+ else
+ imr |= 1 << index;
+
+ __set_IMR(imr);
+}
+
+static void frv_fpga_doirq(struct irq_source *source)
+{
+ uint16_t mask, imr;
+
+ imr = __get_IMR();
+ mask = source->irqmask & ~imr & __get_IFR();
+ if (mask) {
+ __set_IMR(imr | mask);
+ __clr_IFR(mask);
+ distribute_irqs(&frv_fpga_irqs, mask);
+ __set_IMR(imr);
+ }
+}
+
+void __init fpga_init(void)
+{
+ __set_IMR(0x7ffe);
+ __clr_IFR(0x0000);
+
+ frv_irq_route_external(&frv_fpga[0], IRQ_CPU_EXTERNAL0);
+ frv_irq_route_external(&frv_fpga[1], IRQ_CPU_EXTERNAL1);
+ frv_irq_route_external(&frv_fpga[2], IRQ_CPU_EXTERNAL2);
+ frv_irq_route_external(&frv_fpga[3], IRQ_CPU_EXTERNAL3);
+ frv_irq_set_group(&frv_fpga_irqs);
+}
diff -urN linux/arch/frv/kernel/irq-mb93093.c
linux/arch/frv/kernel/irq-mb93093.c
--- linux/arch/frv/kernel/irq-mb93093.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/irq-mb93093.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,99 @@
+/* irq-mb93093.c: MB93093 FPGA interrupt handling
+ *
+ * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/ptrace.h>
+#include <linux/errno.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+
+#include <asm/io.h>
+#include <asm/system.h>
+#include <asm/bitops.h>
+#include <asm/delay.h>
+#include <asm/irq.h>
+#include <asm/irc-regs.h>
+#include <asm/irq-routing.h>
+
+#define __reg16(ADDR) (*(volatile unsigned short *)(__region_CS2 + (ADDR)))
+
+#define __get_IMR() ({ __reg16(0x0a); })
+#define __set_IMR(M) do { __reg16(0x0a) = (M); wmb(); } while(0)
+#define __get_IFR() ({ __reg16(0x02); })
+#define __clr_IFR(M) do { __reg16(0x02) = ~(M); wmb(); } while(0)
+
+static void frv_fpga_doirq(struct irq_source *source);
+static void frv_fpga_control(struct irq_group *group, int irq, int on);
+
+/*****************************************************************************/
+/*
+ * FPGA IRQ multiplexor
+ */
+static struct irq_source frv_fpga[4] = {
+#define __FPGA(X, M) \
+ [X] = { \
+ .muxname = "fpga."#X, \
+ .irqmask = M, \
+ .doirq = frv_fpga_doirq, \
+ }
+
+ __FPGA(0, 0x0700),
+};
+
+static struct irq_group frv_fpga_irqs = {
+ .first_irq = IRQ_BASE_FPGA,
+ .control = frv_fpga_control,
+ .sources = {
+ [ 8] = &frv_fpga[0],
+ [ 9] = &frv_fpga[0],
+ [10] = &frv_fpga[0],
+ },
+};
+
+
+static void frv_fpga_control(struct irq_group *group, int index, int on)
+{
+ uint16_t imr = __get_IMR();
+
+ if (on)
+ imr &= ~(1 << index);
+ else
+ imr |= 1 << index;
+
+ __set_IMR(imr);
+}
+
+static void frv_fpga_doirq(struct irq_source *source)
+{
+ uint16_t mask, imr;
+
+ imr = __get_IMR();
+ mask = source->irqmask & ~imr & __get_IFR();
+ if (mask) {
+ __set_IMR(imr | mask);
+ __clr_IFR(mask);
+ distribute_irqs(&frv_fpga_irqs, mask);
+ __set_IMR(imr);
+ }
+}
+
+void __init fpga_init(void)
+{
+ __set_IMR(0x0700);
+ __clr_IFR(0x0000);
+
+ frv_irq_route_external(&frv_fpga[0], IRQ_CPU_EXTERNAL2);
+ frv_irq_set_group(&frv_fpga_irqs);
+}
diff -urN linux/arch/frv/kernel/irq-mb93493.c
linux/arch/frv/kernel/irq-mb93493.c
--- linux/arch/frv/kernel/irq-mb93493.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/irq-mb93493.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,108 @@
+/* irq-mb93493.c: MB93493 companion chip interrupt handler
+ *
+ * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/ptrace.h>
+#include <linux/errno.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+
+#include <asm/io.h>
+#include <asm/system.h>
+#include <asm/bitops.h>
+#include <asm/delay.h>
+#include <asm/irq.h>
+#include <asm/irc-regs.h>
+#include <asm/irq-routing.h>
+#include <asm/mb93493-irqs.h>
+
+static void frv_mb93493_doirq(struct irq_source *source);
+
+/*****************************************************************************/
+/*
+ * MB93493 companion chip IRQ multiplexor
+ */
+static struct irq_source frv_mb93493[2] = {
+ [0] = {
+ .muxname = "mb93493.0",
+ .muxdata = __region_CS3 + 0x3d0,
+ .doirq = frv_mb93493_doirq,
+ .irqmask = 0x0000,
+ },
+ [1] = {
+ .muxname = "mb93493.1",
+ .muxdata = __region_CS3 + 0x3d4,
+ .doirq = frv_mb93493_doirq,
+ .irqmask = 0x0000,
+ },
+};
+
+static void frv_mb93493_control(struct irq_group *group, int index, int on)
+{
+ struct irq_source *source;
+ uint32_t iqsr;
+
+ if ((frv_mb93493[0].irqmask & (1 << index)))
+ source = &frv_mb93493[0];
+ else
+ source = &frv_mb93493[1];
+
+ iqsr = readl(source->muxdata);
+ if (on)
+ iqsr |= 1 << (index + 16);
+ else
+ iqsr &= ~(1 << (index + 16));
+
+ writel(iqsr, source->muxdata);
+}
+
+static struct irq_group frv_mb93493_irqs = {
+ .first_irq = IRQ_BASE_MB93493,
+ .control = frv_mb93493_control,
+};
+
+static void frv_mb93493_doirq(struct irq_source *source)
+{
+ uint32_t mask = readl(source->muxdata);
+ mask = mask & (mask >> 16) & 0xffff;
+
+ if (mask)
+ distribute_irqs(&frv_mb93493_irqs, mask);
+}
+
+static void __init mb93493_irq_route(int irq, int source)
+{
+ frv_mb93493[source].irqmask |= 1 << (irq - IRQ_BASE_MB93493);
+ frv_mb93493_irqs.sources[irq - IRQ_BASE_MB93493] = &frv_mb93493[source];
+}
+
+void __init route_mb93493_irqs(void)
+{
+ frv_irq_route_external(&frv_mb93493[0], IRQ_CPU_MB93493_0);
+ frv_irq_route_external(&frv_mb93493[1], IRQ_CPU_MB93493_1);
+
+ frv_irq_set_group(&frv_mb93493_irqs);
+
+ mb93493_irq_route(IRQ_MB93493_VDC, IRQ_MB93493_VDC_ROUTE);
+ mb93493_irq_route(IRQ_MB93493_VCC, IRQ_MB93493_VCC_ROUTE);
+ mb93493_irq_route(IRQ_MB93493_AUDIO_IN,
IRQ_MB93493_AUDIO_IN_ROUTE);
+ mb93493_irq_route(IRQ_MB93493_I2C_0,
IRQ_MB93493_I2C_0_ROUTE);
+ mb93493_irq_route(IRQ_MB93493_I2C_1,
IRQ_MB93493_I2C_1_ROUTE);
+ mb93493_irq_route(IRQ_MB93493_USB, IRQ_MB93493_USB_ROUTE);
+ mb93493_irq_route(IRQ_MB93493_LOCAL_BUS,
IRQ_MB93493_LOCAL_BUS_ROUTE);
+ mb93493_irq_route(IRQ_MB93493_PCMCIA,
IRQ_MB93493_PCMCIA_ROUTE);
+ mb93493_irq_route(IRQ_MB93493_GPIO, IRQ_MB93493_GPIO_ROUTE);
+ mb93493_irq_route(IRQ_MB93493_AUDIO_OUT,
IRQ_MB93493_AUDIO_OUT_ROUTE);
+}
diff -urN linux/arch/frv/kernel/irq-routing.c
linux/arch/frv/kernel/irq-routing.c
--- linux/arch/frv/kernel/irq-routing.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/irq-routing.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,291 @@
+/* irq-routing.c: IRQ routing
+ *
+ * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/sched.h>
+#include <linux/random.h>
+#include <linux/init.h>
+#include <linux/serial_reg.h>
+#include <asm/io.h>
+#include <asm/irq-routing.h>
+#include <asm/irc-regs.h>
+#include <asm/serial-regs.h>
+#include <asm/dma.h>
+
+struct irq_level frv_irq_levels[16] = {
+ [0 ... 15] = {
+ .lock = SPIN_LOCK_UNLOCKED,
+ }
+};
+
+struct irq_group *irq_groups[NR_IRQ_GROUPS];
+
+extern struct irq_group frv_cpu_irqs;
+
+void __init frv_irq_route(struct irq_source *source, int irqlevel)
+{
+ source->level = &frv_irq_levels[irqlevel];
+ source->next = frv_irq_levels[irqlevel].sources;
+ frv_irq_levels[irqlevel].sources = source;
+}
+
+void __init frv_irq_route_external(struct irq_source *source, int irq)
+{
+ int irqlevel = 0;
+
+ switch (irq) {
+ case IRQ_CPU_EXTERNAL0: irqlevel = IRQ_XIRQ0_LEVEL; break;
+ case IRQ_CPU_EXTERNAL1: irqlevel = IRQ_XIRQ1_LEVEL; break;
+ case IRQ_CPU_EXTERNAL2: irqlevel = IRQ_XIRQ2_LEVEL; break;
+ case IRQ_CPU_EXTERNAL3: irqlevel = IRQ_XIRQ3_LEVEL; break;
+ case IRQ_CPU_EXTERNAL4: irqlevel = IRQ_XIRQ4_LEVEL; break;
+ case IRQ_CPU_EXTERNAL5: irqlevel = IRQ_XIRQ5_LEVEL; break;
+ case IRQ_CPU_EXTERNAL6: irqlevel = IRQ_XIRQ6_LEVEL; break;
+ case IRQ_CPU_EXTERNAL7: irqlevel = IRQ_XIRQ7_LEVEL; break;
+ default: BUG();
+ }
+
+ source->level = &frv_irq_levels[irqlevel];
+ source->next = frv_irq_levels[irqlevel].sources;
+ frv_irq_levels[irqlevel].sources = source;
+}
+
+void __init frv_irq_set_group(struct irq_group *group)
+{
+ irq_groups[group->first_irq >> NR_IRQ_LOG2_ACTIONS_PER_GROUP] = group;
+}
+
+void distribute_irqs(struct irq_group *group, unsigned long irqmask)
+{
+ struct irqaction *action;
+ int irq;
+
+ while (irqmask) {
+ asm("scan %1,gr0,%0" : "=r"(irq) : "r"(irqmask));
+ if (irq < 0 || irq > 31)
+ asm volatile("break");
+ irq = 31 - irq;
+
+ irqmask &= ~(1 << irq);
+ action = group->actions[irq];
+
+ irq += group->first_irq;
+
+ if (action) {
+ int status = 0;
+
+// if (!(action->flags & SA_INTERRUPT))
+// sti();
+
+ do {
+ status |= action->flags;
+ action->handler(irq, action->dev_id, __frame);
+ action = action->next;
+ } while (action);
+
+ if (status & SA_SAMPLE_RANDOM)
+ add_interrupt_randomness(irq);
+ cli();
+ }
+ }
+}
+
+/*****************************************************************************/
+/*
+ * CPU UART interrupts
+ */
+static void frv_cpuuart_doirq(struct irq_source *source)
+{
+// uint8_t iir = readb(source->muxdata + UART_IIR * 8);
+// if ((iir & 0x0f) != UART_IIR_NO_INT)
+ distribute_irqs(&frv_cpu_irqs, source->irqmask);
+}
+
+struct irq_source frv_cpuuart[2] = {
+#define __CPUUART(X, A) \
+ [X] = { \
+ .muxname = "uart", \
+ .muxdata = (volatile void __iomem *) A, \
+ .irqmask = 1 << IRQ_CPU_UART##X, \
+ .doirq = frv_cpuuart_doirq, \
+ }
+
+ __CPUUART(0, UART0_BASE),
+ __CPUUART(1, UART1_BASE),
+};
+
+/*****************************************************************************/
+/*
+ * CPU DMA interrupts
+ */
+static void frv_cpudma_doirq(struct irq_source *source)
+{
+ uint32_t cstr = readl(source->muxdata + DMAC_CSTRx);
+ if (cstr & DMAC_CSTRx_INT)
+ distribute_irqs(&frv_cpu_irqs, source->irqmask);
+}
+
+struct irq_source frv_cpudma[8] = {
+#define __CPUDMA(X, A) \
+ [X] = { \
+ .muxname = "dma", \
+ .muxdata = (volatile void __iomem *) A, \
+ .irqmask = 1 << IRQ_CPU_DMA##X, \
+ .doirq = frv_cpudma_doirq, \
+ }
+
+ __CPUDMA(0, 0xfe000900),
+ __CPUDMA(1, 0xfe000980),
+ __CPUDMA(2, 0xfe000a00),
+ __CPUDMA(3, 0xfe000a80),
+ __CPUDMA(4, 0xfe001000),
+ __CPUDMA(5, 0xfe001080),
+ __CPUDMA(6, 0xfe001100),
+ __CPUDMA(7, 0xfe001180),
+};
+
+/*****************************************************************************/
+/*
+ * CPU timer interrupts - can't tell whether they've generated an interrupt or
not
+ */
+static void frv_cputimer_doirq(struct irq_source *source)
+{
+ distribute_irqs(&frv_cpu_irqs, source->irqmask);
+}
+
+struct irq_source frv_cputimer[3] = {
+#define __CPUTIMER(X) \
+ [X] = { \
+ .muxname = "timer", \
+ .muxdata = 0, \
+ .irqmask = 1 << IRQ_CPU_TIMER##X, \
+ .doirq = frv_cputimer_doirq, \
+ }
+
+ __CPUTIMER(0),
+ __CPUTIMER(1),
+ __CPUTIMER(2),
+};
+
+/*****************************************************************************/
+/*
+ * external CPU interrupts - can't tell directly whether they've generated an
interrupt or not
+ */
+static void frv_cpuexternal_doirq(struct irq_source *source)
+{
+ distribute_irqs(&frv_cpu_irqs, source->irqmask);
+}
+
+struct irq_source frv_cpuexternal[8] = {
+#define __CPUEXTERNAL(X) \
+ [X] = { \
+ .muxname = "ext", \
+ .muxdata = 0, \
+ .irqmask = 1 << IRQ_CPU_EXTERNAL##X, \
+ .doirq = frv_cpuexternal_doirq, \
+ }
+
+ __CPUEXTERNAL(0),
+ __CPUEXTERNAL(1),
+ __CPUEXTERNAL(2),
+ __CPUEXTERNAL(3),
+ __CPUEXTERNAL(4),
+ __CPUEXTERNAL(5),
+ __CPUEXTERNAL(6),
+ __CPUEXTERNAL(7),
+};
+
+#define set_IRR(N,A,B,C,D) __set_IRR(N, (A << 28) | (B << 24) | (C << 20) | (D
<< 16))
+
+struct irq_group frv_cpu_irqs = {
+ .sources = {
+ [IRQ_CPU_UART0] = &frv_cpuuart[0],
+ [IRQ_CPU_UART1] = &frv_cpuuart[1],
+ [IRQ_CPU_TIMER0] = &frv_cputimer[0],
+ [IRQ_CPU_TIMER1] = &frv_cputimer[1],
+ [IRQ_CPU_TIMER2] = &frv_cputimer[2],
+ [IRQ_CPU_DMA0] = &frv_cpudma[0],
+ [IRQ_CPU_DMA1] = &frv_cpudma[1],
+ [IRQ_CPU_DMA2] = &frv_cpudma[2],
+ [IRQ_CPU_DMA3] = &frv_cpudma[3],
+ [IRQ_CPU_DMA4] = &frv_cpudma[4],
+ [IRQ_CPU_DMA5] = &frv_cpudma[5],
+ [IRQ_CPU_DMA6] = &frv_cpudma[6],
+ [IRQ_CPU_DMA7] = &frv_cpudma[7],
+ [IRQ_CPU_EXTERNAL0] = &frv_cpuexternal[0],
+ [IRQ_CPU_EXTERNAL1] = &frv_cpuexternal[1],
+ [IRQ_CPU_EXTERNAL2] = &frv_cpuexternal[2],
+ [IRQ_CPU_EXTERNAL3] = &frv_cpuexternal[3],
+ [IRQ_CPU_EXTERNAL4] = &frv_cpuexternal[4],
+ [IRQ_CPU_EXTERNAL5] = &frv_cpuexternal[5],
+ [IRQ_CPU_EXTERNAL6] = &frv_cpuexternal[6],
+ [IRQ_CPU_EXTERNAL7] = &frv_cpuexternal[7],
+ },
+};
+
+/*****************************************************************************/
+/*
+ * route the CPU's interrupt sources
+ */
+void __init route_cpu_irqs(void)
+{
+ frv_irq_set_group(&frv_cpu_irqs);
+
+ __set_IITMR(0, 0x003f0000); /* DMA0-3, TIMER0-2 IRQ detect levels */
+ __set_IITMR(1, 0x20000000); /* ERR0-1, UART0-1, DMA4-7 IRQ detect
levels */
+
+ /* route UART and error interrupts */
+ frv_irq_route(&frv_cpuuart[0], IRQ_UART0_LEVEL);
+ frv_irq_route(&frv_cpuuart[1], IRQ_UART1_LEVEL);
+
+ set_IRR(6, IRQ_GDBSTUB_LEVEL, IRQ_GDBSTUB_LEVEL, IRQ_UART1_LEVEL,
IRQ_UART0_LEVEL);
+
+ /* route DMA channel interrupts */
+ frv_irq_route(&frv_cpudma[0], IRQ_DMA0_LEVEL);
+ frv_irq_route(&frv_cpudma[1], IRQ_DMA1_LEVEL);
+ frv_irq_route(&frv_cpudma[2], IRQ_DMA2_LEVEL);
+ frv_irq_route(&frv_cpudma[3], IRQ_DMA3_LEVEL);
+ frv_irq_route(&frv_cpudma[4], IRQ_DMA4_LEVEL);
+ frv_irq_route(&frv_cpudma[5], IRQ_DMA5_LEVEL);
+ frv_irq_route(&frv_cpudma[6], IRQ_DMA6_LEVEL);
+ frv_irq_route(&frv_cpudma[7], IRQ_DMA7_LEVEL);
+
+ set_IRR(4, IRQ_DMA3_LEVEL, IRQ_DMA2_LEVEL, IRQ_DMA1_LEVEL,
IRQ_DMA0_LEVEL);
+ set_IRR(7, IRQ_DMA7_LEVEL, IRQ_DMA6_LEVEL, IRQ_DMA5_LEVEL,
IRQ_DMA4_LEVEL);
+
+ /* route timer interrupts */
+ frv_irq_route(&frv_cputimer[0], IRQ_TIMER0_LEVEL);
+ frv_irq_route(&frv_cputimer[1], IRQ_TIMER1_LEVEL);
+ frv_irq_route(&frv_cputimer[2], IRQ_TIMER2_LEVEL);
+
+ set_IRR(5, 0, IRQ_TIMER2_LEVEL, IRQ_TIMER1_LEVEL, IRQ_TIMER0_LEVEL);
+
+ /* route external interrupts */
+ frv_irq_route(&frv_cpuexternal[0], IRQ_XIRQ0_LEVEL);
+ frv_irq_route(&frv_cpuexternal[1], IRQ_XIRQ1_LEVEL);
+ frv_irq_route(&frv_cpuexternal[2], IRQ_XIRQ2_LEVEL);
+ frv_irq_route(&frv_cpuexternal[3], IRQ_XIRQ3_LEVEL);
+ frv_irq_route(&frv_cpuexternal[4], IRQ_XIRQ4_LEVEL);
+ frv_irq_route(&frv_cpuexternal[5], IRQ_XIRQ5_LEVEL);
+ frv_irq_route(&frv_cpuexternal[6], IRQ_XIRQ6_LEVEL);
+ frv_irq_route(&frv_cpuexternal[7], IRQ_XIRQ7_LEVEL);
+
+ set_IRR(2, IRQ_XIRQ7_LEVEL, IRQ_XIRQ6_LEVEL, IRQ_XIRQ5_LEVEL,
IRQ_XIRQ4_LEVEL);
+ set_IRR(3, IRQ_XIRQ3_LEVEL, IRQ_XIRQ2_LEVEL, IRQ_XIRQ1_LEVEL,
IRQ_XIRQ0_LEVEL);
+
+#if defined(CONFIG_MB93091_VDK)
+ __set_TM1(0x55550000); /* XIRQ7-0 all active low */
+#elif defined(CONFIG_MB93093_PDK)
+ __set_TM1(0x15550000); /* XIRQ7 active high, 6-0 all active
low */
+#else
+#error dont know external IRQ trigger levels for this setup
+#endif
+
+} /* end route_cpu_irqs() */
diff -urN linux/arch/frv/kernel/irq.c linux/arch/frv/kernel/irq.c
--- linux/arch/frv/kernel/irq.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/irq.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,764 @@
+/* irq.c: FRV IRQ handling
+ *
+ * Copyright (C) 2003, 2004 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+/*
+ * (mostly architecture independent, will move to kernel/irq.c in 2.5.)
+ *
+ * IRQs are in fact implemented a bit like signal handlers for the kernel.
+ * Naturally it's not a 1:1 relation, but there are similarities.
+ */
+
+#include <linux/config.h>
+#include <linux/ptrace.h>
+#include <linux/errno.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/smp_lock.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/irq.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+
+#include <asm/atomic.h>
+#include <asm/io.h>
+#include <asm/smp.h>
+#include <asm/system.h>
+#include <asm/bitops.h>
+#include <asm/uaccess.h>
+#include <asm/pgalloc.h>
+#include <asm/delay.h>
+#include <asm/irq.h>
+#include <asm/irc-regs.h>
+#include <asm/irq-routing.h>
+#include <asm/gdb-stub.h>
+
+extern void __init fpga_init(void);
+extern void __init route_mb93493_irqs(void);
+
+static void register_irq_proc (unsigned int irq);
+
+/*
+ * Special irq handlers.
+ */
+
+irqreturn_t no_action(int cpl, void *dev_id, struct pt_regs *regs) { return
IRQ_HANDLED; }
+
+atomic_t irq_err_count;
+
+/*
+ * Generic, controller-independent functions:
+ */
+int show_interrupts(struct seq_file *p, void *v)
+{
+ struct irqaction *action;
+ struct irq_group *group;
+ unsigned long flags;
+ int level, grp, ix, i, j;
+
+ i = *(loff_t *) v;
+
+ switch (i) {
+ case 0:
+ seq_printf(p, " ");
+ for (j = 0; j < NR_CPUS; j++)
+ if (cpu_online(j))
+ seq_printf(p, "CPU%d ",j);
+
+ seq_putc(p, '\n');
+ break;
+
+ case 1 ... NR_IRQ_GROUPS * NR_IRQ_ACTIONS_PER_GROUP:
+ local_irq_save(flags);
+
+ grp = (i - 1) / NR_IRQ_ACTIONS_PER_GROUP;
+ group = irq_groups[grp];
+ if (!group)
+ goto skip;
+
+ ix = (i - 1) % NR_IRQ_ACTIONS_PER_GROUP;
+ action = group->actions[ix];
+ if (!action)
+ goto skip;
+
+ seq_printf(p, "%3d: ", i - 1);
+
+#ifndef CONFIG_SMP
+ seq_printf(p, "%10u ", kstat_irqs(i));
+#else
+ for (j = 0; j < NR_CPUS; j++)
+ if (cpu_online(j))
+ seq_printf(p, "%10u ", kstat_cpu(j).irqs[i -
1]);
+#endif
+
+ level = group->sources[ix]->level - frv_irq_levels;
+
+ seq_printf(p, " %12s@%x", group->sources[ix]->muxname, level);
+ seq_printf(p, " %s", action->name);
+
+ for (action = action->next; action; action = action->next)
+ seq_printf(p, ", %s", action->name);
+
+ seq_putc(p, '\n');
+skip:
+ local_irq_restore(flags);
+ break;
+
+ case NR_IRQ_GROUPS * NR_IRQ_ACTIONS_PER_GROUP + 1:
+ seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
+ break;
+
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+
+/*
+ * Generic enable/disable code: this just calls
+ * down into the PIC-specific version for the actual
+ * hardware disable after having gotten the irq
+ * controller lock.
+ */
+
+/**
+ * disable_irq_nosync - disable an irq without waiting
+ * @irq: Interrupt to disable
+ *
+ * Disable the selected interrupt line. Disables and Enables are
+ * nested.
+ * Unlike disable_irq(), this function does not ensure existing
+ * instances of the IRQ handler have completed before returning.
+ *
+ * This function may be called from IRQ context.
+ */
+
+void disable_irq_nosync(unsigned int irq)
+{
+ struct irq_source *source;
+ struct irq_group *group;
+ struct irq_level *level;
+ unsigned long flags;
+ int idx = irq & (NR_IRQ_ACTIONS_PER_GROUP - 1);
+
+ group = irq_groups[irq >> NR_IRQ_LOG2_ACTIONS_PER_GROUP];
+ if (!group)
+ BUG();
+
+ source = group->sources[idx];
+ if (!source)
+ BUG();
+
+ level = source->level;
+
+ spin_lock_irqsave(&level->lock, flags);
+
+ if (group->control) {
+ if (!group->disable_cnt[idx]++)
+ group->control(group, idx, 0);
+ } else if (!level->disable_count++) {
+ __set_MASK(level - frv_irq_levels);
+ }
+
+ spin_unlock_irqrestore(&level->lock, flags);
+}
+
+/**
+ * disable_irq - disable an irq and wait for completion
+ * @irq: Interrupt to disable
+ *
+ * Disable the selected interrupt line. Enables and Disables are
+ * nested.
+ * This function waits for any pending IRQ handlers for this interrupt
+ * to complete before returning. If you use this function while
+ * holding a resource the IRQ handler may need you will deadlock.
+ *
+ * This function may be called - with care - from IRQ context.
+ */
+
+void disable_irq(unsigned int irq)
+{
+ disable_irq_nosync(irq);
+
+#ifdef CONFIG_SMP
+ if (!local_irq_count(smp_processor_id())) {
+ do {
+ barrier();
+ } while (irq_desc[irq].status & IRQ_INPROGRESS);
+ }
+#endif
+}
+
+/**
+ * enable_irq - enable handling of an irq
+ * @irq: Interrupt to enable
+ *
+ * Undoes the effect of one call to disable_irq(). If this
+ * matches the last disable, processing of interrupts on this
+ * IRQ line is re-enabled.
+ *
+ * This function may be called from IRQ context.
+ */
+
+void enable_irq(unsigned int irq)
+{
+ struct irq_source *source;
+ struct irq_group *group;
+ struct irq_level *level;
+ unsigned long flags;
+ int idx = irq & (NR_IRQ_ACTIONS_PER_GROUP - 1);
+ int count;
+
+ group = irq_groups[irq >> NR_IRQ_LOG2_ACTIONS_PER_GROUP];
+ if (!group)
+ BUG();
+
+ source = group->sources[idx];
+ if (!source)
+ BUG();
+
+ level = source->level;
+
+ spin_lock_irqsave(&level->lock, flags);
+
+ if (group->control)
+ count = group->disable_cnt[idx];
+ else
+ count = level->disable_count;
+
+ switch (count) {
+ case 1:
+ if (group->control) {
+ if (group->actions[idx])
+ group->control(group, idx, 1);
+ } else {
+ if (level->usage)
+ __clr_MASK(level - frv_irq_levels);
+ }
+ /* fall-through */
+
+ default:
+ count--;
+ break;
+
+ case 0:
+ printk("enable_irq(%u) unbalanced from %p\n", irq,
__builtin_return_address(0));
+ }
+
+ if (group->control)
+ group->disable_cnt[idx] = count;
+ else
+ level->disable_count = count;
+
+ spin_unlock_irqrestore(&level->lock, flags);
+}
+
+/*****************************************************************************/
+/*
+ * handles all normal device IRQ's
+ * - registers are referred to by the __frame variable (GR28)
+ * - IRQ distribution is complicated in this arch because of the many PICs, the
+ * way they work and the way they cascade
+ */
+asmlinkage void do_IRQ(void)
+{
+ struct irq_source *source;
+ int level, cpu;
+
+ level = (__frame->tbr >> 4) & 0xf;
+ cpu = smp_processor_id();
+
+#if 0
+ {
+ static u32 irqcount;
+ *(volatile u32 *) 0xe1200004 = ~((irqcount++ << 8) | level);
+ *(volatile u16 *) 0xffc00100 = (u16) ~0x9999;
+ mb();
+ }
+#endif
+
+ if ((unsigned long) __frame - (unsigned long) (current + 1) < 512)
+ BUG();
+
+ __set_MASK(level);
+ __clr_RC(level);
+ __clr_IRL();
+
+ kstat_this_cpu.irqs[level]++;
+
+ irq_enter();
+
+ for (source = frv_irq_levels[level].sources; source; source =
source->next)
+ source->doirq(source);
+
+ irq_exit();
+
+ __clr_MASK(level);
+
+ /* only process softirqs if we didn't interrupt another interrupt
handler */
+ if ((__frame->psr & PSR_PIL) == PSR_PIL_0)
+ if (softirq_pending(cpu))
+ do_softirq();
+
+#ifdef CONFIG_PREEMPT
+ cli();
+ while (--current->preempt_count == 0) {
+ if (!(__frame->psr & PSR_S)
+ || (current->need_resched == 0)
+ || in_interrupt())
+ break;
+ current->preempt_count++;
+ sti();
+ preempt_schedule();
+ cli();
+ }
+#endif
+
+#if 0
+ {
+ *(volatile u16 *) 0xffc00100 = (u16) ~0x6666;
+ mb();
+ }
+#endif
+
+} /* end do_IRQ() */
+
+/*****************************************************************************/
+/*
+ * handles all NMIs when not co-opted by the debugger
+ * - registers are referred to by the __frame variable (GR28)
+ */
+asmlinkage void do_NMI(void)
+{
+} /* end do_NMI() */
+
+/*****************************************************************************/
+/**
+ * request_irq - allocate an interrupt line
+ * @irq: Interrupt line to allocate
+ * @handler: Function to be called when the IRQ occurs
+ * @irqflags: Interrupt type flags
+ * @devname: An ascii name for the claiming device
+ * @dev_id: A cookie passed back to the handler function
+ *
+ * This call allocates interrupt resources and enables the
+ * interrupt line and IRQ handling. From the point this
+ * call is made your handler function may be invoked. Since
+ * your handler function must clear any interrupt the board
+ * raises, you must take care both to initialise your hardware
+ * and to set up the interrupt handler in the right order.
+ *
+ * Dev_id must be globally unique. Normally the address of the
+ * device data structure is used as the cookie. Since the handler
+ * receives this value it makes sense to use it.
+ *
+ * If your interrupt is shared you must pass a non NULL dev_id
+ * as this is required when freeing the interrupt.
+ *
+ * Flags:
+ *
+ * SA_SHIRQ Interrupt is shared
+ *
+ * SA_INTERRUPT Disable local interrupts while processing
+ *
+ * SA_SAMPLE_RANDOM The interrupt can be used for entropy
+ *
+ */
+
+int request_irq(unsigned int irq,
+ irqreturn_t (*handler)(int, void *, struct pt_regs *),
+ unsigned long irqflags,
+ const char * devname,
+ void *dev_id)
+{
+ int retval;
+ struct irqaction *action;
+
+#if 1
+ /*
+ * Sanity-check: shared interrupts should REALLY pass in
+ * a real dev-ID, otherwise we'll have trouble later trying
+ * to figure out which interrupt is which (messes up the
+ * interrupt freeing logic etc).
[%d lines skipped]
367diff -urN linux/arch/frv/kernel/kernel_thread.S
linux/arch/frv/kernel/kernel_thread.S
--- linux/arch/frv/kernel/kernel_thread.S 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/kernel_thread.S Thu Jan 13 14:05:22 2005
1.1
@@ -0,0 +1,77 @@
+/* kernel_thread.S: kernel thread creation
+ *
+ * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/linkage.h>
+#include <asm/unistd.h>
+
+#define CLONE_VM 0x00000100 /* set if VM shared between processes */
+#define KERN_ERR "<3>"
+
+ .section .rodata
+kernel_thread_emsg:
+ .asciz KERN_ERR "failed to create kernel thread: error=%d\n"
+
+ .text
+ .balign 4
+
+###############################################################################
+#
+# Create a kernel thread
+#
+# int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
+#
+###############################################################################
+ .globl kernel_thread
+ .type kernel_thread,@function
+kernel_thread:
+ or.p gr8,gr0,gr4
+ or gr9,gr0,gr5
+
+ # start by forking the current process, but with shared VM
+ setlos.p #__NR_clone,gr7 ; syscall number
+ ori gr10,#CLONE_VM,gr8 ; first syscall arg
[clone_flags]
+ sethi.p #0xe4e4,gr9 ; second syscall arg [newsp]
+ setlo #0xe4e4,gr9
+ setlos.p #0,gr10 ; third syscall arg
[parent_tidptr]
+ setlos #0,gr11 ; fourth syscall arg
[child_tidptr]
+ tira gr0,#0
+ setlos.p #4095,gr7
+ andcc gr8,gr8,gr0,icc0
+ addcc.p gr8,gr7,gr0,icc1
+ bnelr icc0,#2
+ bc icc1,#0,kernel_thread_error
+
+ # now invoke the work function
+ or gr5,gr0,gr8
+ calll @(gr4,gr0)
+
+ # and finally exit the thread
+ setlos #__NR_exit,gr7 ; syscall number
+ tira gr0,#0
+
+kernel_thread_error:
+ subi sp,#8,sp
+ movsg lr,gr4
+ sti gr8,@(sp,#0)
+ sti.p gr4,@(sp,#4)
+
+ or gr8,gr0,gr9
+ sethi.p %hi(kernel_thread_emsg),gr8
+ setlo %lo(kernel_thread_emsg),gr8
+
+ call printk
+
+ ldi @(sp,#4),gr4
+ ldi @(sp,#0),gr8
+ subi sp,#8,sp
+ jmpl @(gr4,gr0)
+
+ .size kernel_thread,.-kernel_thread
diff -urN linux/arch/frv/kernel/local.h linux/arch/frv/kernel/local.h
--- linux/arch/frv/kernel/local.h 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/local.h Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,56 @@
+/* local.h: local definitions
+ *
+ * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#ifndef _FRV_LOCAL_H
+#define _FRV_LOCAL_H
+
+#include <asm/sections.h>
+
+#ifndef __ASSEMBLY__
+
+/* dma.c */
+extern unsigned long frv_dma_inprogress;
+
+extern void frv_dma_pause_all(void);
+extern void frv_dma_resume_all(void);
+
+/* sleep.S */
+extern asmlinkage void frv_cpu_suspend(unsigned long);
+extern asmlinkage void frv_cpu_core_sleep(void);
+
+/* setup.c */
+extern unsigned long __nongprelbss pdm_suspend_mode;
+extern void determine_clocks(int verbose);
+extern int __nongprelbss clock_p0_current;
+extern int __nongprelbss clock_cm_current;
+extern int __nongprelbss clock_cmode_current;
+
+#ifdef CONFIG_PM
+extern int __nongprelbss clock_cmodes_permitted;
+extern unsigned long __nongprelbss clock_bits_settable;
+#define CLOCK_BIT_CM 0x0000000f
+#define CLOCK_BIT_CM_H 0x00000001 /* CLKC.CM can be set to 0 */
+#define CLOCK_BIT_CM_M 0x00000002 /* CLKC.CM can be set to 1 */
+#define CLOCK_BIT_CM_L 0x00000004 /* CLKC.CM can be set to 2 */
+#define CLOCK_BIT_P0 0x00000010 /* CLKC.P0 can be changed */
+#define CLOCK_BIT_CMODE 0x00000020 /* CLKC.CMODE can be
changed */
+
+extern void (*__power_switch_wake_setup)(void);
+extern int (*__power_switch_wake_check)(void);
+extern void (*__power_switch_wake_cleanup)(void);
+#endif
+
+/* time.c */
+extern void time_divisor_init(void);
+
+
+#endif /* __ASSEMBLY__ */
+#endif /* _FRV_LOCAL_H */
diff -urN linux/arch/frv/kernel/pm-mb93093.c linux/arch/frv/kernel/pm-mb93093.c
--- linux/arch/frv/kernel/pm-mb93093.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/pm-mb93093.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,66 @@
+/*
+ * FR-V MB93093 Power Management Routines
+ *
+ * Copyright (c) 2004 Red Hat, Inc.
+ *
+ * Written by: msalter@redhat.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/pm.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/sysctl.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <asm/uaccess.h>
+
+#include <asm/mb86943a.h>
+
+#include "local.h"
+
+static unsigned long imask;
+/*
+ * Setup interrupt masks, etc to enable wakeup by power switch
+ */
+static void mb93093_power_switch_setup(void)
+{
+ /* mask all but FPGA interrupt sources. */
+ imask = *(volatile unsigned long *)0xfeff9820;
+ *(volatile unsigned long *)0xfeff9820 = ~(1 << (IRQ_XIRQ2_LEVEL + 16))
& 0xfffe0000;
+}
+
+/*
+ * Cleanup interrupt masks, etc after wakeup by power switch
+ */
+static void mb93093_power_switch_cleanup(void)
+{
+ *(volatile unsigned long *)0xfeff9820 = imask;
+}
+
+/*
+ * Return non-zero if wakeup irq was caused by power switch
+ */
+static int mb93093_power_switch_check(void)
+{
+ return 1;
+}
+
+/*
+ * Initialize power interface
+ */
+static int __init mb93093_pm_init(void)
+{
+ __power_switch_wake_setup = mb93093_power_switch_setup;
+ __power_switch_wake_check = mb93093_power_switch_check;
+ __power_switch_wake_cleanup = mb93093_power_switch_cleanup;
+ return 0;
+}
+
+__initcall(mb93093_pm_init);
+
diff -urN linux/arch/frv/kernel/pm.c linux/arch/frv/kernel/pm.c
--- linux/arch/frv/kernel/pm.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/pm.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,432 @@
+/*
+ * FR-V Power Management Routines
+ *
+ * Copyright (c) 2004 Red Hat, Inc.
+ *
+ * Based on SA1100 version:
+ * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/pm.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/sysctl.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <asm/uaccess.h>
+
+#include <asm/mb86943a.h>
+
+#include "local.h"
+
+void (*pm_power_off)(void);
+
+extern void frv_change_cmode(int);
+
+/*
+ * Debug macros
+ */
+#define DEBUG
+
+int pm_do_suspend(void)
+{
+ cli();
+
+ __set_LEDS(0xb1);
+
+ /* go zzz */
+ frv_cpu_suspend(pdm_suspend_mode);
+
+ __set_LEDS(0xb2);
+
+ sti();
+
+ return 0;
+}
+
+static unsigned long __irq_mask;
+
+/*
+ * Setup interrupt masks, etc to enable wakeup by power switch
+ */
+static void __default_power_switch_setup(void)
+{
+ /* default is to mask all interrupt sources. */
+ __irq_mask = *(unsigned long *)0xfeff9820;
+ *(unsigned long *)0xfeff9820 = 0xfffe0000;
+}
+
+/*
+ * Cleanup interrupt masks, etc after wakeup by power switch
+ */
+static void __default_power_switch_cleanup(void)
+{
+ *(unsigned long *)0xfeff9820 = __irq_mask;
+}
+
+/*
+ * Return non-zero if wakeup irq was caused by power switch
+ */
+static int __default_power_switch_check(void)
+{
+ return 1;
+}
+
+void (*__power_switch_wake_setup)(void) = __default_power_switch_setup;
+int (*__power_switch_wake_check)(void) = __default_power_switch_check;
+void (*__power_switch_wake_cleanup)(void) = __default_power_switch_cleanup;
+
+int pm_do_bus_sleep(void)
+{
+ cli();
+
+ /*
+ * Here is where we need some platform-dependent setup
+ * of the interrupt state so that appropriate wakeup
+ * sources are allowed and all others are masked.
+ */
+ __power_switch_wake_setup();
+
+ __set_LEDS(0xa1);
+
+ /* go zzz
+ *
+ * This is in a loop in case power switch shares an irq with other
+ * devices. The wake_check() tells us if we need to finish waking
+ * or go back to sleep.
+ */
+ do {
+ frv_cpu_suspend(HSR0_PDM_BUS_SLEEP);
+ } while (__power_switch_wake_check && !__power_switch_wake_check());
+
+ __set_LEDS(0xa2);
+
+ /*
+ * Here is where we need some platform-dependent restore
+ * of the interrupt state prior to being called.
+ */
+ __power_switch_wake_cleanup();
+
+ sti();
+
+ return 0;
+}
+
+unsigned long sleep_phys_sp(void *sp)
+{
+ return virt_to_phys(sp);
+}
+
+#ifdef CONFIG_SYSCTL
+/*
+ * Use a temporary sysctl number. Horrid, but will be cleaned up in 2.6
+ * when all the PM interfaces exist nicely.
+ */
+#define CTL_PM 9899
+#define CTL_PM_SUSPEND 1
+#define CTL_PM_CMODE 2
+#define CTL_PM_P0 4
+#define CTL_PM_CM 5
+
+static int user_atoi(char *ubuf, int len)
+{
+ char buf[16];
+ unsigned long ret;
+
+ if (len > 15)
+ return -EINVAL;
+
+ if (copy_from_user(buf, ubuf, len))
+ return -EFAULT;
+
+ buf[len] = 0;
+ ret = simple_strtoul(buf, NULL, 0);
+ if (ret > INT_MAX)
+ return -ERANGE;
+ return ret;
+}
+
+/*
+ * Send us to sleep.
+ */
+static int sysctl_pm_do_suspend(ctl_table *ctl, int write, struct file *filp,
+ void *buffer, size_t *lenp, loff_t *fpos)
+{
+ int retval, mode;
+
+ if (*lenp <= 0)
+ return -EIO;
+
+ mode = user_atoi(buffer, *lenp);
+ if ((mode != 1) && (mode != 5))
+ return -EINVAL;
+
+ retval = pm_send_all(PM_SUSPEND, (void *)3);
+
+ if (retval == 0) {
+ if (mode == 5)
+ retval = pm_do_bus_sleep();
+ else
+ retval = pm_do_suspend();
+ pm_send_all(PM_RESUME, (void *)0);
+ }
+
+ return retval;
+}
+
+static int try_set_cmode(int new_cmode)
+{
+ if (new_cmode > 15)
+ return -EINVAL;
+ if (!(clock_cmodes_permitted & (1<<new_cmode)))
+ return -EINVAL;
+
+ /* tell all the drivers we're suspending */
+ pm_send_all(PM_SUSPEND, (void *)3);
+
+ /* now change cmode */
+ cli();
+ frv_dma_pause_all();
+
+ frv_change_cmode(new_cmode);
+
+ determine_clocks(0);
+ time_divisor_init();
+
+#ifdef DEBUG
+ determine_clocks(1);
+#endif
+ frv_dma_resume_all();
+ sti();
+
+ /* tell all the drivers we're resuming */
+ pm_send_all(PM_RESUME, (void *)0);
+ return 0;
+}
+
+
+static int cmode_procctl(ctl_table *ctl, int write, struct file *filp,
+ void *buffer, size_t *lenp, loff_t *fpos)
+{
+ int new_cmode;
+
+ if (!write)
+ return proc_dointvec(ctl, write, filp, buffer, lenp, fpos);
+
+ new_cmode = user_atoi(buffer, *lenp);
+
+ return try_set_cmode(new_cmode)?:*lenp;
+}
+
+static int cmode_sysctl(ctl_table *table, int *name, int nlen,
+ void *oldval, size_t *oldlenp,
+ void *newval, size_t newlen, void **context)
+{
+ if (oldval && oldlenp) {
+ size_t oldlen;
+
+ if (get_user(oldlen, oldlenp))
+ return -EFAULT;
+
+ if (oldlen != sizeof(int))
+ return -EINVAL;
+
+ if (put_user(clock_cmode_current, (unsigned int *)oldval) ||
+ put_user(sizeof(int), oldlenp))
+ return -EFAULT;
+ }
+ if (newval && newlen) {
+ int new_cmode;
+
+ if (newlen != sizeof(int))
+ return -EINVAL;
+
+ if (get_user(new_cmode, (int *)newval))
+ return -EFAULT;
+
+ return try_set_cmode(new_cmode)?:1;
+ }
+ return 1;
+}
+
+static int try_set_p0(int new_p0)
+{
+ unsigned long flags, clkc;
+
+ if (new_p0 < 0 || new_p0 > 1)
+ return -EINVAL;
+
+ local_irq_save(flags);
+ __set_PSR(flags & ~PSR_ET);
+
+ frv_dma_pause_all();
+
+ clkc = __get_CLKC();
+ if (new_p0)
+ clkc |= CLKC_P0;
+ else
+ clkc &= ~CLKC_P0;
+ __set_CLKC(clkc);
+
+ determine_clocks(0);
+ time_divisor_init();
+
+#ifdef DEBUG
+ determine_clocks(1);
+#endif
+ frv_dma_resume_all();
+ local_irq_restore(flags);
+ return 0;
+}
+
+static int try_set_cm(int new_cm)
+{
+ unsigned long flags, clkc;
+
+ if (new_cm < 0 || new_cm > 1)
+ return -EINVAL;
+
+ local_irq_save(flags);
+ __set_PSR(flags & ~PSR_ET);
+
+ frv_dma_pause_all();
+
+ clkc = __get_CLKC();
+ clkc &= ~CLKC_CM;
+ clkc |= new_cm;
+ __set_CLKC(clkc);
+
+ determine_clocks(0);
+ time_divisor_init();
+
+#if 1 //def DEBUG
+ determine_clocks(1);
+#endif
+
+ frv_dma_resume_all();
+ local_irq_restore(flags);
+ return 0;
+}
+
+static int p0_procctl(ctl_table *ctl, int write, struct file *filp,
+ void *buffer, size_t *lenp, loff_t *fpos)
+{
+ int new_p0;
+
+ if (!write)
+ return proc_dointvec(ctl, write, filp, buffer, lenp, fpos);
+
+ new_p0 = user_atoi(buffer, *lenp);
+
+ return try_set_p0(new_p0)?:*lenp;
+}
+
+static int p0_sysctl(ctl_table *table, int *name, int nlen,
+ void *oldval, size_t *oldlenp,
+ void *newval, size_t newlen, void **context)
+{
+ if (oldval && oldlenp) {
+ size_t oldlen;
+
+ if (get_user(oldlen, oldlenp))
+ return -EFAULT;
+
+ if (oldlen != sizeof(int))
+ return -EINVAL;
+
+ if (put_user(clock_p0_current, (unsigned int *)oldval) ||
+ put_user(sizeof(int), oldlenp))
+ return -EFAULT;
+ }
+ if (newval && newlen) {
+ int new_p0;
+
+ if (newlen != sizeof(int))
+ return -EINVAL;
+
+ if (get_user(new_p0, (int *)newval))
+ return -EFAULT;
+
+ return try_set_p0(new_p0)?:1;
+ }
+ return 1;
+}
+
+static int cm_procctl(ctl_table *ctl, int write, struct file *filp,
+ void *buffer, size_t *lenp, loff_t *fpos)
+{
+ int new_cm;
+
+ if (!write)
+ return proc_dointvec(ctl, write, filp, buffer, lenp, fpos);
+
+ new_cm = user_atoi(buffer, *lenp);
+
+ return try_set_cm(new_cm)?:*lenp;
+}
+
+static int cm_sysctl(ctl_table *table, int *name, int nlen,
+ void *oldval, size_t *oldlenp,
+ void *newval, size_t newlen, void **context)
+{
+ if (oldval && oldlenp) {
+ size_t oldlen;
+
+ if (get_user(oldlen, oldlenp))
+ return -EFAULT;
+
+ if (oldlen != sizeof(int))
+ return -EINVAL;
+
+ if (put_user(clock_cm_current, (unsigned int *)oldval) ||
+ put_user(sizeof(int), oldlenp))
+ return -EFAULT;
+ }
+ if (newval && newlen) {
+ int new_cm;
+
+ if (newlen != sizeof(int))
+ return -EINVAL;
+
+ if (get_user(new_cm, (int *)newval))
[%d lines skipped]
35diff -urN linux/arch/frv/kernel/process.c linux/arch/frv/kernel/process.c
--- linux/arch/frv/kernel/process.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/process.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,388 @@
+/* process.c: FRV specific parts of process handling
+ *
+ * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ * - Derived from arch/m68k/kernel/process.c
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/smp.h>
+#include <linux/smp_lock.h>
+#include <linux/stddef.h>
+#include <linux/unistd.h>
+#include <linux/ptrace.h>
+#include <linux/slab.h>
+#include <linux/user.h>
+#include <linux/elf.h>
+#include <linux/reboot.h>
+#include <linux/interrupt.h>
+
+#include <asm/uaccess.h>
+#include <asm/system.h>
+#include <asm/setup.h>
+#include <asm/pgtable.h>
+#include <asm/gdb-stub.h>
+#include <asm/mb-regs.h>
+
+#include "local.h"
+
+asmlinkage void ret_from_fork(void);
+
+#include <asm/pgalloc.h>
+
+struct task_struct *alloc_task_struct(void)
+{
+ struct task_struct *p = kmalloc(THREAD_SIZE, GFP_KERNEL);
+ if (p)
+ atomic_set((atomic_t *)(p+1), 1);
+ return p;
+}
+
+void free_task_struct(struct task_struct *p)
+{
+ if (atomic_dec_and_test((atomic_t *)(p+1)))
+ kfree(p);
+}
+
+static void core_sleep_idle(void)
+{
+#ifdef LED_DEBUG_SLEEP
+ /* Show that we're sleeping... */
+ __set_LEDS(0x55aa);
+#endif
+ frv_cpu_core_sleep();
+#ifdef LED_DEBUG_SLEEP
+ /* ... and that we woke up */
+ __set_LEDS(0);
+#endif
+ mb();
+}
+
+void (*idle)(void) = core_sleep_idle;
+
+/*
+ * The idle thread. There's no useful work to be
+ * done, so just try to conserve power and have a
+ * low exit latency (ie sit in a loop waiting for
+ * somebody to say that they'd like to reschedule)
+ */
+void cpu_idle(void)
+{
+ /* endless idle loop with no priority at all */
+ while (1) {
+ while (!need_resched()) {
+ irq_stat[smp_processor_id()].idle_timestamp = jiffies;
+
+ if (!frv_dma_inprogress && idle)
+ idle();
+ }
+
+ schedule();
+ }
+}
+
+void machine_restart(char * __unused)
+{
+ unsigned long reset_addr;
+#ifdef CONFIG_GDBSTUB
+ gdbstub_exit(0);
+#endif
+
+ if (PSR_IMPLE(__get_PSR()) == PSR_IMPLE_FR551)
+ reset_addr = 0xfefff500;
+ else
+ reset_addr = 0xfeff0500;
+
+ /* Software reset. */
+ asm volatile(" dcef @(gr0,gr0),1 ! membar !"
+ " sti %1,@(%0,0) !"
+ " nop ! nop ! nop ! nop ! nop ! "
+ " nop ! nop ! nop ! nop ! nop ! "
+ " nop ! nop ! nop ! nop ! nop ! "
+ " nop ! nop ! nop ! nop ! nop ! "
+ : : "r" (reset_addr), "r" (1) );
+
+ for (;;)
+ ;
+}
+
+void machine_halt(void)
+{
+#ifdef CONFIG_GDBSTUB
+ gdbstub_exit(0);
+#endif
+
+ for (;;);
+}
+
+void machine_power_off(void)
+{
+#ifdef CONFIG_GDBSTUB
+ gdbstub_exit(0);
+#endif
+
+ for (;;);
+}
+
+void flush_thread(void)
+{
+#if 0 //ndef NO_FPU
+ unsigned long zero = 0;
+#endif
+ set_fs(USER_DS);
+}
+
+inline unsigned long user_stack(const struct pt_regs *regs)
+{
+ while (regs->next_frame)
+ regs = regs->next_frame;
+ return user_mode(regs) ? regs->sp : 0;
+}
+
+asmlinkage int sys_fork(void)
+{
+#ifndef CONFIG_MMU
+ /* fork almost works, enough to trick you into looking elsewhere:-( */
+ return -EINVAL;
+#else
+ return do_fork(SIGCHLD, user_stack(__frame), __frame, 0, NULL, NULL);
+#endif
+}
+
+asmlinkage int sys_vfork(void)
+{
+ return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, user_stack(__frame),
__frame, 0,
+ NULL, NULL);
+}
+
+/*****************************************************************************/
+/*
+ * clone a process
+ * - tlsptr is retrieved by copy_thread()
+ */
+asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp,
+ int __user *parent_tidptr, int __user *child_tidptr,
+ int __user *tlsptr)
+{
+ if (!newsp)
+ newsp = user_stack(__frame);
+ return do_fork(clone_flags, newsp, __frame, 0, parent_tidptr,
child_tidptr);
+} /* end sys_clone() */
+
+/*****************************************************************************/
+/*
+ * This gets called before we allocate a new thread and copy
+ * the current task into it.
+ */
+void prepare_to_copy(struct task_struct *tsk)
+{
+ //unlazy_fpu(tsk);
+} /* end prepare_to_copy() */
+
+/*****************************************************************************/
+/*
+ * set up the kernel stack and exception frames for a new process
+ */
+int copy_thread(int nr, unsigned long clone_flags,
+ unsigned long usp, unsigned long topstk,
+ struct task_struct *p, struct pt_regs *regs)
+{
+ struct pt_regs *childregs0, *childregs, *regs0;
+
+ regs0 = __kernel_frame0_ptr;
+ childregs0 = (struct pt_regs *)
+ ((unsigned long) p->thread_info + THREAD_SIZE -
USER_CONTEXT_SIZE);
+ childregs = childregs0;
+
+ /* set up the userspace frame (the only place that the USP is stored) */
+ *childregs0 = *regs0;
+
+ childregs0->gr8 = 0;
+ childregs0->sp = usp;
+ childregs0->next_frame = NULL;
+
+ /* set up the return kernel frame if called from kernel_thread() */
+ if (regs != regs0) {
+ childregs--;
+ *childregs = *regs;
+ childregs->sp = (unsigned long) childregs0;
+ childregs->next_frame = childregs0;
+ childregs->gr15 = (unsigned long) p->thread_info;
+ childregs->gr29 = (unsigned long) p;
+ }
+
+ p->set_child_tid = p->clear_child_tid = NULL;
+
+ p->thread.frame = childregs;
+ p->thread.curr = p;
+ p->thread.sp = (unsigned long) childregs;
+ p->thread.fp = 0;
+ p->thread.lr = 0;
+ p->thread.pc = (unsigned long) ret_from_fork;
+ p->thread.frame0 = childregs0;
+
+ /* the new TLS pointer is passed in as arg #5 to sys_clone() */
+ if (clone_flags & CLONE_SETTLS)
+ childregs->gr29 = childregs->gr12;
+
+ save_user_regs(p->thread.user);
+
+ return 0;
+} /* end copy_thread() */
+
+/*
+ * fill in the user structure for a core dump..
+ */
+void dump_thread(struct pt_regs *regs, struct user *dump)
+{
+#if 0
+ /* changed the size calculations - should hopefully work better. lbt */
+ dump->magic = CMAGIC;
+ dump->start_code = 0;
+ dump->start_stack = user_stack(regs) & ~(PAGE_SIZE - 1);
+ dump->u_tsize = ((unsigned long) current->mm->end_code) >> PAGE_SHIFT;
+ dump->u_dsize = ((unsigned long) (current->mm->brk + (PAGE_SIZE-1))) >>
PAGE_SHIFT;
+ dump->u_dsize -= dump->u_tsize;
+ dump->u_ssize = 0;
+
+ if (dump->start_stack < TASK_SIZE)
+ dump->u_ssize = ((unsigned long) (TASK_SIZE -
dump->start_stack)) >> PAGE_SHIFT;
+
+ dump->regs = *(struct user_context *) regs;
+#endif
+}
+
+/*
+ * sys_execve() executes a new program.
+ */
+asmlinkage int sys_execve(char *name, char **argv, char **envp)
+{
+ int error;
+ char * filename;
+
+ lock_kernel();
+ filename = getname(name);
+ error = PTR_ERR(filename);
+ if (IS_ERR(filename))
+ goto out;
+ error = do_execve(filename, argv, envp, __frame);
+ putname(filename);
+ out:
+ unlock_kernel();
+ return error;
+}
+
+unsigned long get_wchan(struct task_struct *p)
+{
+ struct pt_regs *regs0;
+ unsigned long fp, pc;
+ unsigned long stack_limit;
+ int count = 0;
+ if (!p || p == current || p->state == TASK_RUNNING)
+ return 0;
+
+ stack_limit = (unsigned long) (p + 1);
+ fp = p->thread.fp;
+ regs0 = p->thread.frame0;
+
+ do {
+ if (fp < stack_limit || fp >= (unsigned long) regs0 || fp & 3)
+ return 0;
+
+ pc = ((unsigned long *) fp)[2];
+
+ /* FIXME: This depends on the order of these functions. */
+ if (!in_sched_functions(pc))
+ return pc;
+
+ fp = *(unsigned long *) fp;
+ } while (count++ < 16);
+
+ return 0;
+}
+
+unsigned long thread_saved_pc(struct task_struct *tsk)
+{
+ /* Check whether the thread is blocked in resume() */
+ if (in_sched_functions(tsk->thread.pc))
+ return ((unsigned long *)tsk->thread.fp)[2];
+ else
+ return tsk->thread.pc;
+}
+
+int elf_check_arch(const struct elf32_hdr *hdr)
+{
+ unsigned long hsr0 = __get_HSR(0);
+ unsigned long psr = __get_PSR();
+
+ if (hdr->e_machine != EM_FRV)
+ return 0;
+
+ switch (hdr->e_flags & EF_FRV_GPR_MASK) {
+ case EF_FRV_GPR64:
+ if ((hsr0 & HSR0_GRN) == HSR0_GRN_32)
+ return 0;
+ case EF_FRV_GPR32:
+ case 0:
+ break;
+ default:
+ return 0;
+ }
+
+ switch (hdr->e_flags & EF_FRV_FPR_MASK) {
+ case EF_FRV_FPR64:
+ if ((hsr0 & HSR0_FRN) == HSR0_FRN_32)
+ return 0;
+ case EF_FRV_FPR32:
+ case EF_FRV_FPR_NONE:
+ case 0:
+ break;
+ default:
+ return 0;
+ }
+
+ if ((hdr->e_flags & EF_FRV_MULADD) == EF_FRV_MULADD)
+ if (PSR_IMPLE(psr) != PSR_IMPLE_FR405 &&
+ PSR_IMPLE(psr) != PSR_IMPLE_FR451)
+ return 0;
+
+ switch (hdr->e_flags & EF_FRV_CPU_MASK) {
+ case EF_FRV_CPU_GENERIC:
+ break;
+ case EF_FRV_CPU_FR300:
+ case EF_FRV_CPU_SIMPLE:
+ case EF_FRV_CPU_TOMCAT:
+ default:
+ return 0;
+ case EF_FRV_CPU_FR400:
+ if (PSR_IMPLE(psr) != PSR_IMPLE_FR401 &&
+ PSR_IMPLE(psr) != PSR_IMPLE_FR405 &&
+ PSR_IMPLE(psr) != PSR_IMPLE_FR451 &&
+ PSR_IMPLE(psr) != PSR_IMPLE_FR551)
+ return 0;
+ break;
+ case EF_FRV_CPU_FR450:
+ if (PSR_IMPLE(psr) != PSR_IMPLE_FR451)
+ return 0;
+ break;
+ case EF_FRV_CPU_FR500:
+ if (PSR_IMPLE(psr) != PSR_IMPLE_FR501)
+ return 0;
+ break;
+ case EF_FRV_CPU_FR550:
+ if (PSR_IMPLE(psr) != PSR_IMPLE_FR551)
+ return 0;
+ break;
+ }
+
+ return 1;
+}
diff -urN linux/arch/frv/kernel/ptrace.c linux/arch/frv/kernel/ptrace.c
--- linux/arch/frv/kernel/ptrace.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/ptrace.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,764 @@
+/* ptrace.c: FRV specific parts of process tracing
+ *
+ * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ * - Derived from arch/m68k/kernel/ptrace.c
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/smp.h>
+#include <linux/smp_lock.h>
+#include <linux/errno.h>
+#include <linux/ptrace.h>
+#include <linux/user.h>
+#include <linux/config.h>
+#include <linux/security.h>
+
+#include <asm/uaccess.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/processor.h>
+#include <asm/unistd.h>
+
+/*
+ * does not yet catch signals sent when the child dies.
+ * in exit.c or in signal.c.
+ */
+
+/*
+ * Get contents of register REGNO in task TASK.
+ */
+static inline long get_reg(struct task_struct *task, int regno)
+{
+ struct user_context *user = task->thread.user;
+
+ if (regno < 0 || regno >= PT__END)
+ return 0;
+
+ return ((unsigned long *) user)[regno];
+}
+
+/*
+ * Write contents of register REGNO in task TASK.
+ */
+static inline int put_reg(struct task_struct *task, int regno,
+ unsigned long data)
+{
+ struct user_context *user = task->thread.user;
+
+ if (regno < 0 || regno >= PT__END)
+ return -EIO;
+
+ switch (regno) {
+ case PT_GR(0):
+ return 0;
+ case PT_PSR:
+ case PT__STATUS:
+ return -EIO;
+ default:
+ ((unsigned long *) user)[regno] = data;
+ return 0;
+ }
+}
+
+/*
+ * check that an address falls within the bounds of the target process's
memory mappings
+ */
+static inline int is_user_addr_valid(struct task_struct *child,
+ unsigned long start, unsigned long len)
+{
+#ifdef CONFIG_MMU
+ if (start >= PAGE_OFFSET || len > PAGE_OFFSET - start)
+ return -EIO;
+ return 0;
+#else
+ struct vm_list_struct *vml;
+
+ for (vml = child->mm->context.vmlist; vml; vml = vml->next)
+ if (start >= vml->vma->vm_start && start + len <=
vml->vma->vm_end)
+ return 0;
+
+ return -EIO;
+#endif
+}
+
+/*
+ * Called by kernel/ptrace.c when detaching..
+ *
+ * Control h/w single stepping
+ */
+void ptrace_disable(struct task_struct *child)
+{
+ child->thread.frame0->__status &= ~REG__STATUS_STEP;
+}
+
+void ptrace_enable(struct task_struct *child)
+{
+ child->thread.frame0->__status |= REG__STATUS_STEP;
+}
+
+asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
+{
+ struct task_struct *child;
+ unsigned long tmp;
+ int ret;
+
+ lock_kernel();
+ ret = -EPERM;
+ if (request == PTRACE_TRACEME) {
+ /* are we already being traced? */
+ if (current->ptrace & PT_PTRACED)
+ goto out;
+ ret = security_ptrace(current->parent, current);
+ if (ret)
+ goto out;
+ /* set the ptrace bit in the process flags. */
+ current->ptrace |= PT_PTRACED;
+ ret = 0;
+ goto out;
+ }
+ ret = -ESRCH;
+ read_lock(&tasklist_lock);
+ child = find_task_by_pid(pid);
+ if (child)
+ get_task_struct(child);
+ read_unlock(&tasklist_lock);
+ if (!child)
+ goto out;
+
+ ret = -EPERM;
+ if (pid == 1) /* you may not mess with init */
+ goto out_tsk;
+
+ if (request == PTRACE_ATTACH) {
+ ret = ptrace_attach(child);
+ goto out_tsk;
+ }
+
+ ret = ptrace_check_attach(child, request == PTRACE_KILL);
+ if (ret < 0)
+ goto out_tsk;
+
+ switch (request) {
+ /* when I and D space are separate, these will need to be
fixed. */
+ case PTRACE_PEEKTEXT: /* read word at location addr. */
+ case PTRACE_PEEKDATA: {
+ int copied;
+
+ ret = -EIO;
+ if (is_user_addr_valid(child, addr, sizeof(tmp)) < 0)
+ break;
+
+ copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
+ if (copied != sizeof(tmp))
+ break;
+
+ ret = put_user(tmp,(unsigned long *) data);
+ break;
+ }
+
+ /* read the word at location addr in the USER area. */
+ case PTRACE_PEEKUSR: {
+ tmp = 0;
+ ret = -EIO;
+ if ((addr & 3) || addr < 0)
+ break;
+
+ ret = 0;
+ switch (addr >> 2) {
+ case 0 ... PT__END - 1:
+ tmp = get_reg(child, addr >> 2);
+ break;
+
+ case PT__END + 0:
+ tmp = child->mm->end_code - child->mm->start_code;
+ break;
+
+ case PT__END + 1:
+ tmp = child->mm->end_data - child->mm->start_data;
+ break;
+
+ case PT__END + 2:
+ tmp = child->mm->start_stack - child->mm->start_brk;
+ break;
+
+ case PT__END + 3:
+ tmp = child->mm->start_code;
+ break;
+
+ case PT__END + 4:
+ tmp = child->mm->start_stack;
+ break;
+
+ default:
+ ret = -EIO;
+ break;
+ }
+
+ if (ret == 0)
+ ret = put_user(tmp, (unsigned long *) data);
+ break;
+ }
+
+ /* when I and D space are separate, this will have to be fixed.
*/
+ case PTRACE_POKETEXT: /* write the word at location addr. */
+ case PTRACE_POKEDATA:
+ ret = -EIO;
+ if (is_user_addr_valid(child, addr, sizeof(tmp)) < 0)
+ break;
+ if (access_process_vm(child, addr, &data, sizeof(data), 1) !=
sizeof(data))
+ break;
+ ret = 0;
+ break;
+
+ case PTRACE_POKEUSR: /* write the word at location addr in the USER
area */
+ ret = -EIO;
+ if ((addr & 3) || addr < 0)
+ break;
+
+ ret = 0;
+ switch (addr >> 2) {
+ case 0 ... PT__END-1:
+ ret = put_reg(child, addr >> 2, data);
+ break;
+
+ default:
+ ret = -EIO;
+ break;
+ }
+ break;
+
+ case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall
*/
+ case PTRACE_CONT: /* restart after signal. */
+ ret = -EIO;
+ if ((unsigned long) data > _NSIG)
+ break;
+ if (request == PTRACE_SYSCALL)
+ set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
+ else
+ clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
+ child->exit_code = data;
+ ptrace_disable(child);
+ wake_up_process(child);
+ ret = 0;
+ break;
+
+ /* make the child exit. Best I can do is send it a sigkill.
+ * perhaps it should be put in the status that it wants to
+ * exit.
+ */
+ case PTRACE_KILL:
+ ret = 0;
+ if (child->exit_state == EXIT_ZOMBIE) /* already dead */
+ break;
+ child->exit_code = SIGKILL;
+ clear_tsk_thread_flag(child, TIF_SINGLESTEP);
+ ptrace_disable(child);
+ wake_up_process(child);
+ break;
+
+ case PTRACE_SINGLESTEP: /* set the trap flag. */
+ ret = -EIO;
+ if ((unsigned long) data > _NSIG)
+ break;
+ clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
+ ptrace_enable(child);
+ child->exit_code = data;
+ wake_up_process(child);
+ ret = 0;
+ break;
+
+ case PTRACE_DETACH: /* detach a process that was attached. */
+ ret = ptrace_detach(child, data);
+ break;
+
+ case PTRACE_GETREGS: { /* Get all integer regs from the child. */
+ int i;
+ for (i = 0; i < PT__GPEND; i++) {
+ tmp = get_reg(child, i);
+ if (put_user(tmp, (unsigned long *) data)) {
+ ret = -EFAULT;
+ break;
+ }
+ data += sizeof(long);
+ }
+ ret = 0;
+ break;
+ }
+
+ case PTRACE_SETREGS: { /* Set all integer regs in the child. */
+ int i;
+ for (i = 0; i < PT__GPEND; i++) {
+ if (get_user(tmp, (unsigned long *) data)) {
+ ret = -EFAULT;
+ break;
+ }
+ put_reg(child, i, tmp);
+ data += sizeof(long);
+ }
+ ret = 0;
+ break;
+ }
+
+ case PTRACE_GETFPREGS: { /* Get the child FP/Media state. */
+ ret = 0;
+ if (copy_to_user((void *) data,
+ &child->thread.user->f,
+ sizeof(child->thread.user->f)))
+ ret = -EFAULT;
+ break;
+ }
+
+ case PTRACE_SETFPREGS: { /* Set the child FP/Media state. */
+ ret = 0;
+ if (copy_from_user(&child->thread.user->f,
+ (void *) data,
+ sizeof(child->thread.user->f)))
+ ret = -EFAULT;
+ break;
+ }
+
+ case PTRACE_GETFDPIC:
+ tmp = 0;
+ switch (addr) {
+ case PTRACE_GETFDPIC_EXEC:
+ tmp = child->mm->context.exec_fdpic_loadmap;
+ break;
+ case PTRACE_GETFDPIC_INTERP:
+ tmp = child->mm->context.interp_fdpic_loadmap;
+ break;
+ default:
+ break;
+ }
+
+ ret = 0;
+ if (put_user(tmp, (unsigned long *) data)) {
+ ret = -EFAULT;
+ break;
+ }
+ break;
+
+ default:
+ ret = -EIO;
+ break;
+ }
+out_tsk:
+ put_task_struct(child);
+out:
+ unlock_kernel();
+ return ret;
+}
+
+int __nongprelbss kstrace;
+
+static const struct {
+ const char *name;
+ unsigned argmask;
+} __syscall_name_table[NR_syscalls] = {
+ [0] = { "restart_syscall" },
+ [1] = { "exit", 0x000001 },
+ [2] = { "fork", 0xffffff },
+ [3] = { "read", 0x000141 },
+ [4] = { "write", 0x000141 },
+ [5] = { "open", 0x000235 },
+ [6] = { "close", 0x000001 },
+ [7] = { "waitpid", 0x000141 },
+ [8] = { "creat", 0x000025 },
+ [9] = { "link", 0x000055 },
+ [10] = { "unlink", 0x000005 },
+ [11] = { "execve", 0x000445 },
+ [12] = { "chdir", 0x000005 },
+ [13] = { "time", 0x000004 },
+ [14] = { "mknod", 0x000325 },
+ [15] = { "chmod", 0x000025 },
+ [16] = { "lchown", 0x000025 },
+ [17] = { "break" },
+ [18] = { "oldstat", 0x000045 },
+ [19] = { "lseek", 0x000131 },
+ [20] = { "getpid", 0xffffff },
+ [21] = { "mount", 0x043555 },
+ [22] = { "umount", 0x000005 },
+ [23] = { "setuid", 0x000001 },
+ [24] = { "getuid", 0xffffff },
+ [25] = { "stime", 0x000004 },
+ [26] = { "ptrace", 0x004413 },
+ [27] = { "alarm", 0x000001 },
+ [28] = { "oldfstat", 0x000041 },
+ [29] = { "pause", 0xffffff },
+ [30] = { "utime", 0x000045 },
+ [31] = { "stty" },
[%d lines skipped]
367diff -urN linux/arch/frv/kernel/semaphore.c linux/arch/frv/kernel/semaphore.c
--- linux/arch/frv/kernel/semaphore.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/semaphore.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,142 @@
+/* semaphore.c: FR-V semaphores
+ *
+ * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ * - Derived from lib/rwsem-spinlock.c
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/sched.h>
+#include <linux/module.h>
+#include <asm/semaphore.h>
+
+struct sem_waiter {
+ struct list_head list;
+ struct task_struct *task;
+};
+
+#if SEM_DEBUG
+void semtrace(struct semaphore *sem, const char *str)
+{
+ if (sem->debug)
+ printk("[%d] %s({%d,%d})\n",
+ current->pid,
+ str,
+ sem->counter,
+ list_empty(&sem->wait_list) ? 0 : 1);
+}
+#else
+#define semtrace(SEM,STR) do { } while(0)
+#endif
+
+/*
+ * wait for a token to be granted from a semaphore
+ * - entered with lock held and interrupts disabled
+ */
+void __down(struct semaphore *sem, unsigned long flags)
+{
+ struct task_struct *tsk = current;
+ struct sem_waiter waiter;
+
+ semtrace(sem,"Entering __down");
+
+ /* set up my own style of waitqueue */
+ waiter.task = tsk;
+
+ list_add_tail(&waiter.list, &sem->wait_list);
+
+ /* we don't need to touch the semaphore struct anymore */
+ spin_unlock_irqrestore(&sem->wait_lock, flags);
+
+ /* wait to be given the lock */
+ set_task_state(tsk, TASK_UNINTERRUPTIBLE);
+
+ for (;;) {
+ if (list_empty(&waiter.list))
+ break;
+ schedule();
+ set_task_state(tsk, TASK_UNINTERRUPTIBLE);
+ }
+
+ tsk->state = TASK_RUNNING;
+ semtrace(sem,"Leaving __down");
+}
+
+EXPORT_SYMBOL(__down);
+
+/*
+ * interruptibly wait for a token to be granted from a semaphore
+ * - entered with lock held and interrupts disabled
+ */
+int __down_interruptible(struct semaphore *sem, unsigned long flags)
+{
+ struct task_struct *tsk = current;
+ struct sem_waiter waiter;
+ int ret;
+
+ semtrace(sem,"Entering __down_interruptible");
+
+ /* set up my own style of waitqueue */
+ waiter.task = tsk;
+
+ list_add_tail(&waiter.list, &sem->wait_list);
+
+ /* we don't need to touch the semaphore struct anymore */
+ set_task_state(tsk, TASK_INTERRUPTIBLE);
+
+ spin_unlock_irqrestore(&sem->wait_lock, flags);
+
+ /* wait to be given the lock */
+ ret = 0;
+ for (;;) {
+ if (list_empty(&waiter.list))
+ break;
+ if (unlikely(signal_pending(current)))
+ goto interrupted;
+ schedule();
+ set_task_state(tsk, TASK_INTERRUPTIBLE);
+ }
+
+ out:
+ tsk->state = TASK_RUNNING;
+ semtrace(sem, "Leaving __down_interruptible");
+ return ret;
+
+ interrupted:
+ spin_lock_irqsave(&sem->wait_lock, flags);
+
+ if (!list_empty(&waiter.list)) {
+ list_del(&waiter.list);
+ ret = -EINTR;
+ }
+
+ spin_unlock_irqrestore(&sem->wait_lock, flags);
+ goto out;
+}
+
+EXPORT_SYMBOL(__down_interruptible);
+
+/*
+ * release a single token back to a semaphore
+ * - entered with lock held and interrupts disabled
+ */
+void __up(struct semaphore *sem)
+{
+ struct sem_waiter *waiter;
+
+ semtrace(sem,"Entering __up");
+
+ /* grant the token to the process at the front of the queue */
+ waiter = list_entry(sem->wait_list.next, struct sem_waiter, list);
+ list_del_init(&waiter->list);
+ wake_up_process(waiter->task);
+
+ semtrace(sem,"Leaving __up");
+}
+
+EXPORT_SYMBOL(__up);
diff -urN linux/arch/frv/kernel/setup.c linux/arch/frv/kernel/setup.c
--- linux/arch/frv/kernel/setup.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/setup.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,1197 @@
+/* setup.c: FRV specific setup
+ *
+ * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ * - Derived from arch/m68k/kernel/setup.c
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+#include <linux/fb.h>
+#include <linux/console.h>
+#include <linux/genhd.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/major.h>
+#include <linux/bootmem.h>
+#include <linux/highmem.h>
+#include <linux/seq_file.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+#include <linux/serial_reg.h>
+
+#include <asm/setup.h>
+#include <asm/serial.h>
+#include <asm/irq.h>
+#include <asm/sections.h>
+#include <asm/pgalloc.h>
+#include <asm/busctl-regs.h>
+#include <asm/serial-regs.h>
+#include <asm/timer-regs.h>
+#include <asm/irc-regs.h>
+#include <asm/spr-regs.h>
+#include <asm/mb-regs.h>
+#include <asm/mb93493-regs.h>
+#include <asm/gdb-stub.h>
+#include <asm/irq-routing.h>
+#include <asm/io.h>
+
+#ifdef CONFIG_BLK_DEV_INITRD
+#include <linux/blk.h>
+#include <asm/pgtable.h>
+#endif
+
+#include "local.h"
+
+#ifdef CONFIG_MB93090_MB00
+static void __init mb93090_display(void);
+#endif
+#ifdef CONFIG_MMU
+static void __init setup_linux_memory(void);
+#else
+static void __init setup_uclinux_memory(void);
+#endif
+
+#ifdef CONFIG_CONSOLE
+extern struct consw *conswitchp;
+#ifdef CONFIG_FRAMEBUFFER
+extern struct consw fb_con;
+#endif
+#endif
+
+#ifdef CONFIG_MB93090_MB00
+static char __initdata mb93090_banner[] = "FJ/RH FR-V Linux";
+static char __initdata mb93090_version[] = UTS_RELEASE;
+
+int __nongprelbss mb93090_mb00_detected;
+#endif
+
+const char __frv_unknown_system[] = "unknown";
+const char __frv_mb93091_cb10[] = "mb93091-cb10";
+const char __frv_mb93091_cb11[] = "mb93091-cb11";
+const char __frv_mb93091_cb30[] = "mb93091-cb30";
+const char __frv_mb93091_cb41[] = "mb93091-cb41";
+const char __frv_mb93091_cb60[] = "mb93091-cb60";
+const char __frv_mb93091_cb70[] = "mb93091-cb70";
+const char __frv_mb93091_cb451[] = "mb93091-cb451";
+const char __frv_mb93090_mb00[] = "mb93090-mb00";
+
+const char __frv_mb93493[] = "mb93493";
+
+const char __frv_mb93093[] = "mb93093";
+
+static const char *__nongprelbss cpu_series;
+static const char *__nongprelbss cpu_core;
+static const char *__nongprelbss cpu_silicon;
+static const char *__nongprelbss cpu_mmu;
+static const char *__nongprelbss cpu_system;
+static const char *__nongprelbss cpu_board1;
+static const char *__nongprelbss cpu_board2;
+
+static unsigned long __nongprelbss cpu_psr_all;
+static unsigned long __nongprelbss cpu_hsr0_all;
+
+unsigned long __nongprelbss pdm_suspend_mode;
+
+unsigned long __nongprelbss rom_length;
+unsigned long __nongprelbss memory_start;
+unsigned long __nongprelbss memory_end;
+
+unsigned long __nongprelbss dma_coherent_mem_start;
+unsigned long __nongprelbss dma_coherent_mem_end;
+
+unsigned long __initdata __sdram_old_base;
+unsigned long __initdata num_mappedpages;
+
+struct cpuinfo_frv __nongprelbss boot_cpu_data;
+
+char command_line[COMMAND_LINE_SIZE];
+char __initdata redboot_command_line[COMMAND_LINE_SIZE];
+
+#ifdef CONFIG_PM
+#define __pminit
+#define __pminitdata
+#else
+#define __pminit __init
+#define __pminitdata __initdata
+#endif
+
+struct clock_cmode {
+ uint8_t xbus, sdram, corebus, core, dsu;
+};
+
+#define _frac(N,D) ((N)<<4 | (D))
+#define _x0_16 _frac(1,6)
+#define _x0_25 _frac(1,4)
+#define _x0_33 _frac(1,3)
+#define _x0_375 _frac(3,8)
+#define _x0_5 _frac(1,2)
+#define _x0_66 _frac(2,3)
+#define _x0_75 _frac(3,4)
+#define _x1 _frac(1,1)
+#define _x1_5 _frac(3,2)
+#define _x2 _frac(2,1)
+#define _x3 _frac(3,1)
+#define _x4 _frac(4,1)
+#define _x4_5 _frac(9,2)
+#define _x6 _frac(6,1)
+#define _x8 _frac(8,1)
+#define _x9 _frac(9,1)
+
+int __nongprelbss clock_p0_current;
+int __nongprelbss clock_cm_current;
+int __nongprelbss clock_cmode_current;
+#ifdef CONFIG_PM
+int __nongprelbss clock_cmodes_permitted;
+unsigned long __nongprelbss clock_bits_settable;
+#endif
+
+static struct clock_cmode __pminitdata undef_clock_cmode = { _x1, _x1, _x1,
_x1, _x1 };
+
+static struct clock_cmode __pminitdata clock_cmodes_fr401_fr403[16] = {
+ [4] = { _x1, _x1, _x2, _x2, _x0_25 },
+ [5] = { _x1, _x2, _x4, _x4, _x0_5 },
+ [8] = { _x1, _x1, _x1, _x2, _x0_25 },
+ [9] = { _x1, _x2, _x2, _x4, _x0_5 },
+ [11] = { _x1, _x4, _x4, _x8, _x1 },
+ [12] = { _x1, _x1, _x2, _x4, _x0_5 },
+ [13] = { _x1, _x2, _x4, _x8, _x1 },
+};
+
+static struct clock_cmode __pminitdata clock_cmodes_fr405[16] = {
+ [0] = { _x1, _x1, _x1, _x1, _x0_5 },
+ [1] = { _x1, _x1, _x1, _x3, _x0_25 },
+ [2] = { _x1, _x1, _x2, _x6, _x0_5 },
+ [3] = { _x1, _x2, _x2, _x6, _x0_5 },
+ [4] = { _x1, _x1, _x2, _x2, _x0_16 },
+ [8] = { _x1, _x1, _x1, _x2, _x0_16 },
+ [9] = { _x1, _x2, _x2, _x4, _x0_33 },
+ [12] = { _x1, _x1, _x2, _x4, _x0_33 },
+ [14] = { _x1, _x3, _x3, _x9, _x0_75 },
+ [15] = { _x1, _x1_5, _x1_5, _x4_5, _x0_375 },
+
+#define CLOCK_CMODES_PERMITTED_FR405 0xd31f
+};
+
+static struct clock_cmode __pminitdata clock_cmodes_fr555[16] = {
+ [0] = { _x1, _x2, _x2, _x4, _x0_33 },
+ [1] = { _x1, _x3, _x3, _x6, _x0_5 },
+ [2] = { _x1, _x2, _x4, _x8, _x0_66 },
+ [3] = { _x1, _x1_5, _x3, _x6, _x0_5 },
+ [4] = { _x1, _x3, _x3, _x9, _x0_75 },
+ [5] = { _x1, _x2, _x2, _x6, _x0_5 },
+ [6] = { _x1, _x1_5, _x1_5, _x4_5, _x0_375 },
+};
+
+static const struct clock_cmode __pminitdata *clock_cmodes;
+static int __pminitdata clock_doubled;
+
+static struct uart_port __initdata __frv_uart0 = {
+ .uartclk = 0,
+ .membase = (char *) UART0_BASE,
+ .irq = IRQ_CPU_UART0,
+ .regshift = 3,
+ .iotype = UPIO_MEM,
+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+};
+
+static struct uart_port __initdata __frv_uart1 = {
+ .uartclk = 0,
+ .membase = (char *) UART1_BASE,
+ .irq = IRQ_CPU_UART1,
+ .regshift = 3,
+ .iotype = UPIO_MEM,
+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+};
+
+#if 0
+static void __init printk_xampr(unsigned long ampr, unsigned long amlr, char
i_d, int n)
+{
+ unsigned long phys, virt, cxn, size;
+
+#ifdef CONFIG_MMU
+ virt = amlr & 0xffffc000;
+ cxn = amlr & 0x3fff;
+#else
+ virt = ampr & 0xffffc000;
+ cxn = 0;
+#endif
+ phys = ampr & xAMPRx_PPFN;
+ size = 1 << (((ampr & xAMPRx_SS) >> 4) + 17);
+
+ printk("%cAMPR%d: va %08lx-%08lx [pa %08lx] %c%c%c%c [cxn:%04lx]\n",
+ i_d, n,
+ virt, virt + size - 1,
+ phys,
+ ampr & xAMPRx_S ? 'S' : '-',
+ ampr & xAMPRx_C ? 'C' : '-',
+ ampr & DAMPRx_WP ? 'W' : '-',
+ ampr & xAMPRx_V ? 'V' : '-',
+ cxn
+ );
+}
+#endif
+
+/*****************************************************************************/
+/*
+ * dump the memory map
+ */
+static void __init dump_memory_map(void)
+{
+
+#if 0
+ /* dump the protection map */
+ printk_xampr(__get_IAMPR(0), __get_IAMLR(0), 'I', 0);
+ printk_xampr(__get_IAMPR(1), __get_IAMLR(1), 'I', 1);
+ printk_xampr(__get_IAMPR(2), __get_IAMLR(2), 'I', 2);
+ printk_xampr(__get_IAMPR(3), __get_IAMLR(3), 'I', 3);
+ printk_xampr(__get_IAMPR(4), __get_IAMLR(4), 'I', 4);
+ printk_xampr(__get_IAMPR(5), __get_IAMLR(5), 'I', 5);
+ printk_xampr(__get_IAMPR(6), __get_IAMLR(6), 'I', 6);
+ printk_xampr(__get_IAMPR(7), __get_IAMLR(7), 'I', 7);
+ printk_xampr(__get_IAMPR(8), __get_IAMLR(8), 'I', 8);
+ printk_xampr(__get_IAMPR(9), __get_IAMLR(9), 'i', 9);
+ printk_xampr(__get_IAMPR(10), __get_IAMLR(10), 'I', 10);
+ printk_xampr(__get_IAMPR(11), __get_IAMLR(11), 'I', 11);
+ printk_xampr(__get_IAMPR(12), __get_IAMLR(12), 'I', 12);
+ printk_xampr(__get_IAMPR(13), __get_IAMLR(13), 'I', 13);
+ printk_xampr(__get_IAMPR(14), __get_IAMLR(14), 'I', 14);
+ printk_xampr(__get_IAMPR(15), __get_IAMLR(15), 'I', 15);
+
+ printk_xampr(__get_DAMPR(0), __get_DAMLR(0), 'D', 0);
+ printk_xampr(__get_DAMPR(1), __get_DAMLR(1), 'D', 1);
+ printk_xampr(__get_DAMPR(2), __get_DAMLR(2), 'D', 2);
+ printk_xampr(__get_DAMPR(3), __get_DAMLR(3), 'D', 3);
+ printk_xampr(__get_DAMPR(4), __get_DAMLR(4), 'D', 4);
+ printk_xampr(__get_DAMPR(5), __get_DAMLR(5), 'D', 5);
+ printk_xampr(__get_DAMPR(6), __get_DAMLR(6), 'D', 6);
+ printk_xampr(__get_DAMPR(7), __get_DAMLR(7), 'D', 7);
+ printk_xampr(__get_DAMPR(8), __get_DAMLR(8), 'D', 8);
+ printk_xampr(__get_DAMPR(9), __get_DAMLR(9), 'D', 9);
+ printk_xampr(__get_DAMPR(10), __get_DAMLR(10), 'D', 10);
+ printk_xampr(__get_DAMPR(11), __get_DAMLR(11), 'D', 11);
+ printk_xampr(__get_DAMPR(12), __get_DAMLR(12), 'D', 12);
+ printk_xampr(__get_DAMPR(13), __get_DAMLR(13), 'D', 13);
+ printk_xampr(__get_DAMPR(14), __get_DAMLR(14), 'D', 14);
+ printk_xampr(__get_DAMPR(15), __get_DAMLR(15), 'D', 15);
+#endif
+
+#if 0
+ /* dump the bus controller registers */
+ printk("LGCR: %08lx\n", __get_LGCR());
+ printk("Master: %08lx-%08lx CR=%08lx\n",
+ __get_LEMBR(), __get_LEMBR() + __get_LEMAM(),
+ __get_LMAICR());
+
+ int loop;
+ for (loop = 1; loop <= 7; loop++) {
+ unsigned long lcr = __get_LCR(loop), lsbr = __get_LSBR(loop);
+ printk("CS#%d: %08lx-%08lx %c%c%c%c%c%c%c%c%c\n",
+ loop,
+ lsbr, lsbr + __get_LSAM(loop),
+ lcr & 0x80000000 ? 'r' : '-',
+ lcr & 0x40000000 ? 'w' : '-',
+ lcr & 0x08000000 ? 'b' : '-',
+ lcr & 0x04000000 ? 'B' : '-',
+ lcr & 0x02000000 ? 'C' : '-',
+ lcr & 0x01000000 ? 'D' : '-',
+ lcr & 0x00800000 ? 'W' : '-',
+ lcr & 0x00400000 ? 'R' : '-',
+ (lcr & 0x00030000) == 0x00000000 ? '4' :
+ (lcr & 0x00030000) == 0x00010000 ? '2' :
+ (lcr & 0x00030000) == 0x00020000 ? '1' :
+ '-'
+ );
+ }
+#endif
+
+#if 0
+ printk("\n");
+#endif
+} /* end dump_memory_map() */
+
+/*****************************************************************************/
+/*
+ * attempt to detect a VDK motherboard and DAV daughter board on an MB93091
system
+ */
+#ifdef CONFIG_MB93091_VDK
+static void __init detect_mb93091(void)
+{
+#ifdef CONFIG_MB93090_MB00
+ /* Detect CB70 without motherboard */
+ if (!(cpu_system == __frv_mb93091_cb70 && ((*(unsigned short
*)0xffc00030) & 0x100))) {
+ cpu_board1 = __frv_mb93090_mb00;
+ mb93090_mb00_detected = 1;
+ }
+#endif
+
+#ifdef CONFIG_FUJITSU_MB93493
+ cpu_board2 = __frv_mb93493;
+#endif
+
+} /* end detect_mb93091() */
+#endif
+
+/*****************************************************************************/
+/*
+ * determine the CPU type and set appropriate parameters
+ *
+ * Family Series CPU Core Silicon Imple Vers
+ * ----------------------------------------------------------
+ * FR-V --+-> FR400 --+-> FR401 --+-> MB93401 02 00 [1]
+ * | | |
+ * | | +-> MB93401/A 02 01
+ * | | |
+ * | | +-> MB93403 02 02
+ * | |
+ * | +-> FR405 ----> MB93405 04 00
+ * |
+ * +-> FR450 ----> FR451 ----> MB93451 05 00
+ * |
+ * +-> FR500 ----> FR501 --+-> MB93501 01 01 [2]
+ * | |
+ * | +-> MB93501/A 01 02
+ * |
+ * +-> FR550 --+-> FR551 ----> MB93555 03 01
+ *
+ * [1] The MB93401 is an obsolete CPU replaced by the MB93401A
+ * [2] The MB93501 is an obsolete CPU replaced by the MB93501A
+ *
+ * Imple is PSR(Processor Status Register)[31:28].
+ * Vers is PSR(Processor Status Register)[27:24].
+ *
+ * A "Silicon" consists of CPU core and some on-chip peripherals.
+ */
+static void __init determine_cpu(void)
+{
+ unsigned long hsr0 = __get_HSR(0);
+ unsigned long psr = __get_PSR();
+
+ /* work out what selectable services the CPU supports */
+ __set_PSR(psr | PSR_EM | PSR_EF | PSR_CM | PSR_NEM);
+ cpu_psr_all = __get_PSR();
+ __set_PSR(psr);
+
+ __set_HSR(0, hsr0 | HSR0_GRLE | HSR0_GRHE | HSR0_FRLE | HSR0_FRHE);
+ cpu_hsr0_all = __get_HSR(0);
+ __set_HSR(0, hsr0);
+
+ /* derive other service specs from the CPU type */
+ cpu_series = "unknown";
+ cpu_core = "unknown";
+ cpu_silicon = "unknown";
+ cpu_mmu = "Prot";
+ cpu_system = __frv_unknown_system;
+ clock_cmodes = NULL;
+ clock_doubled = 0;
[%d lines skipped]
800diff -urN linux/arch/frv/kernel/signal.c linux/arch/frv/kernel/signal.c
--- linux/arch/frv/kernel/signal.c 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/signal.c Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,598 @@
+/* signal.c: FRV specific bits of signal handling
+ *
+ * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ * - Derived from arch/m68k/kernel/signal.c
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/smp.h>
+#include <linux/smp_lock.h>
+#include <linux/kernel.h>
+#include <linux/signal.h>
+#include <linux/errno.h>
+#include <linux/wait.h>
+#include <linux/ptrace.h>
+#include <linux/unistd.h>
+#include <linux/personality.h>
+#include <linux/suspend.h>
+#include <asm/ucontext.h>
+#include <asm/uaccess.h>
+#include <asm/cacheflush.h>
+
+#define DEBUG_SIG 0
+
+#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
+
+struct fdpic_func_descriptor {
+ unsigned long text;
+ unsigned long GOT;
+};
+
+asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset);
+
+/*
+ * Atomically swap in the new signal mask, and wait for a signal.
+ */
+asmlinkage int sys_sigsuspend(int history0, int history1, old_sigset_t mask)
+{
+ sigset_t saveset;
+
+ mask &= _BLOCKABLE;
+ spin_lock_irq(¤t->sighand->siglock);
+ saveset = current->blocked;
+ siginitset(¤t->blocked, mask);
+ recalc_sigpending();
+ spin_unlock_irq(¤t->sighand->siglock);
+
+ __frame->gr8 = -EINTR;
+ while (1) {
+ current->state = TASK_INTERRUPTIBLE;
+ schedule();
+ if (do_signal(__frame, &saveset))
+ /* return the signal number as the return value of this
function
+ * - this is an utterly evil hack. syscalls should not
invoke do_signal()
+ * as entry.S sets regs->gr8 to the return value of
the system call
+ * - we can't just use sigpending() as we'd have to
discard SIG_IGN signals
+ * and call waitpid() if SIGCHLD needed discarding
+ * - this only works on the i386 because it passes
arguments to the signal
+ * handler on the stack, and the return value in EAX
is effectively
+ * discarded
+ */
+ return __frame->gr8;
+ }
+}
+
+asmlinkage int sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize)
+{
+ sigset_t saveset, newset;
+
+ /* XXX: Don't preclude handling different sized sigset_t's. */
+ if (sigsetsize != sizeof(sigset_t))
+ return -EINVAL;
+
+ if (copy_from_user(&newset, unewset, sizeof(newset)))
+ return -EFAULT;
+ sigdelsetmask(&newset, ~_BLOCKABLE);
+
+ spin_lock_irq(¤t->sighand->siglock);
+ saveset = current->blocked;
+ current->blocked = newset;
+ recalc_sigpending();
+ spin_unlock_irq(¤t->sighand->siglock);
+
+ __frame->gr8 = -EINTR;
+ while (1) {
+ current->state = TASK_INTERRUPTIBLE;
+ schedule();
+ if (do_signal(__frame, &saveset))
+ /* return the signal number as the return value of this
function
+ * - this is an utterly evil hack. syscalls should not
invoke do_signal()
+ * as entry.S sets regs->gr8 to the return value of
the system call
+ * - we can't just use sigpending() as we'd have to
discard SIG_IGN signals
+ * and call waitpid() if SIGCHLD needed discarding
+ * - this only works on the i386 because it passes
arguments to the signal
+ * handler on the stack, and the return value in EAX
is effectively
+ * discarded
+ */
+ return __frame->gr8;
+ }
+}
+
+asmlinkage int sys_sigaction(int sig,
+ const struct old_sigaction __user *act,
+ struct old_sigaction __user *oact)
+{
+ struct k_sigaction new_ka, old_ka;
+ int ret;
+
+ if (act) {
+ old_sigset_t mask;
+ if (verify_area(VERIFY_READ, act, sizeof(*act)) ||
+ __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
+ __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
+ return -EFAULT;
+ __get_user(new_ka.sa.sa_flags, &act->sa_flags);
+ __get_user(mask, &act->sa_mask);
+ siginitset(&new_ka.sa.sa_mask, mask);
+ }
+
+ ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
+
+ if (!ret && oact) {
+ if (verify_area(VERIFY_WRITE, oact, sizeof(*oact)) ||
+ __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
+ __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
+ return -EFAULT;
+ __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
+ __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
+ }
+
+ return ret;
+}
+
+asmlinkage
+int sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
+{
+ return do_sigaltstack(uss, uoss, __frame->sp);
+}
+
+
+/*
+ * Do a signal return; undo the signal stack.
+ */
+
+struct sigframe
+{
+ void (*pretcode)(void);
+ int sig;
+ struct sigcontext sc;
+ unsigned long extramask[_NSIG_WORDS-1];
+ uint32_t retcode[2];
+};
+
+struct rt_sigframe
+{
+ void (*pretcode)(void);
+ int sig;
+ struct siginfo *pinfo;
+ void *puc;
+ struct siginfo info;
+ struct ucontext uc;
+ uint32_t retcode[2];
+};
+
+static int restore_sigcontext(struct sigcontext __user *sc, int *_gr8)
+{
+ struct user_context *user = current->thread.user;
+ unsigned long tbr, psr;
+
+ tbr = user->i.tbr;
+ psr = user->i.psr;
+ if (copy_from_user(user, &sc->sc_context, sizeof(sc->sc_context)))
+ goto badframe;
+ user->i.tbr = tbr;
+ user->i.psr = psr;
+
+ restore_user_regs(user);
+
+ user->i.syscallno = -1; /* disable syscall checks */
+
+ *_gr8 = user->i.gr[8];
+ return 0;
+
+ badframe:
+ return 1;
+}
+
+asmlinkage int sys_sigreturn(void)
+{
+ struct sigframe __user *frame = (struct sigframe __user *) __frame->sp;
+ sigset_t set;
+ int gr8;
+
+ if (verify_area(VERIFY_READ, frame, sizeof(*frame)))
+ goto badframe;
+ if (__get_user(set.sig[0], &frame->sc.sc_oldmask))
+ goto badframe;
+
+ if (_NSIG_WORDS > 1 &&
+ __copy_from_user(&set.sig[1], &frame->extramask,
sizeof(frame->extramask)))
+ goto badframe;
+
+ sigdelsetmask(&set, ~_BLOCKABLE);
+ spin_lock_irq(¤t->sighand->siglock);
+ current->blocked = set;
+ recalc_sigpending();
+ spin_unlock_irq(¤t->sighand->siglock);
+
+ if (restore_sigcontext(&frame->sc, &gr8))
+ goto badframe;
+ return gr8;
+
+ badframe:
+ force_sig(SIGSEGV, current);
+ return 0;
+}
+
+asmlinkage int sys_rt_sigreturn(void)
+{
+ struct rt_sigframe __user *frame = (struct rt_sigframe __user *)
__frame->sp;
+ sigset_t set;
+ stack_t st;
+ int gr8;
+
+ if (verify_area(VERIFY_READ, frame, sizeof(*frame)))
+ goto badframe;
+ if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
+ goto badframe;
+
+ sigdelsetmask(&set, ~_BLOCKABLE);
+ spin_lock_irq(¤t->sighand->siglock);
+ current->blocked = set;
+ recalc_sigpending();
+ spin_unlock_irq(¤t->sighand->siglock);
+
+ if (restore_sigcontext(&frame->uc.uc_mcontext, &gr8))
+ goto badframe;
+
+ if (__copy_from_user(&st, &frame->uc.uc_stack, sizeof(st)))
+ goto badframe;
+
+ /* It is more difficult to avoid calling this function than to
+ * call it and ignore errors. */
+ /*
+ * THIS CANNOT WORK! "&st" is a kernel address, and "do_sigaltstack()"
+ * takes a user address (and verifies that it is a user address). End
+ * result: it does exactly _nothing_.
+ */
+ do_sigaltstack(&st, NULL, __frame->sp);
+
+ return gr8;
+
+badframe:
+ force_sig(SIGSEGV, current);
+ return 0;
+}
+
+/*
+ * Set up a signal frame
+ */
+static int setup_sigcontext(struct sigcontext __user *sc, unsigned long mask)
+{
+ save_user_regs(current->thread.user);
+
+ if (copy_to_user(&sc->sc_context, current->thread.user,
sizeof(sc->sc_context)) != 0)
+ goto badframe;
+
+ /* non-iBCS2 extensions.. */
+ if (__put_user(mask, &sc->sc_oldmask) < 0)
+ goto badframe;
+
+ return 0;
+
+ badframe:
+ return 1;
+}
+
+/*****************************************************************************/
+/*
+ * Determine which stack to use..
+ */
+static inline void __user *get_sigframe(struct k_sigaction *ka,
+ struct pt_regs *regs,
+ size_t frame_size)
+{
+ unsigned long sp;
+
+ /* Default to using normal stack */
+ sp = regs->sp;
+
+ /* This is the X/Open sanctioned signal stack switching. */
+ if (ka->sa.sa_flags & SA_ONSTACK) {
+ if (! on_sig_stack(sp))
+ sp = current->sas_ss_sp + current->sas_ss_size;
+ }
+
+ return (void __user *) ((sp - frame_size) & ~7UL);
+} /* end get_sigframe() */
+
+/*****************************************************************************/
+/*
+ *
+ */
+static void setup_frame(int sig, struct k_sigaction *ka, sigset_t *set, struct
pt_regs * regs)
+{
+ struct sigframe __user *frame;
+ int rsig;
+
+ frame = get_sigframe(ka, regs, sizeof(*frame));
+
+ if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
+ goto give_sigsegv;
+
+ rsig = sig;
+ if (sig < 32 &&
+ __current_thread_info->exec_domain &&
+ __current_thread_info->exec_domain->signal_invmap)
+ rsig = __current_thread_info->exec_domain->signal_invmap[sig];
+
+ if (__put_user(rsig, &frame->sig) < 0)
+ goto give_sigsegv;
+
+ if (setup_sigcontext(&frame->sc, set->sig[0]))
+ goto give_sigsegv;
+
+ if (_NSIG_WORDS > 1) {
+ if (__copy_to_user(frame->extramask, &set->sig[1],
+ sizeof(frame->extramask)))
+ goto give_sigsegv;
+ }
+
+ /* Set up to return from userspace. If provided, use a stub
+ * already in userspace. */
+ if (ka->sa.sa_flags & SA_RESTORER) {
+ if (__put_user(ka->sa.sa_restorer, &frame->pretcode) < 0)
+ goto give_sigsegv;
+ }
+ else {
+ /* Set up the following code on the stack:
+ * setlos #__NR_sigreturn,gr7
+ * tira gr0,0
+ */
+ if (__put_user((void (*)(void))frame->retcode,
&frame->pretcode) ||
+ __put_user(0x8efc0000|__NR_sigreturn, &frame->retcode[0]) ||
+ __put_user(0xc0700000, &frame->retcode[1]))
+ goto give_sigsegv;
+
+ flush_icache_range((unsigned long) frame->retcode,
+ (unsigned long) (frame->retcode + 2));
+ }
+
+ /* set up registers for signal handler */
+ regs->sp = (unsigned long) frame;
+ regs->lr = (unsigned long) &frame->retcode;
+ regs->gr8 = sig;
+
+ if (get_personality & FDPIC_FUNCPTRS) {
+ struct fdpic_func_descriptor __user *funcptr =
+ (struct fdpic_func_descriptor *) ka->sa.sa_handler;
+ __get_user(regs->pc, &funcptr->text);
+ __get_user(regs->gr15, &funcptr->GOT);
+ } else {
+ regs->pc = (unsigned long) ka->sa.sa_handler;
+ regs->gr15 = 0;
+ }
+
+ set_fs(USER_DS);
+
+#if DEBUG_SIG
+ printk("SIG deliver %d (%s:%d): sp=%p pc=%lx ra=%p\n",
+ sig, current->comm, current->pid, frame, regs->pc,
frame->pretcode);
+#endif
+
+ return;
+
+give_sigsegv:
+ if (sig == SIGSEGV)
+ ka->sa.sa_handler = SIG_DFL;
+
+ force_sig(SIGSEGV, current);
+} /* end setup_frame() */
+
+/*****************************************************************************/
+/*
+ *
+ */
+static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
+ sigset_t *set, struct pt_regs * regs)
+{
+ struct rt_sigframe __user *frame;
+ int rsig;
[%d lines skipped]
201diff -urN linux/arch/frv/kernel/sleep.S linux/arch/frv/kernel/sleep.S
--- linux/arch/frv/kernel/sleep.S 1970/01/01 00:00:00
+++ linux/arch/frv/kernel/sleep.S Thu Jan 13 14:05:22 2005 1.1
@@ -0,0 +1,374 @@
+/* sleep.S: power saving mode entry
+ *
+ * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
+ * Written by David Woodhouse (dwmw2@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/sys.h>
+#include <linux/config.h>
+#include <linux/linkage.h>
+#include <asm/setup.h>
+#include <asm/segment.h>
+#include <asm/page.h>
+#include <asm/ptrace.h>
+#include <asm/errno.h>
+#include <asm/cache.h>
+#include <asm/spr-regs.h>
+
+#define __addr_MASK 0xfeff9820 /* interrupt controller mask */
+
+#define __addr_FR55X_DRCN 0xfeff0218 /* Address of DRCN register */
+#define FR55X_DSTS_OFFSET -4 /* Offset from DRCN to DSTS */
+#define FR55X_SDRAMC_DSTS_SSI 0x00000002 /* indicates that the SDRAM is
in self-refresh mode */
+
+#define __addr_FR4XX_DRCN 0xfe000430 /* Address of DRCN register */
+#define FR4XX_DSTS_OFFSET -8 /* Offset from DRCN to DSTS */
+#define FR4XX_SDRAMC_DSTS_SSI 0x00000001 /* indicates that the SDRAM is
in self-refresh mode */
+
+#define SDRAMC_DRCN_SR 0x00000001 /* transition SDRAM into self-refresh
mode */
+
+ .section .bss
+ .balign 8
+ .globl __sleep_save_area
+__sleep_save_area:
+ .space 16
+
+
+ .text
+ .balign 4
+
+.macro li v r
+ sethi.p %hi(\v),\r
+ setlo %lo(\v),\r
+.endm
+
+#ifdef CONFIG_PM
+#################### |