CVSROOT: /home/cvs
Module name: linux
Changes by: ralf@ftp.linux-mips.org 05/01/08 15:03:53
Modified files:
arch/mips/mm : tlbex.c
include/asm-mips: mmu_context.h stackframe.h
Log message:
Handle CONFIG_BUILD_ELF64 right.
diff -urN linux/arch/mips/mm/tlbex.c linux/arch/mips/mm/tlbex.c
--- linux/arch/mips/mm/tlbex.c 2005/01/07 18:58:34 1.13
+++ linux/arch/mips/mm/tlbex.c 2005/01/08 15:03:53 1.14
@@ -949,7 +949,17 @@
if (in_compat_space_p(pgdc)) {
i_dmfc0(p, ptr, C0_CONTEXT);
i_dsra(p, ptr, ptr, 23);
+ i_ld(p, ptr, 0, ptr);
} else {
+#ifdef CONFIG_BUILD_ELF64
+ i_dmfc0(p, ptr, C0_CONTEXT);
+ i_dsrl(p, ptr, ptr, 23);
+ i_dsll(p, ptr, ptr, 3);
+ i_LA_mostly(p, tmp, pgdc);
+ i_daddu(p, ptr, ptr, tmp);
+ i_dmfc0(p, tmp, C0_BADVADDR);
+ i_ld(p, ptr, rel_lo(pgdc), ptr);
+#else
i_dmfc0(p, ptr, C0_CONTEXT);
i_lui(p, tmp, rel_highest(pgdc));
i_dsll(p, ptr, ptr, 9);
@@ -957,8 +967,9 @@
i_dsrl32(p, ptr, ptr, 0);
i_and(p, ptr, ptr, tmp);
i_dmfc0(p, tmp, C0_BADVADDR);
+ i_ld(p, ptr, 0, ptr);
+#endif
}
- i_ld(p, ptr, 0, ptr);
#else
i_LA_mostly(p, ptr, pgdc);
i_ld(p, ptr, rel_lo(pgdc), ptr);
diff -urN linux/include/asm-mips/mmu_context.h
linux/include/asm-mips/mmu_context.h
--- linux/include/asm-mips/mmu_context.h 2004/12/04 20:12:28 1.47
+++ linux/include/asm-mips/mmu_context.h 2005/01/08 15:03:53 1.48
@@ -23,19 +23,26 @@
* to the current pgd for each processor. Also, the proc. id is stuffed
* into the context register.
*/
+extern unsigned long pgd_current[];
+
#define TLBMISS_HANDLER_SETUP_PGD(pgd) \
pgd_current[smp_processor_id()] = (unsigned long)(pgd)
+
#ifdef CONFIG_MIPS32
-#define TLBMISS_HANDLER_SETUP() \
- write_c0_context((unsigned long) smp_processor_id() << 23); \
+#define TLBMISS_HANDLER_SETUP()
\
+ write_c0_context((unsigned long) smp_processor_id() << 23); \
TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
#endif
-#ifdef CONFIG_MIPS64
-#define TLBMISS_HANDLER_SETUP() \
+#if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64)
+#define TLBMISS_HANDLER_SETUP()
\
write_c0_context((unsigned long) &pgd_current[smp_processor_id()] <<
23); \
TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
#endif
-extern unsigned long pgd_current[];
+#if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64)
+#define TLBMISS_HANDLER_SETUP()
\
+ write_c0_context((unsigned long) smp_processor_id() << 23); \
+ TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
+#endif
#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
diff -urN linux/include/asm-mips/stackframe.h
linux/include/asm-mips/stackframe.h
--- linux/include/asm-mips/stackframe.h 2004/12/22 10:47:16 1.34
+++ linux/include/asm-mips/stackframe.h 2005/01/08 15:03:53 1.35
@@ -64,7 +64,7 @@
addu k1, k0
LONG_L k1, %lo(kernelsp)(k1)
#endif
-#ifdef CONFIG_MIPS64
+#if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64)
MFC0 k1, CP0_CONTEXT
dsra k1, 23
lui k0, %hi(pgd_current)
@@ -74,6 +74,12 @@
daddu k1, k0
LONG_L k1, %lo(kernelsp)(k1)
#endif
+#if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64)
+ MFC0 k1, CP0_CONTEXT
+ dsrl k1, 23
+ dsll k1, k1, 3
+ LONG_L k1, kernelsp(k1)
+#endif
.endm
.macro set_saved_sp stackp temp temp2
@@ -83,13 +89,18 @@
sll \temp, 2
LONG_S \stackp, kernelsp(\temp)
#endif
-#ifdef CONFIG_MIPS64
+#if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64)
lw \temp, TI_CPU(gp)
dsll \temp, 3
lui \temp2, %hi(kernelsp)
daddu \temp, \temp2
LONG_S \stackp, %lo(kernelsp)(\temp)
#endif
+#if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64)
+ lw \temp, TI_CPU(gp)
+ dsll \temp, 3
+ LONG_S \stackp, kernelsp(\temp)
+#endif
.endm
#else
.macro get_saved_sp /* Uniprocessor variation */
|