CVSROOT: /home/cvs
Module name: linux
Changes by: ralf@ftp.linux-mips.org 04/12/27 16:06:02
Modified files:
arch/mips : Kconfig
Log message:
Use tabs for formatting of the Alchemy stuff.
diff -urN linux/arch/mips/Kconfig linux/arch/mips/Kconfig
--- linux/arch/mips/Kconfig 2004/12/15 14:08:18 1.116
+++ linux/arch/mips/Kconfig 2004/12/27 16:06:02 1.117
@@ -528,31 +528,31 @@
choice
prompt "Au1X00 SOC Type"
depends on SOC_AU1X00
- help
- Say Y here to enable support for one of three AMD/Alchemy
- SOCs. For additional documentation see www.amd.com.
+ help
+ Say Y here to enable support for one of three AMD/Alchemy
+ SOCs. For additional documentation see www.amd.com.
config SOC_AU1000
- bool "SOC_AU1000"
+ bool "SOC_AU1000"
config SOC_AU1100
- bool "SOC_AU1100"
+ bool "SOC_AU1100"
config SOC_AU1500
- bool "SOC_AU1500"
+ bool "SOC_AU1500"
config SOC_AU1550
- bool "SOC_AU1550"
+ bool "SOC_AU1550"
endchoice
choice
- prompt "AMD/Alchemy Au1x00 board support"
- depends on SOC_AU1X00
+ prompt "AMD/Alchemy Au1x00 board support"
+ depends on SOC_AU1X00
help
These are evaluation boards built by AMD/Alchemy to
showcase their Au1X00 Internet Edge Processors. The SOC design
is based on the MIPS32 architecture running at 266/400/500MHz
- with many integrated peripherals. Further information can be
- found at their website, <http://www.amd.com/>. Say Y here if you
- wish to build a kernel for this platform.
+ with many integrated peripherals. Further information can be
+ found at their website, <http://www.amd.com/>. Say Y here if you
+ wish to build a kernel for this platform.
config MIPS_PB1000
bool "PB1000 board"
|